/**
* @brief Initializes the SSPx peripheral according to the specified
* parameters in the SSP_InitStruct.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param SSP_InitStruct: pointer to a SSP_InitTypeDef structure
* that contains the configuration information for the specified SSP peripheral.
* @retval None
*/
void SSP_Init(MDR_SSP_TypeDef* SSPx, const SSP_InitTypeDef* SSP_InitStruct)
{
uint32_t tmpreg;
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_SPEED_FACTOR(SSP_InitStruct->SSP_SCR));
assert_param(IS_SSP_SPEED_DIVIDER(SSP_InitStruct->SSP_CPSDVSR));
assert_param(IS_SSP_MODE(SSP_InitStruct->SSP_Mode));
assert_param(IS_SSP_WORD_LENGTH(SSP_InitStruct->SSP_WordLength));
assert_param(IS_SSP_SPH(SSP_InitStruct->SSP_SPH));
assert_param(IS_SSP_SPO(SSP_InitStruct->SSP_SPO));
assert_param(IS_SSP_FRF(SSP_InitStruct->SSP_FRF));
assert_param(IS_SSP_HARDWARE_FLOW_CONTROL(SSP_InitStruct->SSP_HardwareFlowControl));
/* SSPx CPSR Configuration */
SSPx->CPSR = SSP_InitStruct->SSP_CPSDVSR;
/* SSPx CR0 Configuration */
tmpreg = (SSP_InitStruct->SSP_SCR << SSP_CR0_SCR_Pos)
+ SSP_InitStruct->SSP_SPH
+ SSP_InitStruct->SSP_SPO
+ SSP_InitStruct->SSP_FRF
+ SSP_InitStruct->SSP_WordLength;
SSPx->CR0 = tmpreg;
/* SSPx CR1 Configuration */
tmpreg = SSP_InitStruct->SSP_HardwareFlowControl + SSP_InitStruct->SSP_Mode;
SSPx->CR1 = tmpreg;
}
/**
* @brief Returns the most recent received data by the SSPx peripheral.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @retval The received data (7:0) and error flags (15:8).
*/
uint16_t SSP_ReceiveData(MDR_SSP_TypeDef* SSPx)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
/* Receive Data */
return ((uint16_t)(SSPx->DR));
}
/**
* @brief Returns the most recent received data by the SSPx/I2Sx peripheral.
* @param SSPx: where x can be
* - SSP0, SSP1
* @retval The value of the received data.
*/
uint16_t SSP_ReceiveData(SSP_TypeDef* SSPx)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
/* Return the data in the DR register */
return SSPx->DR;
}
/**
* @brief Transmits a Data through the SSPx/I2Sx peripheral.
* @param SSPx: where x can be
* - SSP0, SSP1
* @param Data : Data to be transmitted.
* @retval None
*/
void SSP_SendData(SSP_TypeDef* SSPx, uint16_t Data)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
/* Write in the DR register the data to be sent */
SSPx->DR = Data;
}
/**
* @brief Clears the SSPx’s interrupt pending bits.
* @param SSPx: Select the SSP or the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param SSP_IT: specifies the interrupt pending bit to clear.
* This parameter can be one of the following values:
* @arg SSP_IT_RT
* @arg SSP_IT_ROR
* @retval None
*/
void SSP_ClearITPendingBit(MDR_SSP_TypeDef* SSPx, uint32_t SSP_IT)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_RESET_IT(SSP_IT));
SSPx->ICR |= SSP_IT;
}
/**
* @brief Transmits single data through the SSPx peripheral.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param Data: the data to transmit.
* @retval None
*/
void SSP_SendData(MDR_SSP_TypeDef* SSPx, uint16_t Data)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
/* Transmit Data */
SSPx->DR = Data;
}
/**
* @brief Clears the SSPx CRC Error (CRCERR) interrupt pending bit.
* @param SSPx: where x can be
* - SSP0, SSP1
* @param SSP_IT: specifies the SSP interrupt pending bit to clear.
* @note
* - SSP_CLEAR_IT_RORIC : Clear the RUNOVER
* - SSP_CLEAR_IT_RTIC : Clear the interrupts ???
* @retval None
*/
void SSP_ClearIT_Bit(SSP_TypeDef* SSPx, uint32_t SSP_CLEAR_IT)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_CLEAR_IT(SSP_IT));
/* Clear the selected SSP interrupt pending bit */
SSPx->ICR = SSP_CLEAR_IT;
}
/**
* @brief Configures the data size for the selected SSP.
* @param SSPx: where x can be 1 or 2 to select the SSP peripheral.
* @param SSP_DataSize: specifies the SSP data size.
* This parameter can be one of the following values:
* @arg from SSP_DataSize_16b: Set data frame format to 16bit
* @arg to SSP_DataSize_4b: Set data frame format to 8bit
* @retval None
*/
void SSP_DataSizeConfig(SSP_TypeDef* SSPx, uint16_t SSP_DataSize)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_DATASIZE(SSP_DataSize));
/* Clear DFF bit */
SSPx->CR0 &= ~SSP_DataSize_16b;
/* Set new DFF bit value */
SSPx->CR0 |= SSP_DataSize;
}
/**
* @brief Deinitializes the SSPx peripheral registers to their default
* reset values (Affects also the I2Ss).
* @param SSPx: where x can be 1 or 2 to select the SSP peripheral.
* @retval None
*/
void SSP_DeInit(SSP_TypeDef* SSPx)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
SSPx->CR0 = 0x00;
SSPx->CR1 = 0x00; // SSE Enable = reset
SSPx->DR = 0x00;
SSPx->CPSR = 0x00;
SSPx->IMSC = 0x00;
SSPx->DMACR= 0x00;
}
/**
* @brief Resets the SSPx peripheral registers to their default reset values.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values: SSP1, SSP2.
* @retval None
*/
void SSP_DeInit(MDR_SSP_TypeDef* SSPx)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
SSPx->CR0 = 0;
SSPx->CR1 = 0;
SSPx->CPSR = 0;
SSPx->IMSC = 0;
SSPx->DMACR = 0;
/* Clear SSP ICR[RTIC] and SSP ICR[RORIC] bits */
SSPx->ICR = SSP_IT_RT | SSP_IT_ROR;
}
/**
* @brief Enables or disables the specified SSP interrupts.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param SSP_IT: specifies the SSP interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg SSP_IT_TX
* @arg SSP_IT_RX
* @arg SSP_IT_RT
* @arg SSP_IT_ROR
* @param NewState: new state of the specified SSPx interrupts.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SSP_ITConfig(MDR_SSP_TypeDef* SSPx, uint32_t SSP_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_CONFIG_IT(SSP_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
SSPx->IMSC |= SSP_IT;
}
else
{
SSPx->IMSC &= ~SSP_IT;
}
}
/**
* @brief Enables or disables the SS output for the selected SSP.
* @param SSPx: where x can be 1 or 2 to select the SSP peripheral.
* @param NewState: new state of the SSPx SS output.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SSP_SSOutputCmd(SSP_TypeDef* SSPx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected SSP SS output */
SSPx->CR1 |= CR1_SOD_Set;
}
else
{
/* Disable the selected SSP SS output */
SSPx->CR1 &= CR1_SOD_Reset;
}
}
/**
* @brief Configures internally by software the NSS pin for the selected SSP.
* @param SSPx: where x can be 1 or 2 to select the SSP peripheral.
* @param SSP_NSSInternalSoft: specifies the SSP NSS internal state.
* This parameter can be one of the following values:
* @arg SSP_NSSInternalSoft_Set: Set NSS pin internally
* @arg SSP_NSSInternalSoft_Reset: Reset NSS pin internally
* @retval None
*/
void SSP_NSSInternalSoftwareConfig(SSP_TypeDef* SSPx, uint16_t SSP_NSSInternalSoft)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_NSS_INTERNAL(SSP_NSSInternalSoft));
if (SSP_NSSInternalSoft != SSP_NSSInternalSoft_Reset)
{
/* Set NSS pin internally by software */
SSPx->CR1 |= SSP_NSSInternalSoft_Set;
}
else
{
/* Reset NSS pin internally by software */
SSPx->CR1 &= SSP_NSSInternalSoft_Reset;
}
}
/**
* @brief Enables or disables the specified SSP peripheral.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param NewState: new state of the SSPx peripheral.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SSP_Cmd(MDR_SSP_TypeDef* SSPx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected SSP by setting the SSE bit in the CR1 register */
SSPx->CR1 |= CR1_EN_Set;
}
else
{
/* Disable the selected SSP by clearing the SSE bit in the CR1 register */
SSPx->CR1 &= CR1_EN_Reset;
}
}
/**
* @brief Enables or disables the SSPx/I2Sx DMA interface.
* @param SSPx: where x can be
* - SSP0, SSP1
* @param SSP_DMAReq: specifies the SSP DMA transfer request to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg SSP_DMAReq_Tx: Tx buffer DMA transfer request
* @arg SSP_DMAReq_Rx: Rx buffer DMA transfer request
* @param NewState: new state of the selected SSP DMA transfer request.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SSP_DMACmd(SSP_TypeDef* SSPx, uint32_t SSP_DMAReq, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
assert_param(IS_SSP_DMAREQ(SSP_DMAReq));
if (NewState != DISABLE)
{
/* Enable the selected SSP DMA requests */
SSPx->DMACR |= SSP_DMAReq;
}
else
{
/* Disable the selected SSP/I2S DMA requests */
SSPx->DMACR &= ~SSP_DMAReq;
}
}
/**
* @brief Enables or disables the SSP’s DMA interface.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param SSP_DMAReq: specifies the DMA request.
* This parameter can be any combination of the following values:
* @arg SSP_DMA_RXE: SSP DMA receive request
* @arg SSP_DMA_TXE: SSP DMA transmit request
* @param NewState: new state of the DMA Request sources.
* This parameter can be: ENABLE or DISABLE.
* @note The DMA mode is not available for SSP5.
* @retval None
*/
void SSP_DMACmd(MDR_SSP_TypeDef* SSPx, uint32_t SSP_DMAReq, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_DMAREQ(SSP_DMAReq));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the DMA transfer for selected requests in the SSP DMACR register */
SSPx->DMACR |= SSP_DMAReq;
}
else
{
/* Disable the DMA transfer for selected requests in the SSP DMACR register */
SSPx->DMACR &= (uint16_t)~SSP_DMAReq;
}
}
/**
* @brief Initializes the SSPx peripheral according to the specified
* parameters in the SSP_InitStruct.
* @param SSPx: where x can be 1 or 2 to select the SSP peripheral.
* @param SSP_InitStruct: pointer to a SSP_InitTypeDef structure that
* contains the configuration information for the specified SSP peripheral.
* @retval None
*/
void SSP_Init(SSP_TypeDef* SSPx, SSP_InitTypeDef* SSP_InitStruct)
{
uint32_t tmpreg = 0;
/* check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
/* Check the SSP parameters */
assert_param(IS_SSP_SERIALCLOCKRATE(SSP_InitStruct->SSP_SerialClockRate));
assert_param(IS_SSP_FRAMEFORMAT(SSP_InitStruct->SSP_FrameFormat));
assert_param(IS_SSP_CPHA(SSP_InitStruct->SSP_CPHA));
assert_param(IS_SSP_CPOL(SSP_InitStruct->SSP_CPOL));
assert_param(IS_SSP_DATASIZE(SSP_InitStruct->SSP_DataSize));
assert_param(IS_SSP_SOD(SSP_InitStruct->SSP_SOD));
assert_param(IS_SSP_MODE(SSP_InitStruct->SSP_Mode));
assert_param(IS_SSP_NSS(SSP_InitStruct->SSP_NSS));
assert_param(IS_SSP_LBM(SSP_InitStruct->SSP_LBM));
assert_param(IS_SSP_SSE(SSP_InitStruct->SSP_SSE));
assert_param(IS_SSP_BAUDRATE_PRESCALER(SSP_InitStruct->SSP_BaudRatePrescaler));
/*---------------------------- SSPx CR0 Configuration ------------------------*/
/* Get the SSPx CR0 value */
tmpreg = SSPx->CR0;
/* Clear bits */
//tmpreg &= CR1_CLEAR_Mask;
tmpreg |= (uint32_t)(SSP_InitStruct->SSP_SerialClockRate | SSP_InitStruct->SSP_FrameFormat |
SSP_InitStruct->SSP_CPHA | SSP_InitStruct->SSP_CPOL | SSP_InitStruct->SSP_DataSize );
//printf("CR0: %.8X \r\n",tmpreg);
/* Write to SSPx CR0 */
SSPx->CR0 = tmpreg;
/*---------------------------- SSPx CR1 Configuration ------------------------*/
/* Write to SSPx CR1 */
tmpreg = SSPx->CR1;
/* Clear bits */
//tmpreg &= CR1_CLEAR_Mask;
tmpreg |= (uint32_t)(SSP_InitStruct->SSP_SOD | SSP_InitStruct->SSP_Mode |
SSP_InitStruct->SSP_NSS | SSP_InitStruct->SSP_SSE | SSP_InitStruct->SSP_LBM );
SSPx->CR1 = tmpreg;
//printf("CR1: %.8X \r\n",tmpreg);
/*---------------------------- SSPx Clock prescal register ------------------------*/
SSPx->CPSR = SSP_InitStruct->SSP_BaudRatePrescaler;
}
/**
* @brief Checks whether the specified SSP flag is set or not.
* @param SSPx: Select the SSP or the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2, SSP3, SSP4 or SSP5.
* @param SSP_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg SSP_FLAG_BSY
* @arg SSP_FLAG_RFF
* @arg SSP_FLAG_RNE
* @arg SSP_FLAG_TNF
* @retval The new state of SSP_FLAG (SET or RESET).
*/
FlagStatus SSP_GetFlagStatus(MDR_SSP_TypeDef* SSPx, uint32_t SSP_FLAG)
{
FlagStatus bitstatus;
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_FLAG(SSP_FLAG));
if (SSPx->SR & SSP_FLAG)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return (bitstatus);
}
/**
* @brief Enables or disables the specified SSP/I2S interrupts.
* @param SSPx: where x can be
* - SSP0, SSP1
* @param SSP_IT: specifies the SSP interrupt source to be enabled or disabled.
* This parameter can be one of the following values:
* @arg SSP_IT_TXIM: Tx FIFO interrupt mask
* @arg SSP_IT_RXIM: Rx FIFO interrupt mask
* @arg SSP_IT_RTIM: RX Timeout interrupt mask
* @arg SSP_IT_RORIM: RX overrun interrupt mask
* @param NewState: new state of the specified SSP/I2S interrupt.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void SSP_ITConfig(SSP_TypeDef* SSPx, uint32_t SSP_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
assert_param(IS_SSP_CONFIG_IT(SSP_IT));
if (NewState != DISABLE)
{
/* Enable the selected SSP/I2S interrupt */
SSPx->IMSC |= SSP_IT;
}
else
{
/* Disable the selected SSP/I2S interrupt */
SSPx->IMSC &= SSP_IT;
}
}
/**
* @brief Checks whether the specified SSP interrupt (masked) has occurred or not.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param SSP_IT: specifies the SSP interrupt source to check.
* This parameter can be one of the following values:
* @arg SSP_IT_TX
* @arg SSP_IT_RX
* @arg SSP_IT_RT
* @arg SSP_IT_ROR
* @retval The new state of SSP_IT (SET or RESET).
*/
ITStatus SSP_GetITStatusMasked(MDR_SSP_TypeDef* SSPx, uint32_t SSP_IT)
{
ITStatus bitstatus;
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_CONFIG_IT(SSP_IT));
if (SSPx->MIS & SSP_IT)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return (bitstatus);
}
/**
* @brief Checks whether the specified SSP flag is set or not.
* @param SSPx: where x can be
* - SSP0, SSP1
* @param SSP_FLAG: specifies the SSP flag to check.
* This parameter can be one of the following values:
* @arg SSP_FLAG_BSY : BUSY flag
* @arg SSP_FLAG_RFF : RX FIFO full flag
* @arg SSP_FLAG_RNE : RX FIFO not empty flag
* @arg SSP_FLAG_TNF : TX FIFO not full flag
* @arg SSP_FLAG_TFE : TX FIFO empty flag
* @retval The new state of SSP_FLAG (SET or RESET).
*/
FlagStatus SSP_GetFlagStatus(SSP_TypeDef* SSPx, uint32_t SSP_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_GET_FLAG(SSP_FLAG));
/* Check the status of the specified SSP/I2S flag */
if ((SSPx->SR & SSP_FLAG))
{
/* SSP_FLAG is set */
bitstatus = SET;
}
else
{
/* SSP__FLAG is reset */
bitstatus = RESET;
}
/* Return the SSP_I2S_FLAG status */
return bitstatus;
}
/**
* @brief Checks whether the specified SSP interrupt has occurred or not.
* @param SSPx: where x can be
* - SSP0, SSP1
* @param SSP_IT: specifies the SSP interrupt source to check.
* This parameter can be one of the following values:
* @arg SSP_IT_TXIM: Tx FIFO interrupt mask
* @arg SSP_IT_RXIM: Rx FIFO interrupt mask
* @arg SSP_IT_RTIM: RX Timeout interrupt mask
* @arg SSP_IT_RORIM: RX overrun interrupt mask
* @retval The new state of SSP_IT (SET or RESET).
*/
ITStatus SSP_GetITStatus(SSP_TypeDef* SSPx, uint32_t SSP_IT)
{
ITStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_GET_IT(SSP_IT));
/* Check the status of the specified SSP interrupt */
if (SSPx->MIS & SSP_IT)
{
/* SSP_IT is set */
bitstatus = SET;
}
else
{
/* SSP_IT is reset */
bitstatus = RESET;
}
/* Return the SSP_IT status */
return bitstatus;
}
/**
* @brief Initializes the SSPx peripheral Clock according to the
* specified parameters.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param SSP_BRG: specifies the HCLK division factor.
* This parameter can be one of the following values:
* @arg SSP_HCLKdiv1
* @arg SSP_HCLKdiv2
* @arg SSP_HCLKdiv4
* @arg SSP_HCLKdiv8
* @arg SSP_HCLKdiv16
* @arg SSP_HCLKdiv32
* @arg SSP_HCLKdiv64
* @arg SSP_HCLKdiv128
* @retval None
*/
void SSP_BRGInit(MDR_SSP_TypeDef* SSPx, uint32_t SSP_BRG)
{
uint32_t tmpreg;
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_CLOCK_BRG(SSP_BRG));
tmpreg = MDR_RST_CLK->SSP_CLOCK;
if (SSPx == MDR_SSP1)
{
tmpreg |= RST_CLK_SSP_CLOCK_SSP1_CLK_EN;
tmpreg &= ~RST_CLK_SSP_CLOCK_SSP1_BRG_Msk;
tmpreg |= SSP_BRG;
}
else if (SSPx == MDR_SSP2)
{
tmpreg |= RST_CLK_SSP_CLOCK_SSP2_CLK_EN;
tmpreg &= ~RST_CLK_SSP_CLOCK_SSP2_BRG_Msk;
tmpreg |= (SSP_BRG << 8);
}
MDR_RST_CLK->SSP_CLOCK = tmpreg;
}
/**
* @brief Initializes the SSPx peripheral Clock according to the
* specified parameters.
* @param SSPx: Select the SSP peripheral.
* This parameter can be one of the following values:
* SSP1, SSP2.
* @param SSP_BRG: specifies the HCLK division factor.
* This parameter can be one of the following values:
* @arg SSP_HCLKdiv1
* @arg SSP_HCLKdiv2
* @arg SSP_HCLKdiv4
* @arg SSP_HCLKdiv8
* @arg SSP_HCLKdiv16
* @arg SSP_HCLKdiv32
* @arg SSP_HCLKdiv64
* @arg SSP_HCLKdiv128
* @retval None
*/
void SSP_BRGInit ( MDR_SSP_TypeDef* SSPx, uint32_t SSP_BRG ) {
uint32_t tmpreg;
/* Check the parameters */
assert_param(IS_SSP_ALL_PERIPH(SSPx));
assert_param(IS_SSP_CLOCK_BRG(SSP_BRG));
#ifdef USE_MDR1986VE3 /* For Cortex M1 */
if ( (SSPx != MDR_SSP1) && (SSPx != MDR_SSP2) && (SSPx != MDR_SSP3)) {
tmpreg = MDR_RST_CLK->UART_SSP_CLOCK;
}
else
#endif // #ifdef USE_MDR1986VE3 /* For Cortex M1 */
#if defined (USE_MDR1901VC1T)
if(SSPx == MDR_SSP4)
tmpreg = MDR_RST_CLK->SPP2_CLOCK;
else
#endif
tmpreg = MDR_RST_CLK->SSP_CLOCK;
if (SSPx == MDR_SSP1) {
tmpreg |= RST_CLK_SSP_CLOCK_SSP1_CLK_EN;
tmpreg &= ~RST_CLK_SSP_CLOCK_SSP1_BRG_Msk;
tmpreg |= SSP_BRG;
}
else{
if (SSPx == MDR_SSP2) {
tmpreg |= RST_CLK_SSP_CLOCK_SSP2_CLK_EN;
tmpreg &= ~RST_CLK_SSP_CLOCK_SSP2_BRG_Msk;
tmpreg |= (SSP_BRG << 8);
}
#if defined (USE_MDR1986VE3) || defined (USE_MDR1901VC1T)
else{
if(SSPx == MDR_SSP3) {
tmpreg |= RST_CLK_SSP_CLOCK_SSP3_CLK_EN;
tmpreg &= ~RST_CLK_SSP_CLOCK_SSP3_BRG_Msk;
tmpreg |= (SSP_BRG << RST_CLK_SSP_CLOCK_SSP3_BRG_Pos);
}
else{
if(SSPx == MDR_SSP4) {
tmpreg |= SSP4_CLK_EN;
tmpreg &= ~SSP4_BRG_Mask;
tmpreg |= (SSP_BRG << SSP4_BRG_Pos);
}
}
}
#endif // #ifdef USE_MDR1986VE3 /* For Cortex M1 */
}
#ifdef USE_MDR1986VE3 /* For Cortex M1 */
if( (SSPx != MDR_SSP1) && (SSPx != MDR_SSP2) && (SSPx != MDR_SSP3) ){
MDR_RST_CLK->UART_SSP_CLOCK = tmpreg;
}
else
#endif // #ifdef USE_MDR1986VE3 /* For Cortex M1 */
#if defined (USE_MDR1901VC1T)
if(SSPx == MDR_SSP4)
MDR_RST_CLK->SPP2_CLOCK = tmpreg;
#endif
MDR_RST_CLK->SSP_CLOCK = tmpreg;
}
