Exemplo n.º 1
0
/**
  * @brief  Initializes the SSPx peripheral Clock according to the
  *         specified parameters.
  * @param  SSPx: Select the SSP peripheral.
  *         This parameter can be one of the following values:
  *         SSP1, SSP2.
  * @param  SSP_BRG: specifies the HCLK division factor.
  *         This parameter can be one of the following values:
  *           @arg SSP_HCLKdiv1
  *           @arg SSP_HCLKdiv2
  *           @arg SSP_HCLKdiv4
  *           @arg SSP_HCLKdiv8
  *           @arg SSP_HCLKdiv16
  *           @arg SSP_HCLKdiv32
  *           @arg SSP_HCLKdiv64
  *           @arg SSP_HCLKdiv128
  * @retval None
  */
void SSP_BRGInit(MDR_SSP_TypeDef* SSPx, uint32_t SSP_BRG)
{
    uint32_t tmpreg;

    /* Check the parameters */
    assert_param(IS_SSP_ALL_PERIPH(SSPx));
    assert_param(IS_SSP_CLOCK_BRG(SSP_BRG));

    tmpreg = MDR_RST_CLK->SSP_CLOCK;

    if (SSPx == MDR_SSP1)
    {
        tmpreg |= RST_CLK_SSP_CLOCK_SSP1_CLK_EN;
        tmpreg &= ~RST_CLK_SSP_CLOCK_SSP1_BRG_Msk;
        tmpreg |= SSP_BRG;
    }
    else if (SSPx == MDR_SSP2)
    {
        tmpreg |= RST_CLK_SSP_CLOCK_SSP2_CLK_EN;
        tmpreg &= ~RST_CLK_SSP_CLOCK_SSP2_BRG_Msk;
        tmpreg |= (SSP_BRG << 8);
    }
    MDR_RST_CLK->SSP_CLOCK = tmpreg;
}
/**
  * @brief  Initializes the SSPx peripheral Clock according to the
  *         specified parameters.
  * @param  SSPx: Select the SSP peripheral.
  *         This parameter can be one of the following values:
  *         SSP1, SSP2.
  * @param  SSP_BRG: specifies the HCLK division factor.
  *         This parameter can be one of the following values:
  *           @arg SSP_HCLKdiv1
  *           @arg SSP_HCLKdiv2
  *           @arg SSP_HCLKdiv4
  *           @arg SSP_HCLKdiv8
  *           @arg SSP_HCLKdiv16
  *           @arg SSP_HCLKdiv32
  *           @arg SSP_HCLKdiv64
  *           @arg SSP_HCLKdiv128
  * @retval None
  */
void SSP_BRGInit ( MDR_SSP_TypeDef* SSPx, uint32_t SSP_BRG ) {
	uint32_t tmpreg;

	/* Check the parameters */
	assert_param(IS_SSP_ALL_PERIPH(SSPx));
	assert_param(IS_SSP_CLOCK_BRG(SSP_BRG));

#ifdef USE_MDR1986VE3 /* For Cortex M1 */
	if ( (SSPx != MDR_SSP1) && (SSPx != MDR_SSP2) && (SSPx != MDR_SSP3)) {
		tmpreg = MDR_RST_CLK->UART_SSP_CLOCK;
	}
	else
#endif	// #ifdef USE_MDR1986VE3 /* For Cortex M1 */
#if defined (USE_MDR1901VC1T)
	if(SSPx == MDR_SSP4)
		tmpreg = MDR_RST_CLK->SPP2_CLOCK;
	else
#endif
		tmpreg = MDR_RST_CLK->SSP_CLOCK;



	if (SSPx == MDR_SSP1) {
		tmpreg |= RST_CLK_SSP_CLOCK_SSP1_CLK_EN;
		tmpreg &= ~RST_CLK_SSP_CLOCK_SSP1_BRG_Msk;
		tmpreg |= SSP_BRG;
	}
	else{
		if (SSPx == MDR_SSP2) {
			tmpreg |= RST_CLK_SSP_CLOCK_SSP2_CLK_EN;
			tmpreg &= ~RST_CLK_SSP_CLOCK_SSP2_BRG_Msk;
			tmpreg |= (SSP_BRG << 8);
		}
#if defined  (USE_MDR1986VE3) || defined (USE_MDR1901VC1T)
		else{
			if(SSPx == MDR_SSP3) {
				tmpreg |= RST_CLK_SSP_CLOCK_SSP3_CLK_EN;
				tmpreg &= ~RST_CLK_SSP_CLOCK_SSP3_BRG_Msk;
				tmpreg |= (SSP_BRG << RST_CLK_SSP_CLOCK_SSP3_BRG_Pos);
			}

			else{
				if(SSPx == MDR_SSP4) {
					tmpreg |= SSP4_CLK_EN;
					tmpreg &= ~SSP4_BRG_Mask;
					tmpreg |= (SSP_BRG << SSP4_BRG_Pos);
				}
			}
		}
#endif // #ifdef USE_MDR1986VE3 /* For Cortex M1 */
	}
#ifdef USE_MDR1986VE3 /* For Cortex M1 */
	if( (SSPx != MDR_SSP1) && (SSPx != MDR_SSP2) && (SSPx != MDR_SSP3) ){
		MDR_RST_CLK->UART_SSP_CLOCK = tmpreg;
	}
	else
#endif // #ifdef USE_MDR1986VE3 /* For Cortex M1 */
#if defined (USE_MDR1901VC1T)
	if(SSPx == MDR_SSP4)
		MDR_RST_CLK->SPP2_CLOCK = tmpreg;
#endif
		MDR_RST_CLK->SSP_CLOCK = tmpreg;

}