void main(void)
{
//--- CPU Initialization
InitSysCtrl(); // Initialize the CPU (FILE: SysCtrl.c)
InitGpio(); // Initialize the shared GPIO pins (FILE: Gpio.c)
InitPieCtrl(); // Initialize and enable the PIE (FILE: PieCtrl.c)
InitWatchdog(); // Initialize the Watchdog Timer (FILE: WatchDog.c)
//--- Peripheral Initialization
InitAdc(); // Initialize the ADC (FILE: Adc.c)
InitEPwm(); // Initialize the EPwm (FILE: EPwm.c)
int d;
for (d = 0; d < SIN_DEFINITION; d++) {
sinValues[d] = (int)(fabs(sin(d * 180.f / SIN_DEFINITION * 2 * PI / 360)) * SIN_AMPLITUDE) + LOWER_HYSTERESIS_BAND;
}
// Variable Initialization
asm (" ESTOP0"); // Emulator Halt instruction
int i = 0;
//--- Enable global interrupts
// Enable global interrupts and realtime debug
asm("DBGM");
asm(" CLRC INTM");
//--- Main Loop
while(D) // endless loop - wait for an interrupt
{
i ++;
if (i == 600) {
EPwm1Regs.AQSFRC.bit.ACTSFA = 1; // What to do when One-Time Software Forced Event is invoked
// 00 Does nothing (action disabled)
// 01 Clear (low)
// 10 Set (high)
// 11 Toggle
EPwm1Regs.AQSFRC.bit.OTSFA = 1; // Invoke One-Time Software Forced Event on Output A
EPwm1Regs.AQSFRC.bit.ACTSFB = 2; // What to do when One-Time Software Forced Event is invoked
// 00 Does nothing (action disabled)
// 01 Clear (low)
// 10 Set (high)
// 11 Toggle
EPwm1Regs.AQSFRC.bit.OTSFB = 1; // Invoke One-Time Software Forced Event on Output A
i = 0;
}
}
//--- Main Loop
while(1) // endless loop - wait for an interrupt
{
asm(" NOP");
}
} //end of main()
void main(void)
{
InitSysCtrl();
// Copy time critical code and Flash setup code to RAM
// This includes the following ISR functions: epwm1_timer_isr(), epwm2_timer_isr()
// epwm3_timer_isr and and InitFlash();
// The RamfuncsLoadStart, RamfuncsLoadEnd, and RamfuncsRunStart
// symbols are created by the linker. Refer to the F28335.cmd file.
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SEQ1INT = &PWM_AD_isr;
PieVectTable.ECAN0INTA = &Skiip4_CAN_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
InitFlash();
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
MemCopy(&IQmathLoadStart, &IQmathLoadEnd, &IQmathRunStart);
//ECan-A模块初始化
InitECan();
InitECan1();
InitGpio(); // Skipped for this example
InitAdc(); // Initialize necessary ADC module, directly for SVPWM.
InitEPwm();
IER |= M_INT1;
// Enable SEQ1_INT which is connected to PIE1.1:
IER |= M_INT9;
// Enable eCAN0-A INT which is connected to PIE9.5:
EINT;
} // end of main()
//
// Main
//
void main(void)
{
uint16_t pinMuxoption;
uint16_t HLT, LLT;
//
// Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xS_SysCtrl.c file.
//
InitSysCtrl();
//
// Clear all __interrupts and initialize PIE vector table:
// Disable CPU __interrupts
//
DINT;
//
// Initialize PIE control registers to their default state.
// The default state is all PIE __interrupts disabled and flags
// are cleared.
// This function is found in the F2837xS_PieCtrl.c file.
//
InitPieCtrl();
//
// Disable CPU __interrupts and clear all CPU __interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the __interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xS_SysCtrl.c.
// This function is found in F2837xS_SysCtrl.c.
//
InitPieVectTable();
//
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
EALLOW;
PieVectTable.SD1_INT = &Sdfm1_ISR;
PieVectTable.SD2_INT = &Sdfm2_ISR;
EDIS;
EALLOW;
//
// Enable CPU INT5 which is connected to SDFM INT
//
IER |= M_INT5;
//
// Enable SDFM INTn in the PIE: Group 5 __interrupt 9-10
//
PieCtrlRegs.PIEIER5.bit.INTx9 = 1; // SDFM1 interrupt enabled
PieCtrlRegs.PIEIER5.bit.INTx10 = 1; // SDFM2 interrupt enabled
EINT;
#ifdef CPU1
pinMuxoption = SDFM_PIN_MUX_OPTION1;
//
// Configure GPIO pins as SDFM pins
//
Sdfm_configurePins(pinMuxoption);
#endif
//
// Select SDFM1
//
gPeripheralNumber = SDFM1;
//
// Input Control Module
//
// Configure Input Control Mode: Modulator Clock rate = Modulator data rate
//
Sdfm_configureInputCtrl(gPeripheralNumber, FILTER1, MODE_0);
Sdfm_configureInputCtrl(gPeripheralNumber, FILTER2, MODE_0);
Sdfm_configureInputCtrl(gPeripheralNumber, FILTER3, MODE_0);
Sdfm_configureInputCtrl(gPeripheralNumber, FILTER4, MODE_0);
//
// Comparator Module
//
HLT = 0x7FFF; //Over value threshold settings
LLT = 0x0000; //Under value threshold settings
//
// Configure Comparator module's comparator filter type and comparator's OSR
// value, higher threshold, lower threshold
//
Sdfm_configureComparator(gPeripheralNumber, FILTER1, SINC3, OSR_32,
HLT, LLT);
Sdfm_configureComparator(gPeripheralNumber, FILTER2, SINC3, OSR_32,
HLT, LLT);
Sdfm_configureComparator(gPeripheralNumber, FILTER3, SINC3, OSR_32,
HLT, LLT);
Sdfm_configureComparator(gPeripheralNumber, FILTER4, SINC3, OSR_32,
HLT, LLT);
//
// Enable Master filter bit: Unless this bit is set none of the filter modules
// can be enabled. All the filter modules are synchronized when master filter
// bit is enabled after individual filter modules are enabled. All the filter
// modules are asynchronized when master filter bit is enabled before
// individual filter modules are enabled.
//
Sdfm_enableMFE(gPeripheralNumber);
//
// Data filter Module
//
// Configure Data filter modules filter type, OSR value and
// enable / disable data filter
//
Sdfm_configureData_filter(gPeripheralNumber, FILTER1, FILTER_ENABLE, SINC3,
OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(gPeripheralNumber, FILTER2, FILTER_ENABLE, SINC3,
OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(gPeripheralNumber, FILTER3, FILTER_ENABLE, SINC3,
OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(gPeripheralNumber, FILTER4, FILTER_ENABLE, SINC3,
OSR_256, DATA_16_BIT, SHIFT_9_BITS);
//
// PWM11.CMPC, PWM11.CMPD, PWM12.CMPC and PWM12.CMPD signals cannot synchronize
// the filters. This option is not being used in this example.
//
Sdfm_configureExternalreset(gPeripheralNumber,FILTER_1_EXT_RESET_ENABLE,
FILTER_2_EXT_RESET_ENABLE,
FILTER_3_EXT_RESET_ENABLE,
FILTER_4_EXT_RESET_ENABLE);
//
// Init EPWMs
//
InitEPwm();
//
// Enable interrupts
//
// Following SDFM interrupts can be enabled / disabled using this function.
// Enable / disable comparator high threshold
// Enable / disable comparator low threshold
// Enable / disable modulator clock failure
// Enable / disable filter acknowledge
//
Sdfm_configureInterrupt(gPeripheralNumber, FILTER1, IEH_DISABLE,
IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(gPeripheralNumber, FILTER2, IEH_DISABLE,
IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(gPeripheralNumber, FILTER3, IEH_DISABLE,
IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(gPeripheralNumber, FILTER4, IEH_DISABLE,
IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
while((*EPWM[gPWM_number]).TBCTR < 550);
//
// Enable master interrupt so that any of the filter interrupts can trigger
// by SDFM interrupt to CPU
//
Sdfm_enableMIE(gPeripheralNumber);
while(1);
}
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2806x_SysCtrl.c file.
char * rto1 = (char *)0x8000;
for (rn1 = 0; rn1 < nn1; rn1++) *rto1++ = rfrom1;
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (Uint32)&RamfuncsLoadSize);
InitSysCtrl();
// Step 2. Initalize GPIO:
// This example function is found in the F2806x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2806x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2806x_DefaultIsr.c.
// This function is found in F2806x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM5_INT = &epwm5_timer_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Step 4. Initialize all the Device Peripherals:
// This function is found in F2806x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
InitAdc(); // For this example, init the ADC
//InitAdcAio(); // Function that sets analog input pins
ConfigADC();
//AdcOffsetSelfCal();
InitEPwm(); // Function initializes ePWM 1 - 5
// Step 5. User specific code, enable interrupts:
// Copy time critical code and Flash setup code to RAM
// This includes the following ISR functions: epwm1_timer_isr(), epwm2_timer_isr()
// epwm3_timer_isr and and InitFlash();
// The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart
// symbols are created by the linker. Refer to the F2808.cmd file.
// Call Flash Initialization to setup flash waitstates
// This function must reside in RAM
InitFlash();
IER |= M_INT3; // Enable CPU INT3 which is connected to EPWM1-8 INT: page 175 in documentation
IER |= M_INT10; // Enable CPU Interrupt 10
// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
PieCtrlRegs.PIEIER3.bit.INTx5 = PWM5_INT_ENABLE;
// Enable ADCINT1 in PIE
/*PieCtrlRegs.PIEIER10.bit.INTx1 = 1; // Enable INT 10.1 in the PIE
PieCtrlRegs.PIEIER10.bit.INTx2 = 1; // Enable INT 10.2 in the PIE
PieCtrlRegs.PIEIER10.bit.INTx3 = 1; // Enable INT 10.3 in the PIE
PieCtrlRegs.PIEIER10.bit.INTx4 = 1; // Enable INT 10.4 in the PIE
PieCtrlRegs.PIEIER10.bit.INTx5 = 1; // Enable INT 10.5 in the PIE
PieCtrlRegs.PIEIER10.bit.INTx6 = 1; // Enable INT 10.6 in the PIE
PieCtrlRegs.PIEIER10.bit.INTx7 = 1; // Enable INT 10.7 in the PIE
PieCtrlRegs.PIEIER10.bit.INTx8 = 1; // Enable INT 10.8 in the PIE*/
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
// Step 6. IDLE loop. Just sit and loop forever (optional):
EALLOW;
GpioCtrlRegs.GPBMUX2.bit.GPIO54 = 0;
GpioCtrlRegs.GPBDIR.bit.GPIO54 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO54 = 1;
EDIS;
for(;;)
{
// This loop will be interrupted, so the overall
// delay between pin toggles will be longer.
DELAY_US(DELAY);
LoopCount++;
//GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;
}
}
