Exemplo n.º 1
0
void InitSpiGpio()
{
   #if DSP28_SPIA
       InitSpiaGpio();
   #endif // endif DSP28_SPIA
   #if DSP28_SPIB
       InitSpibGpio();
   #endif // endif DSP28_SPIB
}
Exemplo n.º 2
0
void main(void)
{
	InitSysCtrl();
	InitSpiaGpio();
	Gpio_select();
	/*
	EALLOW;
	SysCtrlRegs.WDCR = 0x00AF; // re-enable the watchdog
	EDIS;
	 */
	DINT;
	IER = 0x0000;
	IFR = 0x0000;
	InitPieCtrl();
	InitPieVectTable();
	InitAdc();
	spi_fifo_init();
	Setup_ePWM();		// ePWM
	Setup_ADC();		// ADC setup
	EALLOW;	// This is needed to write to EALLOW protected registers
	PieVectTable.SPIRXINTA = &spiRxFifoIsr;
	PieVectTable.SPITXINTA = &spiTxFifoIsr;
	PieVectTable.SEQ1INT = &adc1_isr;
	PieVectTable.EPWM1_INT = &ePWM1A_compare_isr;
	EDIS;   // This is needed to disable write to EALLOW protected registers
	PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
	PieCtrlRegs.PIEIER6.bit.INTx1 = 1;     // Enable PIE Group 6, INT 1
	PieCtrlRegs.PIEIER6.bit.INTx2 = 1;     // Enable PIE Group 6, INT 2
	PieCtrlRegs.PIEIER1.bit.INTx1 = 1;		 // adc1 (seq1 - pwm)
	PieCtrlRegs.PIEIER3.bit.INTx1 = 1;		 // epwm1
	IER |= 25;                            // Enable CPU INT6
	EINT;                                // Enable Global Interrupts
	ERTM;
	while (1)
	{
		if (AdcRegs.ADCST.bit.INT_SEQ1 == 1) // ADC seq1 interrupt for pwm (at prd)
		{


			flag1 = 1;
			AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;

		}
		if (EPwm1Regs.ETFLG.bit.INT == 1)	// epwm interrupt for pwm of second converter (at prd)
		{


			flag2 = 1;
			EPwm1Regs.ETCLR.bit.INT = 1;
		}
	}
}
Exemplo n.º 3
0
void InitSpiGpio()
{

   InitSpiaGpio();
}
Exemplo n.º 4
0
void init_SPI(void){
	/*****************************************************/
	/*********  SPI  *************************************/
	EALLOW;

		GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 0;
		GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0;
		GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 0;
		GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 0;

		GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;

		GpioCtrlRegs.GPADIR.bit.GPIO9 = 1;
		GpioCtrlRegs.GPADIR.bit.GPIO10 = 1;
		GpioCtrlRegs.GPADIR.bit.GPIO11 = 1;
		GpioCtrlRegs.GPADIR.bit.GPIO22 = 1;

		GpioDataRegs.GPACLEAR.bit.GPIO6 = 1;

		GpioDataRegs.GPASET.bit.GPIO9 = 1;
		GpioDataRegs.GPASET.bit.GPIO10 = 1;
		GpioDataRegs.GPASET.bit.GPIO11 = 1;
		GpioDataRegs.GPASET.bit.GPIO22 = 1;

	EDIS;

	InitSpiaGpio();

	EALLOW;
	// SS for DAC7564
		GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0;  // use GPIO19 for SS
		GpioDataRegs.GPASET.bit.GPIO19 = 1;  // enabled
		GpioCtrlRegs.GPADIR.bit.GPIO19 = 1;  // GPIO19 as output
	EDIS;


	SpiaRegs.SPICCR.bit.SPISWRESET = 0;  // Put SPI in reset

	SpiaRegs.SPICCR.bit.CLKPOLARITY = 0;  // set for LS7366
	SpiaRegs.SPICTL.bit.CLK_PHASE = 1;

	SpiaRegs.SPICCR.bit.SPICHAR = 7;   // set to transmitt 8 bits

	SpiaRegs.SPICTL.bit.MASTER_SLAVE = 1;
	SpiaRegs.SPICTL.bit.TALK = 1;

	SpiaRegs.SPICTL.bit.SPIINTENA = 0;

	SpiaRegs.SPISTS.all=0x0000;

	SpiaRegs.SPIBRR = 39;   // divide by 40 2.5 Mhz

	SpiaRegs.SPIFFTX.bit.SPIRST = 1;
	SpiaRegs.SPIFFTX.bit.SPIFFENA = 1;
	SpiaRegs.SPIFFTX.bit.TXFIFO = 0;
	SpiaRegs.SPIFFTX.bit.TXFFINTCLR = 1;

	SpiaRegs.SPIFFRX.bit.RXFIFORESET = 0;
	SpiaRegs.SPIFFRX.bit.RXFFOVFCLR = 1;
	SpiaRegs.SPIFFRX.bit.RXFFINTCLR = 1;
	SpiaRegs.SPIFFRX.bit.RXFFIL = 5;
	SpiaRegs.SPIFFRX.bit.RXFFIENA = 0;

	SpiaRegs.SPIFFCT.all=0x00;

	SpiaRegs.SPIPRI.bit.FREE = 1;
	SpiaRegs.SPIPRI.bit.SOFT = 0;


	SpiaRegs.SPICCR.bit.SPISWRESET = 1;  // Pull the SPI out of reset

	SpiaRegs.SPIFFTX.bit.TXFIFO=1;
	SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;

	SpiaRegs.SPIFFRX.bit.RXFFIL = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO9 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO22 = 1;
	SpiaRegs.SPITXBUF = ((unsigned)0x20)<<8;  // CLR COUNT all four chips
	while (SpiaRegs.SPIFFRX.bit.RXFFST != 1) {}
	GpioDataRegs.GPASET.bit.GPIO9 = 1;
	GpioDataRegs.GPASET.bit.GPIO10 = 1;
	GpioDataRegs.GPASET.bit.GPIO11 = 1;
	GpioDataRegs.GPASET.bit.GPIO22 = 1;
	SPIbyte1 = SpiaRegs.SPIRXBUF;

	SpiaRegs.SPIFFRX.bit.RXFFIL = 2;
	GpioDataRegs.GPACLEAR.bit.GPIO9 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO22 = 1;
	SpiaRegs.SPITXBUF = ((unsigned)0x88)<<8;  // WR to MDR0
	SpiaRegs.SPITXBUF = ((unsigned)0x83)<<8;
	while (SpiaRegs.SPIFFRX.bit.RXFFST != 2) {}
	GpioDataRegs.GPASET.bit.GPIO9 = 1;
	GpioDataRegs.GPASET.bit.GPIO10 = 1;
	GpioDataRegs.GPASET.bit.GPIO11 = 1;
	GpioDataRegs.GPASET.bit.GPIO22 = 1;
	SPIbyte1 = SpiaRegs.SPIRXBUF;
	SPIbyte2 = SpiaRegs.SPIRXBUF;


	SpiaRegs.SPIFFRX.bit.RXFFIL = 2;
	GpioDataRegs.GPACLEAR.bit.GPIO9 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO10 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO11 = 1;
	GpioDataRegs.GPACLEAR.bit.GPIO22 = 1;
	SpiaRegs.SPITXBUF = ((unsigned)0x90)<<8;  // WR MDR0
	SpiaRegs.SPITXBUF = 0x00<<8;
	while (SpiaRegs.SPIFFRX.bit.RXFFST != 2) {}
	GpioDataRegs.GPASET.bit.GPIO9 = 1;
	GpioDataRegs.GPASET.bit.GPIO10 = 1;
	GpioDataRegs.GPASET.bit.GPIO11 = 1;
	GpioDataRegs.GPASET.bit.GPIO22 = 1;
	SPIbyte1 = SpiaRegs.SPIRXBUF;
	SPIbyte2 = SpiaRegs.SPIRXBUF;


	SpiaRegs.SPICTL.bit.SPIINTENA = 1;
	SpiaRegs.SPIFFRX.bit.RXFFOVFCLR = 1;
	SpiaRegs.SPIFFRX.bit.RXFFINTCLR = 1;
	SpiaRegs.SPIFFRX.bit.RXFFIENA = 1;

/*********  SPI  *************************************/
/*****************************************************/

	// SPI
	PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;   // Acknowledge interrupt to PIE
	PieCtrlRegs.PIEIER6.bit.INTx1 = 1;  //Enable PIE 6.1 interrupt

}
Exemplo n.º 5
0
void main(void)
{
	//Enable peripheral clocks and other things
	//F2837xD_SysCtrl.c
	InitSysCtrl();

    EALLOW;
    GpioCtrlRegs.GPAMUX1.all = 0x00000000;  // All GPIO
    GpioCtrlRegs.GPAMUX2.all = 0x00000000;  // All GPIO
    GpioCtrlRegs.GPBMUX1.all = 0x00000000;  // All GPIO

    GpioCtrlRegs.GPADIR.all = 0xFFFFFFFF;   // All outputs
    GpioCtrlRegs.GPBDIR.all = 0x00001FFF;   // All outputs
    EDIS;

	//InitGpio();
	//initalize GPIO
	InitSpiaGpio();

	DINT;
	InitPieCtrl();

	// Disable CPU __interrupts and clear all CPU __interrupt flags:
	IER = 0x0000;
	IFR = 0x0000;

	InitPieVectTable();

	EALLOW; //This is needed to write to EALLOW protected registers
	ClkCfgRegs.LOSPCP.bit.LSPCLKDIV = 0x5; //LSPCLK (200 Mhz)/10


	//-----------------------------------------------------------------------------------
	//Instantiate CPU timer control
	//CPU timer interrupt services in prototype phase
	EALLOW;
	PieVectTable.TIMER0_INT = &cpu_timer0_isr;
	PieVectTable.TIMER1_INT = &cpu_timer1_isr;
	PieVectTable.TIMER2_INT = &cpu_timer2_isr;
	EDIS; //This is needed to disable write to EALLOW protected registers

	InitCpuTimers();

    // Configure CPU-Timer 0, 1, and 2 to interrupt every second:
    // 200MHz CPU Freq, 1 second Period (in uSeconds)
	ConfigCpuTimer(&CpuTimer0, 200, 100000);
    ConfigCpuTimer(&CpuTimer1, 200, 10000000);
    ConfigCpuTimer(&CpuTimer2, 200, 1000000);

    // To ensure precise timing, use write-only instructions to write to the entire register. Therefore, if any
    // of the configuration bits are changed in ConfigCpuTimer and InitCpuTimers (in F2837xD_cputimervars.h), the
    // below settings must also be updated.
	CpuTimer0Regs.TCR.all = 0x4000; // Use write-only instruction to set TSS bit = 0
    CpuTimer1Regs.TCR.all = 0x4000; // Use write-only instruction to set TSS bit = 0
    CpuTimer2Regs.TCR.all = 0x4000; // Use write-only instruction to set TSS bit = 0

    // Enable CPU int1 which is connected to CPU-Timer 0, CPU int13
    // which is connected to CPU-Timer 1, and CPU int 14, which is connected
    // to CPU-Timer 2:
	IER |= M_INT1;
    IER |= M_INT13;
    IER |= M_INT14;

    // Enable TINT0 in the PIE: Group 1 interrupt 7
    PieCtrlRegs.PIEIER1.bit.INTx7 = 1;

    // Enable global Interrupts and higher priority real-time debug events:
    EINT; // Enable Global interrupt INTM
    ERTM; // Enable Global realtime interrupt DBGM
	//Enable interrupts

    //End CPU timer configuration
	//-----------------------------------------------------------------------------------

    spi_init();
	spi_fifo();
	output_high();
	DELAY_US(1000000);
	LTC_wakeup();

	/*
	//LTC ADCV read voltage functions here ---
	//Note: Additional ADC readings may be possible i.e Sum of Measurement cells,
	LTC_refon_set();
	LTC_ADC_clear();
	//LTC_ADC_conversion();
	//----------------------------------------

	//need to somehow clear receive buffer
	SpiaRegs.SPIFFRX.bit.RXFFOVFCLR = 1;

	//LTC_read_voltages_123();
	//LTC_read_voltages_456();
	//LTC_read_voltages_789();
	//LTC_read_voltages_10_11_12();

	//LTC_UVOV_get_flags();

	//ready_rxbuf();
	//read_voltage_from_receive_buffer();
	//receive_all_data();
	//LTC_read_UVOV_flags();
	//read_voltage_from_receive_buffer();

	//Uint16 checker[6] = {rdata[0], rdata[1], rdata[2], rdata[3], rdata[4], rdata[5]};
	//Uint16 PEC_check = LTC_pec_calc(checker, 6);
	*/
	//------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
	for(;;) //infinite loop
	{
		//incorporate a regular LTC_wakeup procedure (< 2.0 seconds)
		//incorporate a regular LTC pulse signal (< 1.5 seconds)
		//It is important to regularly pulse wake up and pulse signals to the
		//LTC6804-2 and LTC3300 boards so that the Watchdog Timer does not expire
		//LTC6804-2 ADC reference ON
		//LTC3300 72 pulse cycle of an execute command repeatedly operating
	}
}
Exemplo n.º 6
0
void SPI_Init() {
	InitSpiaGpio();
	InitSPIConfig();
}