Exemplo n.º 1
0
PVRSRV_ERROR SysCreateConfigData(PVRSRV_SYSTEM_CONFIG **ppsSysConfig)
{
	PLAT_DATA *psPlatData;
	PVRSRV_ERROR eError;

	psPlatData = OSAllocMem(sizeof(PLAT_DATA));
	OSMemSet(psPlatData, 0, sizeof(PLAT_DATA));

	/* Query the Emu for reg and IRQ information */
	eError = PCIInitDev(psPlatData);
	if (eError != PVRSRV_OK)
	{
		goto e0;
	}

	/* Save data for this device */
	sSysConfig.pasDevices[0].hSysData = (IMG_HANDLE) psPlatData;

#if defined (LMA)
	/* Save private data for the physical memory heaps */
	gsPhysHeapConfig[0].hPrivData = (IMG_HANDLE) psPlatData;
	gsPhysHeapConfig[1].hPrivData = (IMG_HANDLE) psPlatData;
#endif
	*ppsSysConfig = &sSysConfig;

	/* Ion is only supported on UMA builds */
#if (defined(SUPPORT_ION) && (!defined(LMA)))
	IonInit(NULL);
#endif

	gpsPlatData = psPlatData;
	return PVRSRV_OK;
e0:
	return eError;
}
PVRSRV_ERROR SysCreateConfigData(PVRSRV_SYSTEM_CONFIG **ppsSysConfig, void *hDevice)
{
	PLAT_DATA *psPlatData;
	PVRSRV_ERROR eError;

	PVR_UNREFERENCED_PARAMETER(hDevice);

	psPlatData = OSAllocZMem(sizeof(*psPlatData));

	/* Query the Emu for reg and IRQ information */
	eError = PCIInitDev(psPlatData);
	if (eError != PVRSRV_OK)
	{
		goto e0;
	}

	/* Save data for this device */
	sSysConfig.pasDevices[0].hSysData = (IMG_HANDLE) psPlatData;

	/* Save private data for the physical memory heap */
	gsPhysHeapConfig[0].hPrivData = (IMG_HANDLE) psPlatData;

#if defined(TDMETACODE)
	#error "Not supported services/3rdparty/intel_drm/sysconfig.c"
	gsPhysHeapConfig[1].hPrivData = IMG_NULL;
#endif

	*ppsSysConfig = &sSysConfig;

	gpsPlatData = psPlatData;


	/* Setup other system specific stuff */
#if defined(SUPPORT_ION)
	IonInit(NULL);
#endif

	return PVRSRV_OK;
e0:
	return eError;
}
Exemplo n.º 3
0
/*
	SysCreateConfigData
*/
PVRSRV_ERROR SysCreateConfigData(PVRSRV_SYSTEM_CONFIG **ppsSysConfig)
{
    /* Sunxi Init */
    RgxSunxiInit();

    /*
     * Setup information about physical memory heap(s) we have
     */
    gsPhysHeapFuncs.pfnCpuPAddrToDevPAddr = UMAPhysHeapCpuPAddrToDevPAddr;
    gsPhysHeapFuncs.pfnDevPAddrToCpuPAddr = UMAPhysHeapDevPAddrToCpuPAddr;

    gsPhysHeapConfig[0].ui32PhysHeapID = 0;
    gsPhysHeapConfig[0].pszPDumpMemspaceName = "SYSMEM";
    gsPhysHeapConfig[0].eType = PHYS_HEAP_TYPE_UMA;
    gsPhysHeapConfig[0].psMemFuncs = &gsPhysHeapFuncs;
    gsPhysHeapConfig[0].hPrivData = IMG_NULL;

#if defined(TDMETACODE)
    gsPhysHeapConfig[1].ui32PhysHeapID = 1;
    gsPhysHeapConfig[1].pszPDumpMemspaceName = "TDMETACODEMEM";
    gsPhysHeapConfig[1].eType = PHYS_HEAP_TYPE_UMA;
    gsPhysHeapConfig[1].psMemFuncs = &gsPhysHeapFuncs;
    gsPhysHeapConfig[1].hPrivData = IMG_NULL;

    gsPhysHeapConfig[2].ui32PhysHeapID = 2;
    gsPhysHeapConfig[2].pszPDumpMemspaceName = "TDSECUREBUFMEM";
    gsPhysHeapConfig[2].eType = PHYS_HEAP_TYPE_UMA;
    gsPhysHeapConfig[2].psMemFuncs = &gsPhysHeapFuncs;
    gsPhysHeapConfig[2].hPrivData = IMG_NULL;
#endif

    gsSysConfig.pasPhysHeaps = &(gsPhysHeapConfig[0]);
    gsSysConfig.ui32PhysHeapCount = IMG_ARR_NUM_ELEMS(gsPhysHeapConfig);

    gsSysConfig.pui32BIFTilingHeapConfigs = gauiBIFTilingHeapXStrides;
    gsSysConfig.ui32BIFTilingHeapCount = IMG_ARR_NUM_ELEMS(gauiBIFTilingHeapXStrides);

    /*
     * Setup RGX specific timing data
     */
    gsRGXTimingInfo.ui32CoreClockSpeed        = RGX_SUNXI_CORE_CLOCK_SPEED;
    gsRGXTimingInfo.bEnableActivePM           = IMG_TRUE;
    gsRGXTimingInfo.bEnableRDPowIsland        = IMG_TRUE;
    gsRGXTimingInfo.ui32ActivePMLatencyms     = SYS_RGX_ACTIVE_POWER_LATENCY_MS;

    /*
     *Setup RGX specific data
     */
    gsRGXData.psRGXTimingInfo = &gsRGXTimingInfo;
#if defined(TDMETACODE)
    gsRGXData.bHasTDMetaCodePhysHeap = IMG_TRUE;
    gsRGXData.uiTDMetaCodePhysHeapID = 1;

    gsRGXData.bHasTDSecureBufPhysHeap = IMG_TRUE;
    gsRGXData.uiTDSecureBufPhysHeapID = 2;
#endif

    /*
     * Setup RGX device
     */
    gsDevices[0].eDeviceType            = PVRSRV_DEVICE_TYPE_RGX;
    gsDevices[0].pszName                = "RGX";

    /* Device setup information */
    gsDevices[0].sRegsCpuPBase.uiAddr   = SUNXI_GPU_PBASE;
    gsDevices[0].ui32RegsSize           = SUNXI_GPU_SIZE;
    gsDevices[0].ui32IRQ                = SUNXI_IRQ_GPU;
    gsDevices[0].bIRQIsShared           = IMG_FALSE;

    /* Device's physical heap IDs */
    gsDevices[0].aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_GPU_LOCAL] = 0;
    gsDevices[0].aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_CPU_LOCAL] = 0;

    /* Power management on SUNXI system */
    gsDevices[0].pfnPrePowerState       = AwPrePowerState;
    gsDevices[0].pfnPostPowerState      = AwPostPowerState;

    /* No clock frequency either */
    gsDevices[0].pfnClockFreqGet        = NULL;

    /* No interrupt handled either */
    gsDevices[0].pfnInterruptHandled    = IMG_NULL;

    gsDevices[0].pfnCheckMemAllocSize   = SysCheckMemAllocSize;

    gsDevices[0].hDevData               = &gsRGXData;

    /*
     * Setup system config
     */
    gsSysConfig.pszSystemName = RGX_SUNXI_SYSTEM_NAME;
    gsSysConfig.uiDeviceCount = sizeof(gsDevices)/sizeof(gsDevices[0]);
    gsSysConfig.pasDevices = &gsDevices[0];

    /* Power management on no SUNXI system */
    gsSysConfig.pfnSysPrePowerState = AwSysPrePowerState;
    gsSysConfig.pfnSysPostPowerState = AwSysPostPowerState;

    /* no cache snooping */
    gsSysConfig.eCacheSnoopingMode = PVRSRV_SYSTEM_SNOOP_NONE;

    /* Setup other system specific stuff */
#if defined(SUPPORT_ION)
    IonInit(NULL);
#endif

    *ppsSysConfig = &gsSysConfig;

    return PVRSRV_OK;
}