static int GGIopen(struct ggi_visual *vis, struct ggi_dlhandle *dlh, const char *args, void *argptr, uint32_t *dlret) { ggi_accel_t *accel; accel = KGI_PRIV(vis)->map_accel(vis, 1, 0, MACH64_BUFFER_SIZE_ORDER, MACH64_BUFFER_NUM, 0); if(!accel) return GGI_ENODEVICE; KGI_ACCEL_PRIV(vis) = accel; vis->opdisplay->flush = GGI_kgi_mach64_flush; /*vis->opdraw->setreadframe = _ggi_default_setreadframe;*/ /*vis->opdraw->setwriteframe = _ggi_default_setwriteframe;*/ /* Generic drawing */ /*vis->opdraw->putc = _ggi_default_putc;*/ /*vis->opdraw->drawpixel_nc = _ggi_default_drawpixel_nc;*/ /*vis->opdraw->drawpixel = _ggi_default_drawpixel;*/ /*vis->opdraw->putpixel_nc = _ggi_default_putpixel_nc;*/ /*vis->opdraw->putpixel = _ggi_default_putpixel;*/ /*vis->opdraw->getpixel_nc = _ggi_default_getpixel_nc;*/ /*vis->opdraw->getpixel = _ggi_default_getpixel;*/ vis->opdraw->drawhline_nc = GGI_kgi_mach64_drawhline; vis->opdraw->drawhline = GGI_kgi_mach64_drawhline; /*vis->opdraw->puthline = _ggi_default_puthline;*/ /*vis->opdraw->gethline = _ggi_default_gethline;*/ vis->opdraw->drawvline_nc = GGI_kgi_mach64_drawvline; vis->opdraw->drawvline = GGI_kgi_mach64_drawvline; /*vis->opdraw->putvline = _ggi_default_putvline;*/ /*vis->opdraw->getvline = _ggi_default_getvline;*/ vis->opdraw->drawline = GGI_kgi_mach64_drawline; vis->opdraw->drawbox = GGI_kgi_mach64_drawbox; /*vis->opdraw->putbox = _ggi_default_putbox;*/ vis->opdraw->copybox = GGI_kgi_mach64_copybox; /*vis->opdraw->crossblit = _ggi_default_crossblit;*/ vis->opgc->gcchanged = GGI_kgi_mach64_gcchanged; *dlret = GGI_DL_OPDRAW | GGI_DL_OPGC; return 0; }
int GGI_kgi_setPalette(struct ggi_visual *vis, size_t start, size_t len, const ggi_color *colormap) { kgic_ilut_set_request_t ilut; size_t nocols = 1 << GT_DEPTH(LIBGGI_GT(vis)); APP_ASSERT(colormap != NULL, "GGI_kgi_setPalette() - colormap == NULL"); DPRINT_COLOR("display-kgi: SetPalVec(%d,%d)\n", start, len); if (start == (size_t)GGI_PALETTE_DONTCARE) { start = 0; } if ((start < 0) || (len < 0) || (start+len > nocols)) { return GGI_ENOSPACE; } memcpy(LIBGGI_PAL(vis)->clut.data, colormap, len*sizeof(ggi_color)); ilut.image = 0; ilut.resource = 0; ilut.lut = 0; ilut.idx = start; ilut.cnt = len; ilut.am = KGI_AM_COLORS; ilut.data = (kgi_u16_t *)KGI_PRIV(vis); for (start = 0; len > 0; start++, colormap++, len--) { ilut.data[start*3] = colormap->r; ilut.data[start*3 + 1] = colormap->g; ilut.data[start*3 + 2] = colormap->b; } if(kgiSetIlut(&KGI_CTX(vis), &ilut) != KGI_EOK) { DPRINT_COLOR("display-kgi: PUTCMAP failed."); return -1; } return 0; }
int GGI_kgi_radeon_putvline_3d(ggi_visual *vis, int x, int y, int h, const void *buf) { int wb, w32; radeon_context_t *ctx; struct { cce_type3_header_t h; cce_se_se_vtx_fmt_t vfmt; cce_se_se_vf_cntl_t vctl; /* TODO: this wrongly assumes float is 32 bit everywhere. */ float v1x, v1y, v1s, v1t; /* v1z; */ float v2x, v2y, v2s, v2t; /* v2z; */ float v3x, v3y, v3s, v3t; /* v3z; */ } packet; struct { cce_type0_header_t h; uint32_t txoffset; } offsetpkt; ctx = RADEON_CONTEXT(vis); wb = GT_ByPP(LIBGGI_GT(vis)) * h; w32 = ((wb + 31) / 32) * 32; if (ctx->ctx_loaded != RADEON_PUT_CTX) { ctx->put_ctx.tex_size.usize = w32 / GT_ByPP(LIBGGI_GT(vis)); ctx->put_ctx.tex_size.vsize = 1; ctx->put_ctx.txpitch.txpitch = (w32/32) - 1; RADEON_RESTORE_CTX(vis, RADEON_PUT_CTX); } else { struct { cce_type0_header_t h; pp_tex_size_t tex_size; pp_txpitch_t txpitch; } packet2; memset(&packet2, 0, sizeof(packet2)); packet2.h.base_index = PP_TEX_SIZE_1 >> 2; packet2.h.count = 1; packet2.tex_size.usize = w32 / GT_ByPP(LIBGGI_GT(vis)); packet2.tex_size.vsize = 1; packet2.txpitch.txpitch = (w32/32) - 1; RADEON_RESTORE_CTX(vis, RADEON_BASE_CTX); RADEON_WRITEPACKET(vis, packet2); ctx->ctx_loaded = RADEON_PUT_CTX; } memset(&packet, 0, sizeof(packet)); packet.h.it_opcode = CCE_IT_OPCODE_3D_DRAW_IMMD; packet.h.count = 13; packet.h.type = 3; packet.vfmt.st0 = 1; packet.vfmt.z = 0 /* 1 */; packet.vctl.num_vertices = 3; packet.vctl.en_maos = 1; packet.vctl.fmt_mode = 1; packet.vctl.prim_walk = 3; /* Vertex data follows in packet. */ packet.vctl.prim_type = 8; /* Rectangle list */ packet.v1x = packet.v3x = x; packet.v2x = x + 1; packet.v1y = packet.v2y = y; packet.v3y = y + h; packet.v1s = packet.v2s = 0; packet.v3s = h; packet.v1t = packet.v3t = 1; packet.v2t = 0; memset(&offsetpkt, 0, sizeof(offsetpkt)); offsetpkt.h.base_index = PP_TXOFFSET_1 >> 2; if ((KGI_PRIV(vis)->swatch_size - ctx->swatch_inuse) < w32) { /* idleaccel */ ctx->swatch_inuse = 0; } offsetpkt.txoffset = (uint32_t)KGI_PRIV(vis)->swatch_gp + ctx->swatch_inuse; RADEON_WRITEPACKET(vis, offsetpkt); memcpy(KGI_PRIV(vis)->swatch + ctx->swatch_inuse, (char *)buf, wb); RADEON_WRITEPACKET(vis, packet); if (!(LIBGGI_FLAGS(vis) & GGIFLAG_ASYNC)) RADEON_FLUSH(vis); return 0; }
static int GGIopen(ggi_visual *vis, struct ggi_dlhandle *dlh, const char *args, void *argptr, uint32_t *dlret) { ggi_accel_t *accel; Gx00_context_t *ctx; /* NB: The accel engine is resource 2 (1 is the ILOAD aperture, ** 0 the framebuffer) */ if (!(accel = KGI_PRIV(vis)->map_accel(vis, 2, 0, GX00_BUFFER_SIZE_ORDER, GX00_BUFFER_NUM, 0))) return GGI_ENODEVICE; if (!(ctx = (Gx00_context_t*)malloc(sizeof(*ctx)))) return GGI_ENOMEM; /* setup the accel_priv data structures */ KGI_ACCEL_PRIV(vis) = ctx; memset(ctx, 0, sizeof(*ctx)); ctx->accel = accel; ctx->hwgc_mask = 0; /* TODO: Should use -1 instead? */ /* setup the DMA buffers */ GX00_INIT(vis); /* Initializes the pitch */ GX00_WRITE_REG(vis, LIBGGI_VIRTX(vis), PITCH); /* Initializes the MACCESS fields */ { uint32_t maccess = MACCESS_ZWIDTH_ZW16; /* NB: no fogging */ switch (GT_ByPP(LIBGGI_GT(vis))) { case 1: maccess |= MACCESS_PWIDTH_PW8; break; case 2: maccess |= MACCESS_PWIDTH_PW16; if (LIBGGI_GT(vis) == GT_15BIT) maccess |= MACCESS_DIT555; /* else: GT_16BIT */ break; case 4: maccess |= MACCESS_PWIDTH_PW32; break; case 3: maccess |= MACCESS_PWIDTH_PW24; break; default: ggiPanic("Unknown depth size!"); break; } /* TODO: check? -- ortalo: maccess |= MACCESS_NODITHER; */ GX00_WRITE_REG(vis, maccess, MACCESS); } /* Initializes the destination origin */ GX00_WRITE_REG(vis, 0x0, DSTORG); /* Initializes the old-style destination origin */ GX00_WRITE_REG(vis, 0x0, YDSTORG); /* Initializes the plane mask */ GX00_WRITE_REG(vis, 0xFFFFFFFF, PLNWT); #if 0 /* Maybe not needed? TODO: Check in libggi if clipping is initialized */ /* Initializes the clipping to max */ GX00_WRITE_REG(vis, 0 | (((LIBGGI_X(vis) - 1) << CXBNDRY_CXRIGHT_SHIFT) & CXBNDRY_CXRIGHT_MASK), CXBNDRY); GX00_WRITE_REG(vis, 0, YTOP); GX00_WRITE_REG(vis, (LIBGGI_Y(vis) - 1) * LIBGGI_VIRTX(vis), YBOT); #endif vis->opdisplay->idleaccel = GGI_kgi_Gx00_idleaccel; vis->opdisplay->flush = GGI_kgi_Gx00_flush; vis->opgc->gcchanged = GGI_kgi_Gx00_gcchanged; vis->opdraw->drawhline_nc = GGI_kgi_Gx00_drawhline_nc; vis->opdraw->drawhline = GGI_kgi_Gx00_drawhline; vis->opdraw->drawvline_nc = GGI_kgi_Gx00_drawvline_nc; vis->opdraw->drawvline = GGI_kgi_Gx00_drawvline; vis->opdraw->drawbox = GGI_kgi_Gx00_drawbox; vis->opdraw->fillscreen = GGI_kgi_Gx00_fillscreen; vis->opdraw->drawline = GGI_kgi_Gx00_drawline; vis->opdraw->copybox = GGI_kgi_Gx00_copybox; /* bugs on the G400 */ vis->opdraw->getcharsize = GGI_kgi_Gx00_getcharsize; vis->opdraw->putc = GGI_kgi_Gx00_putc; /* The generic puts uses putc, so... vis->opdraw->puts = GGI_kgi_Gx00_puts; */ vis->needidleaccel = 1; vis->accelactive = 0; *dlret = GGI_DL_OPDRAW | GGI_DL_OPGC; return 0; }