static void decode_mc1_mce(struct mce *m) { u16 ec = EC(m->status); u8 xec = XEC(m->status, xec_mask); pr_emerg(HW_ERR "MC1 Error: "); if (TLB_ERROR(ec)) pr_cont("%s TLB %s.\n", LL_MSG(ec), (xec ? "multimatch" : "parity error")); else if (BUS_ERROR(ec)) { bool k8 = (boot_cpu_data.x86 == 0xf && (m->status & BIT_64(58))); pr_cont("during %s.\n", (k8 ? "system linefill" : "NB data read")); } else if (INT_ERROR(ec)) { if (xec <= 0x3f) pr_cont("Hardware Assert.\n"); else goto wrong_mc1_mce; } else if (fam_ops->mc1_mce(ec, xec)) ; else goto wrong_mc1_mce; return; wrong_mc1_mce: pr_emerg(HW_ERR "Corrupted MC1 MCE info?\n"); }
static inline void amd_decode_err_code(u16 ec) { pr_emerg(HW_ERR "cache level: %s", LL_MSG(ec)); if (BUS_ERROR(ec)) pr_cont(", mem/io: %s", II_MSG(ec)); else pr_cont(", tx: %s", TT_MSG(ec)); if (MEM_ERROR(ec) || BUS_ERROR(ec)) { pr_cont(", mem-tx: %s", R4_MSG(ec)); if (BUS_ERROR(ec)) pr_cont(", part-proc: %s (%s)", PP_MSG(ec), TO_MSG(ec)); } pr_cont("\n"); }
static void amd_decode_ic_mce(struct mce *m) { u16 ec = EC(m->status); u8 xec = XEC(m->status, xec_mask); pr_emerg(HW_ERR "Instruction Cache Error: "); if (TLB_ERROR(ec)) pr_cont("%s TLB %s.\n", LL_MSG(ec), (xec ? "multimatch" : "parity error")); else if (BUS_ERROR(ec)) { bool k8 = (boot_cpu_data.x86 == 0xf && (m->status & BIT_64(58))); pr_cont("during %s.\n", (k8 ? "system linefill" : "NB data read")); } else if (fam_ops->ic_mce(ec, xec)) ; else pr_emerg(HW_ERR "Corrupted IC MCE info?\n"); }
static void decode_mc0_mce(struct mce *m) { u16 ec = EC(m->status); u8 xec = XEC(m->status, xec_mask); pr_emerg(HW_ERR "MC0 Error: "); /* TLB error signatures are the same across families */ if (TLB_ERROR(ec)) { if (TT(ec) == TT_DATA) { pr_cont("%s TLB %s.\n", LL_MSG(ec), ((xec == 2) ? "locked miss" : (xec ? "multimatch" : "parity"))); return; } } else if (fam_ops->mc0_mce(ec, xec)) ; else pr_emerg(HW_ERR "Corrupted MC0 MCE info?\n"); }
static void amd_decode_dc_mce(struct mce *m) { u16 ec = EC(m->status); u8 xec = XEC(m->status, xec_mask); pr_emerg(HW_ERR "Data Cache Error: "); if (TLB_ERROR(ec)) { if (TT(ec) == TT_DATA) { pr_cont("%s TLB %s.\n", LL_MSG(ec), ((xec == 2) ? "locked miss" : (xec ? "multimatch" : "parity"))); return; } } else if (fam_ops->dc_mce(ec, xec)) ; else pr_emerg(HW_ERR "Corrupted DC MCE info?\n"); }