static int uart_stm32_poll_in(struct device *dev, unsigned char *c)
{
USART_TypeDef *UartInstance = UART_STRUCT(dev);
/* Clear overrun error flag */
if (LL_USART_IsActiveFlag_ORE(UartInstance)) {
LL_USART_ClearFlag_ORE(UartInstance);
}
if (!LL_USART_IsActiveFlag_RXNE(UartInstance)) {
return -1;
}
*c = (unsigned char)LL_USART_ReceiveData8(UartInstance);
return 0;
}
static int uart_stm32_fifo_read(struct device *dev, u8_t *rx_data,
const int size)
{
USART_TypeDef *UartInstance = UART_STRUCT(dev);
u8_t num_rx = 0U;
while ((size - num_rx > 0) &&
LL_USART_IsActiveFlag_RXNE(UartInstance)) {
/* RXNE flag will be cleared upon read from DR|RDR register */
/* Receive a character (8bit , parity none) */
rx_data[num_rx++] = LL_USART_ReceiveData8(UartInstance);
/* Clear overrun error flag */
if (LL_USART_IsActiveFlag_ORE(UartInstance)) {
LL_USART_ClearFlag_ORE(UartInstance);
}
}
return num_rx;
}
static int uart_stm32_err_check(struct device *dev)
{
USART_TypeDef *UartInstance = UART_STRUCT(dev);
u32_t err = 0U;
/* Check for errors, but don't clear them here.
* Some SoC clear all error flags when at least
* one is cleared. (e.g. F4X, F1X, and F2X)
*/
if (LL_USART_IsActiveFlag_ORE(UartInstance)) {
err |= UART_ERROR_OVERRUN;
}
if (LL_USART_IsActiveFlag_PE(UartInstance)) {
err |= UART_ERROR_PARITY;
}
if (LL_USART_IsActiveFlag_FE(UartInstance)) {
err |= UART_ERROR_FRAMING;
}
if (err & UART_ERROR_OVERRUN) {
LL_USART_ClearFlag_ORE(UartInstance);
}
if (err & UART_ERROR_PARITY) {
LL_USART_ClearFlag_PE(UartInstance);
}
if (err & UART_ERROR_FRAMING) {
LL_USART_ClearFlag_FE(UartInstance);
}
/* Clear noise error as well,
* it is not represented by the errors enum
*/
LL_USART_ClearFlag_NE(UartInstance);
return err;
}
void MX_USART6_UART_Init(void) {
LL_USART_InitTypeDef USART_InitStruct;
LL_GPIO_InitTypeDef GPIO_InitStruct;
/* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART6);
//! PA11 ------> USART6_TX
//! PA12 ------> USART6_RX
GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
USART_InitStruct.BaudRate = 115200;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
USART_InitStruct.Parity = LL_USART_PARITY_NONE;
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
LL_USART_Init(USART6, &USART_InitStruct);
LL_USART_ConfigAsyncMode(USART6);
NVIC_SetPriority(USART6_IRQn, 0);
NVIC_EnableIRQ(USART6_IRQn);
memset((void*)rx_buffer, 0, RX_BUFFER_SIZE);
LL_USART_ClearFlag_ORE(USART6);
LL_USART_EnableIT_RXNE(USART6);
LL_USART_Enable(USART6);
}
