Exemplo n.º 1
0
static void mcsdl_select_isp_mode(UINT8 ucMode)
{
	int    i;

	UINT8 enteringCodeMassErase[16]   = { 0,1,0,1,1,0,0,1,1,1,1,1,0,0,1,1 };
	UINT8 enteringCodeSerialWrite[16] = { 0,1,1,0,0,0,1,0,1,1,0,0,1,1,0,1 };
	UINT8 enteringCodeSerialRead[16]  = { 0,1,1,0,1,0,1,0,1,1,0,0,1,0,0,1 };
	UINT8 enteringCodeNextChipBypass[16]  = { 1,1,0,1,1,0,0,1,0,0,1,0,1,1,0,1 };

	UINT8 *pCode;


	//------------------------------------
	// Entering ISP mode : Part 1
	//------------------------------------

		 if( ucMode == ISP_MODE_ERASE_FLASH       ) pCode = enteringCodeMassErase;
	else if( ucMode == ISP_MODE_SERIAL_WRITE      ) pCode = enteringCodeSerialWrite;
	else if( ucMode == ISP_MODE_SERIAL_READ       ) pCode = enteringCodeSerialRead;
    else if( ucMode == ISP_MODE_NEXT_CHIP_BYPASS  ) pCode = enteringCodeNextChipBypass;

	for(i=0; i<16; i++){

		if( pCode[i] == 1 )	
            MCSDL_RESETB_SET_HIGH();
		else			
            MCSDL_RESETB_SET_LOW();

//start add delay for INT 
        mcsdl_delay(MCSDL_DELAY_3US);        
//end delay for INT 

		MCSDL_GPIO_SCL_SET_HIGH();	mcsdl_delay(MCSDL_DELAY_3US);
		MCSDL_GPIO_SCL_SET_LOW();	mcsdl_delay(MCSDL_DELAY_3US);
		

   }
	if(ucMode == ISP_MODE_NEXT_CHIP_BYPASS)
		MCSDL_RESETB_SET_LOW();			// High
	else
		MCSDL_RESETB_SET_HIGH();	
	
	//---------------------------------------------------
	// Entering ISP mode : Part 2	- Only Mass Erase
	//---------------------------------------------------

	 if( ucMode == ISP_MODE_ERASE_FLASH   ){
        mcsdl_delay(MCSDL_DELAY_7US);
		for(i=0; i<4; i++){

				 if( i==2 ) mcsdl_delay(MCSDL_DELAY_25MS);
			else if( i==3 ) mcsdl_delay(MCSDL_DELAY_150US);

			MCSDL_GPIO_SCL_SET_HIGH();	mcsdl_delay(MCSDL_DELAY_3US);
			MCSDL_GPIO_SCL_SET_LOW();	mcsdl_delay(MCSDL_DELAY_7US);
		}
	}
}
Exemplo n.º 2
0
static void mcsdl_reboot_mcs(void)
{
	//--------------------------------------------
	// Tkey module reset
	//--------------------------------------------

	MCSDL_VDD_SET_LOW();

	//MCSDL_CE_SET_LOW();
	//MCSDL_CE_SET_OUTPUT();

	MCSDL_GPIO_SDA_SET_HIGH();
	MCSDL_GPIO_SDA_SET_OUTPUT(1);

	MCSDL_GPIO_SCL_SET_HIGH();
	MCSDL_GPIO_SCL_SET_OUTPUT(1);

	//MCSDL_SET_HW_I2C();

	MCSDL_RESETB_SET_LOW();
	MCSDL_RESETB_SET_OUTPUT(1);

	mcsdl_delay(MCSDL_DELAY_25MS);						// Delay for Stable VDD

	MCSDL_VDD_SET_HIGH();

	MCSDL_RESETB_SET_HIGH();
    MCSDL_RESETB_SET_INPUT();
    MCSDL_GPIO_SCL_SET_INPUT();
    MCSDL_GPIO_SDA_SET_INPUT();

    mcsdl_delay(MCSDL_DELAY_30MS); 						// Delay '25 msec'
}
Exemplo n.º 3
0
/* function added for TSP fix*/
static void mcsdl_reboot_mcs(void)
{
    MCSDL_VDD_SET_LOW();
    //MCSDL_CE_SET_LOW();
    //MCSDL_CE_SET_OUTPUT();

    MCSDL_GPIO_SDA_SET_HIGH();
    MCSDL_GPIO_SDA_SET_OUTPUT(1);

    MCSDL_GPIO_SCL_SET_HIGH();
    MCSDL_GPIO_SCL_SET_OUTPUT(1);

    MCSDL_RESETB_SET_LOW();
    MCSDL_RESETB_SET_OUTPUT(1);

    mcsdl_delay(MCSDL_DELAY_400MS);      // Delay for Stable VDD

    MCSDL_VDD_SET_HIGH();
    //MCSDL_CE_SET_HIGH();

    MCSDL_RESETB_SET_HIGH();
    MCSDL_RESETB_SET_ALT();
    MCSDL_GPIO_SCL_SET_ALT();
    MCSDL_GPIO_SDA_SET_ALT();

    mcsdl_delay(MCSDL_DELAY_30MS);       // Delay '25 msec'
}
static void mcsdl_reboot_mcs(void)
{
    MCSDL_VDD_SET_LOW();

    MCSDL_CE_SET_LOW();
    MCSDL_CE_SET_OUTPUT(0);

    MCSDL_GPIO_SDA_SET_HIGH();
    MCSDL_GPIO_SDA_SET_OUTPUT(1);

    MCSDL_GPIO_SCL_SET_HIGH();
    MCSDL_GPIO_SCL_SET_OUTPUT(1);

    MCSDL_RESETB_SET_LOW();
    MCSDL_RESETB_SET_OUTPUT(0);

    mcsdl_delay(MCSDL_DELAY_25MS);                                          /* Delay for Stable VDD */

    MCSDL_VDD_SET_HIGH();
    /*MCSDL_CE_SET_HIGH();*/

    MCSDL_RESETB_SET_HIGH();
    MCSDL_RESETB_SET_INPUT();
    MCSDL_GPIO_SCL_SET_INPUT();
    MCSDL_GPIO_SDA_SET_INPUT();

    mcsdl_delay(MCSDL_DELAY_30MS);                                          /* Delay '25 msec' */
}
Exemplo n.º 5
0
static void mcsdl_reboot_mcs(void)
{
	//--------------------------------------------
	// Tkey module reset
	//--------------------------------------------
	gpio_tlmm_config(GPIO_CFG(GPIO_I2C0_SCL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_16MA),GPIO_CFG_ENABLE);
	gpio_tlmm_config(GPIO_CFG(GPIO_I2C0_SDA, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_16MA),GPIO_CFG_ENABLE);
	MCSDL_RESETB_SET_LOW();
	MCSDL_RESETB_SET_OUTPUT();

	mcsdl_vdd_off();
	gpio_set_value(GPIO_I2C0_SCL, 0);  // TOUCH SCL DIS
	gpio_set_value(GPIO_I2C0_SDA, 0);  // TOUCH SDA DIS
	msleep(300);

	gpio_tlmm_config(GPIO_CFG(GPIO_I2C0_SCL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_16MA),GPIO_CFG_ENABLE);
	gpio_tlmm_config(GPIO_CFG(GPIO_I2C0_SDA, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_16MA),GPIO_CFG_ENABLE);
	MCSDL_RESETB_SET_INPUT();
	MCSDL_RESETB_SET_HIGH();
	gpio_set_value(GPIO_I2C0_SCL, 1);  // TOUCH SCL EN
	gpio_set_value(GPIO_I2C0_SDA, 1);  // TOUCH SDA EN   

	mcsdl_vdd_on();
 
	msleep(300);	
/*
	MCSDL_VDD_SET_LOW();

	//MCSDL_CE_SET_LOW();
	//MCSDL_CE_SET_OUTPUT();

	MCSDL_GPIO_SDA_SET_HIGH();
	MCSDL_GPIO_SDA_SET_OUTPUT();

	MCSDL_GPIO_SCL_SET_HIGH();
	MCSDL_GPIO_SCL_SET_OUTPUT();

	//MCSDL_SET_HW_I2C();

	MCSDL_RESETB_SET_LOW();
	MCSDL_RESETB_SET_OUTPUT();

	mcsdl_delay(MCSDL_DELAY_25MS);						// Delay for Stable VDD

	MCSDL_RESETB_SET_INPUT();
	MCSDL_VDD_SET_HIGH();

	MCSDL_RESETB_SET_HIGH();
	//MCSDL_CE_SET_HIGH();

	mcsdl_delay(MCSDL_DELAY_30MS); 						// Delay '25 msec'
*/
}
static void mcsdl_reboot_mcs(void)
{
	//--------------------------------------------
	// Tkey module reset
	//--------------------------------------------

	MCSDL_VDD_SET_LOW();

	//MCSDL_CE_SET_LOW();
	//MCSDL_CE_SET_OUTPUT();

	MCSDL_GPIO_SDA_SET_HIGH();
	MCSDL_GPIO_SDA_SET_OUTPUT();

	MCSDL_GPIO_SCL_SET_HIGH();
	MCSDL_GPIO_SCL_SET_OUTPUT();

	//MCSDL_SET_HW_I2C();

	gpio_free(GPIO_TOUCH_I2C_SDA);
	gpio_free(GPIO_TOUCH_I2C_SCL);

	mdelay(500);

	mcsdl_set_hw_i2c();

	MCSDL_RESETB_SET_LOW();
	MCSDL_RESETB_SET_OUTPUT();

	mdelay(500); //mcsdl_delay(MCSDL_DELAY_60MS); // Delay for Stable VDD
	

	MCSDL_RESETB_SET_INPUT();
	MCSDL_VDD_SET_HIGH();

	MCSDL_RESETB_SET_HIGH();
	//MCSDL_CE_SET_HIGH();

	mdelay(500); //mcsdl_delay(MCSDL_DELAY_60MS); // Delay '25 msec'

}
void MFS_reboot(void)
{
	MCSDL_VDD_SET_LOW();

	MCSDL_GPIO_SDA_SET_HIGH();
	MCSDL_GPIO_SDA_SET_OUTPUT(1);

	MCSDL_GPIO_SCL_SET_HIGH();
	MCSDL_GPIO_SCL_SET_OUTPUT(1);

	MCSDL_RESETB_SET_LOW();
	MCSDL_RESETB_SET_OUTPUT(1);

	MFS_ms_delay(25);

	MCSDL_VDD_SET_HIGH();

	MCSDL_RESETB_SET_HIGH();
	MCSDL_RESETB_SET_INPUT();
	MCSDL_GPIO_SCL_SET_INPUT();
	MCSDL_GPIO_SDA_SET_INPUT();

	MFS_ms_delay(25);
}
Exemplo n.º 8
0
static void mcsdl_reboot_mcs(void)
{
	//--------------------------------------------
	// Tkey module reset
	//--------------------------------------------
#if 0
//--------------------------------------------
// Tkey module reset
//--------------------------------------------
//gpio_tlmm_config(GPIO_CFG(GPIO_I2C0_SCL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_16MA),GPIO_CFG_ENABLE);
//gpio_tlmm_config(GPIO_CFG(GPIO_I2C0_SDA, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_16MA),GPIO_CFG_ENABLE);
MCSDL_RESETB_SET_LOW();
MCSDL_RESETB_SET_OUTPUT(0);

mcsdl_vdd_off();
gpio_set_value(GPIO_TSP_SCL, 0);  // TOUCH SCL DIS
gpio_set_value(GPIO_TSP_SDA, 0);  // TOUCH SDA DIS
msleep(300);

//gpio_tlmm_config(GPIO_CFG(GPIO_I2C0_SCL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_16MA),GPIO_CFG_ENABLE);
//gpio_tlmm_config(GPIO_CFG(GPIO_I2C0_SDA, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_16MA),GPIO_CFG_ENABLE);
MCSDL_RESETB_SET_INPUT();
MCSDL_RESETB_SET_HIGH();
gpio_set_value(GPIO_TSP_SCL, 1);  // TOUCH SCL EN
gpio_set_value(GPIO_TSP_SDA, 1);  // TOUCH SDA EN   

mcsdl_vdd_on();

msleep(300);    

//#else
	MCSDL_VDD_SET_LOW();
   msleep(100);

	//MCSDL_CE_SET_LOW();
	//MCSDL_CE_SET_OUTPUT();

	MCSDL_GPIO_SDA_SET_HIGH();
	MCSDL_GPIO_SDA_SET_OUTPUT(1);

	MCSDL_GPIO_SCL_SET_HIGH();
	MCSDL_GPIO_SCL_SET_OUTPUT(1);

	//MCSDL_SET_HW_I2C();

	MCSDL_RESETB_SET_LOW();
	MCSDL_RESETB_SET_OUTPUT(0); //1->0

	mcsdl_delay(MCSDL_DELAY_25MS);						// Delay for Stable VDD

	MCSDL_RESETB_SET_INPUT();
	MCSDL_VDD_SET_HIGH();
   msleep(25);
	MCSDL_RESETB_SET_HIGH();
	//MCSDL_CE_SET_HIGH();
printk("TSP firmware download complete and chip RESET! /n");
	mcsdl_delay(MCSDL_DELAY_60MS); 						// Delay '25 msec'
	mcsdl_delay(MCSDL_DELAY_40MS); 						// Delay '25 msec'
#endif
	MCSDL_VDD_SET_LOW();

	MCSDL_CE_SET_LOW();
	MCSDL_CE_SET_OUTPUT();

	MCSDL_GPIO_SDA_SET_HIGH();
	MCSDL_GPIO_SDA_SET_OUTPUT(1);

	MCSDL_GPIO_SCL_SET_HIGH();
	MCSDL_GPIO_SCL_SET_OUTPUT(1);

	MCSDL_SET_HW_I2C();

	MCSDL_RESETB_SET_LOW();
	MCSDL_RESETB_SET_OUTPUT(0);

	mcsdl_delay(MCSDL_DELAY_25MS);						// Delay for Stable VDD

	MCSDL_RESETB_SET_INPUT();
	MCSDL_VDD_SET_HIGH();
	MCSDL_CE_SET_HIGH();

	mcsdl_delay(MCSDL_DELAY_30MS); 						// Delay '25 msec'
}
Exemplo n.º 9
0
static void mcsdl_select_isp_mode(UINT8 ucMode)
{
	int    i;

	UINT8 enteringCodeMassErase[3]   = { 1, 1, 1 };
	UINT8 enteringCodeSerialWrite[3] = { 0, 0, 1 };
	UINT8 enteringCodeSerialRead[3]  = { 0, 1, 0 };

	UINT8 *pCode;


	//------------------------------------
	// Entering ISP mode : Part 1
	//------------------------------------

	for(i=0; i<4; i++){

		MCSDL_RESETB_SET_LOW();		mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
		MCSDL_GPIO_SCL_SET_HIGH();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
		MCSDL_GPIO_SCL_SET_LOW();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);

		MCSDL_RESETB_SET_HIGH();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
		MCSDL_GPIO_SCL_SET_HIGH();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
		MCSDL_GPIO_SCL_SET_LOW();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
   }

	MCSDL_RESETB_SET_HIGH();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
	MCSDL_GPIO_SCL_SET_HIGH();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
	MCSDL_GPIO_SCL_SET_LOW();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);

	//------------------------------------
	// Entering ISP mode : Part 2
	//------------------------------------

		 if( ucMode == ISP_MODE_ERASE_FLASH  ) pCode = enteringCodeMassErase;
	else if( ucMode == ISP_MODE_SERIAL_WRITE ) pCode = enteringCodeSerialWrite;
	else if( ucMode == ISP_MODE_SERIAL_READ  ) pCode = enteringCodeSerialRead;

	for(i=0; i<3; i++){

		if( pCode[i] == 1 )	MCSDL_RESETB_SET_HIGH();
		else				MCSDL_RESETB_SET_LOW();

		mcsdl_mcs7000_delay(MCSDL_DELAY_3US);

		MCSDL_GPIO_SCL_SET_HIGH();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
		MCSDL_GPIO_SCL_SET_LOW();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);
   }

	MCSDL_RESETB_SET_HIGH();	mcsdl_mcs7000_delay(MCSDL_DELAY_3US);			// High


	//---------------------------------------------------
	// Entering ISP mode : Part 3	- Only Mass Erase
	//---------------------------------------------------

	 if( ucMode == ISP_MODE_ERASE_FLASH   ){

		for(i=0; i<6; i++){

				 if( i==3 ) mcsdl_mcs7000_delay(MCSDL_DELAY_25MS);
			else if( i==4 ) mcsdl_mcs7000_delay(MCSDL_DELAY_150US);

			MCSDL_GPIO_SCL_SET_HIGH();	mcsdl_mcs7000_delay(MCSDL_DELAY_5US);
			MCSDL_GPIO_SCL_SET_LOW();	mcsdl_mcs7000_delay(MCSDL_DELAY_5US);
		}
	}
}