//006* , on area0
u32 FASTCALL ReadMem_A0_006(u32 addr,u32 size)
{
switch(settings.mode)
{
case 0:
return 0;
case 1:
return ModemReadMem_A0_006(addr,size);
case 2:
return LanReadMem_A0_006(addr,size);
default:
//printf("Read from modem area on mode %d, addr[%d] 0x%08X\n",settings.mode,size,addr);
return 0;
}
}
T DYNACALL ReadMem_area0(u32 addr)
{
addr &= 0x01FFFFFF;//to get rid of non needed bits
const u32 base=(addr>>16);
//map 0x0000 to 0x01FF to Default handler
//mirror 0x0200 to 0x03FF , from 0x0000 to 0x03FFF
//map 0x0000 to 0x001F
#if DC_PLATFORM != DC_PLATFORM_ATOMISWAVE
if (base<=0x001F)// :MPX System/Boot ROM
#else
if (base<=0x0001) // Only 128k BIOS on AtomisWave
#endif
{
return ReadBios(addr,sz);
}
//map 0x0020 to 0x0021
else if ((base>= 0x0020) && (base<= 0x0021)) // :Flash Memory
{
return ReadFlash(addr&0x1FFFF,sz);
}
//map 0x005F to 0x005F
else if (likely(base==0x005F))
{
if ( /*&& (addr>= 0x00400000)*/ (addr<= 0x005F67FF)) // :Unassigned
{
EMUERROR2("Read from area0_32 not implemented [Unassigned], addr=%x",addr);
}
else if ((addr>= 0x005F7000) && (addr<= 0x005F70FF)) // GD-ROM
{
#if DC_PLATFORM == DC_PLATFORM_NAOMI || DC_PLATFORM == DC_PLATFORM_ATOMISWAVE
return (T)ReadMem_naomi(addr,sz);
#else
return (T)ReadMem_gdrom(addr,sz);
#endif
}
else if (likely((addr>= 0x005F6800) && (addr<=0x005F7CFF))) // /*:PVR i/f Control Reg.*/ -> ALL SB registers now
{
return (T)sb_ReadMem(addr,sz);
}
else if (likely((addr>= 0x005F8000) && (addr<=0x005F9FFF))) // :TA / PVR Core Reg.
{
if (sz != 4)
// House of the Dead 2
return 0;
return (T)pvr_ReadReg(addr);
}
}
//map 0x0060 to 0x0060
else if ((base ==0x0060) /*&& (addr>= 0x00600000)*/ && (addr<= 0x006007FF)) // :MODEM
{
#if DC_PLATFORM == DC_PLATFORM_NAOMI || DC_PLATFORM == DC_PLATFORM_ATOMISWAVE
return (T)libExtDevice_ReadMem_A0_006(addr, sz);
#elif defined(ENABLE_MODEM)
return (T)ModemReadMem_A0_006(addr, sz);
#else
return (T)0;
#endif
}
//map 0x0060 to 0x006F
else if ((base >=0x0060) && (base <=0x006F) && (addr>= 0x00600800) && (addr<= 0x006FFFFF)) // :G2 (Reserved)
{
EMUERROR2("Read from area0_32 not implemented [G2 (Reserved)], addr=%x",addr);
}
//map 0x0070 to 0x0070
else if ((base ==0x0070) /*&& (addr>= 0x00700000)*/ && (addr<=0x00707FFF)) // :AICA- Sound Cntr. Reg.
{
return (T) ReadMem_aica_reg(addr,sz);//libAICA_ReadReg(addr,sz);
}
//map 0x0071 to 0x0071
else if ((base ==0x0071) /*&& (addr>= 0x00710000)*/ && (addr<= 0x0071000B)) // :AICA- RTC Cntr. Reg.
{
return (T)ReadMem_aica_rtc(addr,sz);
}
//map 0x0080 to 0x00FF
else if ((base >=0x0080) && (base <=0x00FF) /*&& (addr>= 0x00800000) && (addr<=0x00FFFFFF)*/) // :AICA- Wave Memory
{
ReadMemArrRet(aica_ram.data,addr&ARAM_MASK,sz);
}
//map 0x0100 to 0x01FF
else if ((base >=0x0100) && (base <=0x01FF) /*&& (addr>= 0x01000000) && (addr<= 0x01FFFFFF)*/) // :Ext. Device
{
return (T)libExtDevice_ReadMem_A0_010(addr,sz);
}
return 0;
}
