/*!
* ======== InterruptBenelli_intShmMbxStub ========
*/
Void InterruptBenelli_intShmMbxStub(UArg arg)
{
UInt16 index;
UInt16 selfIdx;
UInt16 loopIdx;
InterruptBenelli_FxnTable *table;
selfIdx = MultiProc_self();
for (loopIdx = 0; loopIdx < MultiProc_getNumProcsInCluster(); loopIdx++) {
if (loopIdx == selfIdx) {
continue;
}
index = MBX_TABLE_IDX(loopIdx, selfIdx);
if (((REG32(MAILBOX_STATUS(index)) != 0) &&
(REG32(MAILBOX_IRQENABLE_SET(index)) &
MAILBOX_REG_VAL(SUBMBX_IDX(index))))) {
table = &(InterruptBenelli_module->fxnTable[PROCID(loopIdx)]);
(table->func)(table->arg);
}
}
}
/*!
* ======== InterruptDsp_intShmStub ========
*/
Void InterruptDsp_intShmStub(UArg arg)
{
UInt16 index;
UInt16 selfIdx;
UInt16 loopIdx;
InterruptDsp_FxnTable *table;
selfIdx = MultiProc_self();
/*
* Loop through each Sub-mailbox to determine which one generated
* interrupt.
*/
for (loopIdx = 0; loopIdx < MultiProc_getNumProcsInCluster(); loopIdx++) {
if (loopIdx == selfIdx) {
continue;
}
index = MBX_TABLE_IDX(loopIdx, selfIdx);
if ((REG32(MAILBOX_STATUS(index)) != 0) &&
(REG32(MAILBOX_IRQENABLE_SET_DSP(index)) &
MAILBOX_REG_VAL(SUBMBX_IDX(index)))) {
table = &(InterruptDsp_module->fxnTable[PROCID(loopIdx)]);
(table->func)(table->arg);
}
}
}
/*!
* ======== InterruptDsp_intUnregister ========
*/
Void InterruptDsp_intUnregister(UInt16 remoteProcId,
IInterrupt_IntInfo *intInfo)
{
Hwi_Handle hwiHandle;
Int index;
UInt eventId;
InterruptDsp_FxnTable *table;
Assert_isTrue(((remoteProcId < MultiProc_getNumProcsInCluster()) &&
(remoteProcId == MultiProc_self())), ti_sdo_ipc_Ipc_A_internal);
index = PROCID(remoteProcId);
/* Disable the mailbox interrupt source */
InterruptDsp_intDisable(remoteProcId, intInfo);
/* Make sure the interrupt only gets plugged once */
eventId = InterruptDsp_dspInterruptTable[index];
InterruptDsp_module->numPlugged--;
EventCombiner_disableEvent(eventId);
if (InterruptDsp_module->numPlugged == 0) {
/* Delete the Hwi */
hwiHandle = Hwi_getHandle(intInfo->intVectorId);
Hwi_delete(&hwiHandle);
}
table = &(InterruptDsp_module->fxnTable[index]);
table->func = NULL;
table->arg = NULL;
}
/*
* ======== GatePetersonN_Instance_init ========
*/
Int GatePetersonN_Instance_init(GatePetersonN_Object *obj,
IGateProvider_Handle localGate,
const GatePetersonN_Params *params,
Error_Block *eb)
{
SizeT offset;
SizeT minAlign = Memory_getMaxDefaultTypeAlign();
SizeT i;
if (SharedRegion_getCacheLineSize(params->regionId) > minAlign) {
minAlign = SharedRegion_getCacheLineSize(params->regionId);
}
Assert_isTrue(params->sharedAddr != NULL, ti_sdo_ipc_Ipc_A_invParam);
Assert_isTrue(GatePetersonN_numInstances != 0, ti_sdo_ipc_Ipc_A_invParam);
obj->localGate = localGate;
obj->cacheEnabled = SharedRegion_isCacheEnabled(params->regionId);
obj->cacheLineSize = SharedRegion_getCacheLineSize(params->regionId);
obj->nested = 0;
/* This is not cluster aware:
* obj->numProcessors = MultiProc_getNumProcessors();
* obj->selfId = MultiProc_self();
*/
/* Cluster aware initialization */
obj->numProcessors = MultiProc_getNumProcsInCluster();
/* set selfId to 0-based offset within cluster. */
obj->selfId = MultiProc_self() - MultiProc_getBaseIdOfCluster();
/* Assign shared memory addresses for the protocol state variables */
offset = 0;
for (i=0; i < obj->numProcessors; i++) {
obj->enteredStage[i] = (Int32 *)((UArg)(params->sharedAddr) + offset);
offset += minAlign;
}
for (i=0; i < obj->numProcessors - 1; i++) {
obj->lastProcEnteringStage[i] = (Int32 *)((UArg)(params->sharedAddr)
+ offset);
offset += minAlign;
}
if (!params->openFlag) {
/* Creating. */
obj->objType = ti_sdo_ipc_Ipc_ObjType_CREATEDYNAMIC;
GatePetersonN_postInit(obj);
}
else {
/* Opening. */
obj->objType = ti_sdo_ipc_Ipc_ObjType_OPENDYNAMIC;
}
return (0);
}
/*!
* ======== InterruptDsp_intRegister ========
*/
Void InterruptDsp_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
UInt key;
UInt eventId;
UInt combinedEventId;
Int index;
Hwi_Params params;
InterruptDsp_FxnTable *table;
Assert_isTrue(((remoteProcId < MultiProc_getNumProcsInCluster()) &&
(remoteProcId != MultiProc_self())), ti_sdo_ipc_Ipc_A_internal);
index = PROCID(remoteProcId);
/* Disable global interrupts */
key = Hwi_disable();
table = &(InterruptDsp_module->fxnTable[index]);
table->func = func;
table->arg = arg;
InterruptDsp_intClear(remoteProcId, intInfo);
/* Make sure the interrupt only gets plugged once */
eventId = InterruptDsp_dspInterruptTable[index];
InterruptDsp_module->numPlugged++;
if (InterruptDsp_module->numPlugged == 1) {
EventCombiner_dispatchPlug(eventId,
(Hwi_FuncPtr)InterruptDsp_intShmStub, eventId, TRUE);
Hwi_Params_init(¶ms);
combinedEventId = eventId / EVENT_GROUP_SIZE;
params.eventId = combinedEventId;
params.arg = combinedEventId;
params.enableInt = TRUE;
Hwi_create(intInfo->intVectorId, &ti_sysbios_family_c64p_EventCombiner_dispatch,
¶ms, NULL);
Hwi_enableInterrupt(intInfo->intVectorId);
}
else {
EventCombiner_dispatchPlug(eventId,
(Hwi_FuncPtr)InterruptDsp_intShmStub, eventId, TRUE);
}
/* Enable the mailbox interrupt to the DSP */
InterruptDsp_intEnable(remoteProcId, intInfo);
/* Restore global interrupts */
Hwi_restore(key);
}
/*!
* ======== InterruptDsp_intDisable ========
* Disables remote processor interrupt
*/
Void InterruptDsp_intDisable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
{
UInt16 index;
Assert_isTrue(((remoteProcId < MultiProc_getNumProcsInCluster()) &&
(remoteProcId != MultiProc_self())), ti_sdo_ipc_Ipc_A_internal);
index = MBX_TABLE_IDX(remoteProcId, MultiProc_self());
REG32(MAILBOX_IRQENABLE_CLR_DSP(index)) = MAILBOX_REG_VAL(SUBMBX_IDX(index));
}
/*
* ======== GatePetersonN_sharedMemReq ========
*/
SizeT GatePetersonN_sharedMemReq(const IGateMPSupport_Params *params)
{
SizeT memReq;
UInt16 numProcessors = MultiProc_getNumProcsInCluster(); /* Cluster aware */
SizeT minAlign = Memory_getMaxDefaultTypeAlign();
if (SharedRegion_getCacheLineSize(params->regionId) > minAlign) {
minAlign = SharedRegion_getCacheLineSize(params->regionId);
}
/* Allocate aligned memory for shared state variables used in protocol
* enteredStage[NUM_PROCESSORS]
* lastProcEnteringStage[NUM_STAGES]
*/
memReq = ((2 * numProcessors) - 1) *
SharedRegion_getCacheLineSize(params->regionId);
return(memReq);
}
