static void
handler_system_manager(void)
{
static uint32_t offset = 0;
/* We don't have much time in the critical section. Just
* buffer the registers */
uint32_t oreg;
for (oreg = 0; oreg < SMPC_OREGS; oreg++, offset++) {
OREG_SET(offset, MEMORY_READ(8, OREG(oreg)));
}
uint8_t sr;
sr = MEMORY_READ(8, SMPC(SR));
if ((sr & 0x80) == 0x80) {
if ((sr & NPE) == 0x00) {
/* Mark that SMPC status and peripheral data
* collection is complete */
_collection_complete = true;
offset = 0;
/* Issue a "BREAK" for the "INTBACK" command */
MEMORY_WRITE(8, IREG(0), BR);
return;
}
}
/* Issue a "CONTINUE" for the "INTBACK" command */
MEMORY_WRITE(8, IREG(0), CONT);
}
/* Command type: Resetable system management commands */
uint8_t
smpc_smc_sshon_call(void)
{
/* Enable the "SH-2" master CPU */
smpc_smc_call(SMPC_SMC_MSHON, SMPC_CMD_ISSUE_TYPE_A, NULL);
return MEMORY_READ(8, OREG(31));
}
uint8_t
smpc_smc_nmireq_call(void)
{
/* Send "NMI" request to master "SH-2" */
smpc_smc_call(SMPC_SMC_NMIREQ, SMPC_CMD_ISSUE_TYPE_A, NULL);
return MEMORY_READ(8, OREG(31));
}
/* Command type: Non-resetable system management commands */
uint8_t
smpc_smc_setsmem_call(void)
{
smpc_smc_call(SMPC_SMC_SETSMEM, SMPC_CMD_ISSUE_TYPE_C, NULL);
return MEMORY_READ(8, OREG(31));
}
uint8_t
smpc_smc_ckchg320_call(void)
{
/* Switch the SATURN system clock from 352 mode to 320 mode iff
* not called from slave "SH-2" */
smpc_smc_call(SMPC_SMC_CKCHG320, SMPC_CMD_ISSUE_TYPE_A, NULL);
return MEMORY_READ(8, OREG(31));
}
