//interupt waits for a read from the port
ISR OCOIsr(void)
{
OS_ISR_ENTER();
ReceiveVar = sci_read();
OSSemPost(ReceiveFlag);
OSIntExit();
}
OS_INTERRUPT void Uart0Rx_ISR()
{
OS_ISR_ENTER();
_CLI();
uint8_t ret_val;
ret_val=Receive_buffer_uart0(cur_address0);
switch(ret_val)
{
case 2:
{
UCSR0B=0;
#if !UART0_MASTER
efUART0.Signal();
#endif
break;
}
case 3:
{
uart_status0|=UART_RX_OK;
uart_init0();
#if !UART0_MASTER
set_uart0_to_transmitt();
UCSR0B&=~(1<<RXEN0)|(1<<RXCIE0);
UCSR0B=(1<<TXEN0)|(1<<TXCIE0); //разрешение передатчика
//set_uart0_to_transmitt();
UDR0='!';
#endif
break;
}
}
OS_ISR_EXIT();
}
//void set_uart1_receive();
OS_INTERRUPT void Uart1Tx_ISR()
{
OS_ISR_ENTER();
_CLI();
Transmitt_buffer_uart1();
#if !UART1_MASTER
if(uart_status1&UART_TX_OK)
{
efUART1.Signal();
}
#endif
OS_ISR_EXIT();
}
/*
* exti2_interrupt
* This function is interrupt handler for EXTI2 interrupt.
*/
ISR_FUN exti2_interrupt()
{
OS_ISR_ENTER();
#ifdef ETHERNET_ENC28J60
/* Handle enc28j60 interrupt. */
enc28j60_stm32f407_handle_interrupt();
#endif
/* Clear the interrupt pending bit or EXTI2 channel. */
EXTI->PR = 0x04;
OS_ISR_EXIT();
} /* exti2_interrupt */
//-----------------------------------------------------------------------------
//UART0 зовнішній
//UART1 внутрішній
OS_INTERRUPT void Uart1Rx_ISR()
{
OS_ISR_ENTER();
_CLI();
uint8_t ret_val;
ret_val=Receive_buffer_uart1(cur_address1);
switch(ret_val)
{
case 2:
{
UCSR1B=0;
//#if !UART1_MASTER
efUART1.Signal();
//#endif
break;
}
case 3:
{
uart_status1|=UART_RX_OK;
uart_init1();
#if UART1_MASTER
// efUART1.Signal();
#endif
#if !UART1_MASTER
UCSR1B=(1<<TXEN1)|(1<<TXCIE1); //разрешение передатчика
set_uart1_to_transmitt();
UDR1='!';
#endif
break;
}
}
OS_ISR_EXIT();
}