int gpio_direction_input(int gp) { uint32_t bank = PAD_BANK(gp); uint32_t offset = PINCTRL_DOE(bank); struct mx28_register *reg = (struct mx28_register *)(MXS_PINCTRL_BASE + offset); writel(1 << PAD_PIN(gp), ®->reg_clr); return 0; }
int gpio_direction_input(unsigned gpio) { uint32_t bank = PAD_BANK(gpio); uint32_t offset = PINCTRL_DOE(bank); struct mxs_register_32 *reg = (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset); writel(1 << PAD_PIN(gpio), ®->reg_clr); return 0; }
static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, int dir) { struct mxs_gpio_port *port = container_of(chip, struct mxs_gpio_port, chip); void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id); if (dir) __mxs_setl(1 << offset, pin_addr); else __mxs_clrl(1 << offset, pin_addr); }
int gpio_direction_output(int gp, int value) { uint32_t bank = PAD_BANK(gp); uint32_t offset = PINCTRL_DOE(bank); struct mx28_register *reg = (struct mx28_register *)(MXS_PINCTRL_BASE + offset); writel(1 << PAD_PIN(gp), ®->reg_set); gpio_set_value(gp, value); return 0; }