Exemplo n.º 1
0
static inline void * _get_pad_reg(iomux_pin_name_t pin)
{
	u32 pad_reg = PIN_TO_IOMUX_PAD(pin);
	void __iomem *sw_pad_reg = _get_sw_pad();


	if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) {
		if ((pin == MX51_PIN_NANDF_RB5) ||
			(pin == MX51_PIN_NANDF_RB6) ||
			(pin == MX51_PIN_NANDF_RB7))
			; /* Do nothing */
		else if (pad_reg == 0x4D0 - PAD_I_START_MX51)
			pad_reg += 0x4C;
		else if (pad_reg == 0x860 - PAD_I_START_MX51)
			pad_reg += 0x9C;
		else if (pad_reg >= 0x804 - PAD_I_START_MX51)
			pad_reg += 0xB0;
		else if (pad_reg >= 0x7FC - PAD_I_START_MX51)
			pad_reg += 0xB4;
		else if (pad_reg >= 0x4E4 - PAD_I_START_MX51)
			pad_reg += 0xCC;
		else
			pad_reg += 8;
	}
	return sw_pad_reg + pad_reg;
}
Exemplo n.º 2
0
/* Get the pad register address of this pin */
static inline u32 get_pad_reg(iomux_pin_name_t pin)
{
	u32 pad_reg = PIN_TO_IOMUX_PAD(pin);

#if defined(CONFIG_MX51)
	if (is_soc_rev(CHIP_REV_2_0) < 0) {
		/*
		 * Fixup register address:
		 * i.MX51 TO1 has offset with the register
		 * which is define as TO2.
		 */
		if ((pin == MX51_PIN_NANDF_RB5) ||
			(pin == MX51_PIN_NANDF_RB6) ||
			(pin == MX51_PIN_NANDF_RB7))
			; /* Do nothing */
		else if (pad_reg == 0x4D0 - PAD_I_START)
			pad_reg += 0x4C;
		else if (pad_reg == 0x860 - PAD_I_START)
			pad_reg += 0x9C;
		else if (pad_reg >= 0x804 - PAD_I_START)
			pad_reg += 0xB0;
		else if (pad_reg >= 0x7FC - PAD_I_START)
			pad_reg += 0xB4;
		else if (pad_reg >= 0x4E4 - PAD_I_START)
			pad_reg += 0xCC;
		else
			pad_reg += 8;
	}
#endif
	pad_reg += IOMUXSW_PAD_CTL;
	return pad_reg;
}
Exemplo n.º 3
0
static inline u32 _get_pad_reg(iomux_pin_name_t pin)
{
	u32 pad_reg = PIN_TO_IOMUX_PAD(pin);

	if (is_soc_rev(CHIP_REV_2_0) < 0) {
		if ((pin == MX51_PIN_NANDF_RB5) ||
			(pin == MX51_PIN_NANDF_RB6) ||
			(pin == MX51_PIN_NANDF_RB7))
			; /* Do nothing */
		else if (pad_reg == 0x4D0 - PAD_I_START)
			pad_reg += 0x4C;
		else if (pad_reg == 0x860 - PAD_I_START)
			pad_reg += 0x9C;
		else if (pad_reg >= 0x804 - PAD_I_START)
			pad_reg += 0xB0;
		else if (pad_reg >= 0x7FC - PAD_I_START)
			pad_reg += 0xB4;
		else if (pad_reg >= 0x4E4 - PAD_I_START)
			pad_reg += 0xCC;
		else
			pad_reg += 8;
	}
	pad_reg += IOMUXSW_PAD_CTL;
	return pad_reg;
}
Exemplo n.º 4
0
static inline u32 _get_pad_reg(iomux_pin_name_t pin)
{
	u32 pad_reg = PIN_TO_IOMUX_PAD(pin);

	pad_reg += IOMUXSW_PAD_CTL;

	return pad_reg;
}
Exemplo n.º 5
0
/*!
 * This function configures the pad value for a IOMUX pin.
 *
 * @param  pin          a pin number as defined in \b #iomux_pin_name_t
 * @param  config       the ORed value of elements defined in \b #iomux_pad_config_t
 */
void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config)
{
	void *pad_reg = IOMUXSW_PAD_CTL + PIN_TO_IOMUX_PAD(pin);

	BUG_ON((pad_reg > IOMUXSW_PAD_END) || (pad_reg < IOMUXSW_PAD_CTL));
	spin_lock(&gpio_mux_lock);
	__raw_writel(config, pad_reg);
	spin_unlock(&gpio_mux_lock);
}
Exemplo n.º 6
0
/*!
 * This function configures the pad value for a IOMUX pin.
 *
 * @param  pin     a pin number as defined in \b #iomux_pin_name_t
 * @param  config  the ORed value of elements defined in \b #iomux_pad_config_t
 */
void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config)
{
	u32 pad_reg = IOMUXGPR + PIN_TO_IOMUX_PAD(pin);

	__REG(pad_reg) = config;
}
Exemplo n.º 7
0
unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin)
{
	void *pad_reg = IOMUXSW_PAD_CTL + PIN_TO_IOMUX_PAD(pin);
	return __raw_readl(pad_reg);
}