#define PHY_CLOCK(_port, _pin, _func, _retiming) \
{ \
.gpio = stm_gpio(_port, _pin), \
.direction = stm_pad_gpio_direction_unknown, \
.function = _func, \
.name = "PHYCLK", \
.priv = &(struct stxh205_pio_config) { \
.retime = _retiming, \
}, \
}
static struct stm_pad_config stxh205_ethernet_mii_pad_config = {
.gpios_num = 20,
.gpios = (struct stm_pad_gpio []) {
DATA_OUT(0, 0, 1, RET_BYPASS(0)),/* TXD[0] */
DATA_OUT(0, 1, 1, RET_BYPASS(0)),/* TXD[1] */
DATA_OUT(0, 2, 1, RET_BYPASS(0)),/* TXD[2] */
DATA_OUT(0, 3, 1, RET_BYPASS(0)),/* TXD[3] */
TXER(0, 4, 1, RET_BYPASS(0)),/* TXER */
DATA_OUT(0, 5, 1, RET_BYPASS(0)),/* TXEN */
CLOCK_IN(0, 6, 1, RET_NICLK(0)),/* TXCLK */
DATA_IN(0, 7, 1, RET_BYPASS(0)),/* COL */
DATA_OUT_PU(1, 0, 1, RET_BYPASS(0)),/* MDIO*/
CLOCK_OUT(1, 1, 1, RET_NICLK(0)),/* MDC */
DATA_IN(1, 2, 1, RET_BYPASS(0)),/* CRS */
DATA_IN(1, 3, 1, RET_BYPASS(0)),/* MDINT */
DATA_IN(1, 4, 1, RET_BYPASS(0)),/* RXD[0] */
DATA_IN(1, 5, 1, RET_BYPASS(0)),/* RXD[1] */
DATA_IN(1, 6, 1, RET_BYPASS(0)),/* RXD[2] */
DATA_IN(1, 7, 1, RET_BYPASS(0)),/* RXD[3] */
sysconf_write(gbit_sc[1], 0);
return 0;
}
void stih415_gmac1_release(struct stm_pad_state *state, void *priv)
{
sysconf_release(gbit_sc[1]);
}
static struct stm_pad_config stih415_ethernet_mii_pad_configs[] = {
[0] = {
.gpios_num = 20,
.gpios = (struct stm_pad_gpio []) {
PHY_CLOCK(13, 5, 2, RET_NICLK(0, 1)),/* PHYCLK */
DATA_IN(13, 6, 2, RET_BYPASS(0)),/* MDINT */
DATA_OUT(13, 7, 2, RET_SE_NICLK_IO(0, 0)),/* TXEN */
DATA_OUT(14, 0, 2, RET_SE_NICLK_IO(0, 0)),/* TXD[0] */
DATA_OUT(14, 1, 2, RET_SE_NICLK_IO(0, 0)),/* TXD[1] */
DATA_OUT(14, 2, 2, RET_SE_NICLK_IO(0, 1)),/* TXD[2] */
DATA_OUT(14, 3, 2, RET_SE_NICLK_IO(0, 1)),/* TXD[3] */
CLOCK_IN(15, 0, 2, RET_NICLK(0, 0)),/* TXCLK */
DATA_OUT(15, 1, 2, RET_SE_NICLK_IO(0, 0)),/* TXER */
DATA_IN(15, 2, 2, RET_BYPASS(1000)),/* CRS */
DATA_IN(15, 3, 2, RET_BYPASS(1000)),/* COL */
MDIO(15, 4, 2, RET_BYPASS(3000)),/* MDIO*/
MDC(15, 5, 2, RET_NICLK(0, 1)),/* MDC */
DATA_IN(16, 0, 2, RET_SE_NICLK_IO(0, 0)),/* 5 RXD[0] */
}
static struct stm_pad_config stx7108_ethernet_mii_pad_configs[] = {
[0] = {
.gpios_num = 20,
.gpios = (struct stm_pad_gpio []) {
DATA_OUT(0, 6, 0, RET_SE_NICLK_IO(0, 0)),/* TXD[0] */
DATA_OUT(0, 6, 1, RET_SE_NICLK_IO(0, 0)),/* TXD[1] */
DATA_OUT(0, 6, 2, RET_SE_NICLK_IO(0, 0)),/* TXD[2] */
DATA_OUT(0, 6, 3, RET_SE_NICLK_IO(0, 0)),/* TXD[3] */
DATA_OUT(0, 7, 0, RET_SE_NICLK_IO(0, 0)),/* TXER */
DATA_OUT(0, 7, 1, RET_SE_NICLK_IO(0, 0)),/* TXEN */
CLOCK_IN(0, 7, 2, RET_NICLK(0, 0)),/* TXCLK */
DATA_IN(0, 7, 3, RET_BYPASS(0)),/* COL */
DATA_OUT_PU(0, 7, 4, RET_BYPASS(3000)),/* MDIO*/
CLOCK_OUT(0, 7, 5, RET_NICLK(0, 0)),/* MDC */
DATA_IN(0, 7, 6, RET_BYPASS(0)),/* CRS */
DATA_IN(0, 7, 7, RET_BYPASS(0)),/* MDINT */
DATA_IN(0, 8, 0, RET_SE_NICLK_IO(1000, 0)),/* RXD[0] */
DATA_IN(0, 8, 1, RET_SE_NICLK_IO(1000, 0)),/* RXD[1] */
DATA_IN(0, 8, 2, RET_SE_NICLK_IO(1000, 0)),/* RXD[2] */
DATA_IN(0, 8, 3, RET_SE_NICLK_IO(1000, 0)),/* RXD[3] */
DATA_IN(0, 9, 0, RET_SE_NICLK_IO(1000, 0)),/* RXDV */
DATA_IN(0, 9, 1, RET_SE_NICLK_IO(1000, 0)),/* RX_ER */
CLOCK_IN(0, 9, 2, RET_NICLK(0, 0)),/* RXCLK */
PHY_CLOCK(0, 9, 3, RET_NICLK(0, 0)),/* PHYCLK */
},
.sysconfs_num = 3,
.sysconfs = (struct stm_pad_sysconf []) {
