Exemplo n.º 1
0
//*****************************************************************************
//
//! Erases the entire MX66L51235F.
//!
//! This command erase the entire contents of the MX66L51235F.  This takes two
//! minutes, nominally, to complete.  This function will not return until the
//! data has be erased.
//!
//! \return None.
//
//*****************************************************************************
void
MX66L51235FChipErase(void)
{
    //
    // Enable program/erase of the SPI flash.
    //
    MX66L51235FWriteEnable();

    //
    // Assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, 0);

    //
    // Erase the entire device.
    //
    ROM_SPIFlashChipErase(SSI3_BASE);

    //
    // Wait until the command has been completely transmitted.
    //
    while(ROM_SSIBusy(SSI3_BASE)) {
    }

    //
    // De-assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, GPIO_PIN_1);

    //
    // Wait for the erase operation to complete.
    //
    MX66L51235FWait();
}
Exemplo n.º 2
0
//*****************************************************************************
//
// Writes the extended address register, allowing the full contents of the
// MX66L51235F to be accessed.
//
//*****************************************************************************
static void
MX66L51235FWriteEAR(uint32_t ui32Addr)
{
    //
    // See if the extended address register needs to be written.
    //
    if((ui32Addr & 0xff000000) == (g_ui32MX66L51235FAddr & 0xff000000)) {
        //
        // The extended address register does not need to be changed, so return
        // without doing anything.
        //
        return;
    }

    //
    // Save the new value of the extended address register.
    //
    g_ui32MX66L51235FAddr = ui32Addr;

    //
    // Enable program/erase of the SPI flash.
    //
    MX66L51235FWriteEnable();

    //
    // Assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, 0);

    //
    // Set the SSI module into write-only mode.
    //
    ROM_SSIAdvModeSet(SSI3_BASE, SSI_ADV_MODE_WRITE);

    //
    // Send the sector erase command.
    //
    ROM_SSIDataPut(SSI3_BASE, 0xc5);

    //
    // Send the address of the sector to be erased, marking the last byte of
    // the address as the end of the frame.
    //
    ROM_SSIAdvDataPutFrameEnd(SSI3_BASE, (ui32Addr >> 24) & 0xff);

    //
    // Wait until the command has been completely transmitted.
    //
    while(ROM_SSIBusy(SSI3_BASE)) {
    }

    //
    // De-assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, GPIO_PIN_1);
}
Exemplo n.º 3
0
uint8_t SPIClass::transfer(uint8_t data) {

    unsigned long rxData;

    ROM_SSIDataPut(SSIBASE, data);

    while(ROM_SSIBusy(SSIBASE));

    ROM_SSIDataGet(SSIBASE, &rxData);

    return (uint8_t) rxData;

}
Exemplo n.º 4
0
unsigned char
pdlibSPI_TransferByte(unsigned char ucData)
{
	unsigned long ulRxData;
	/* Validate parameters */
	if(g_SSI < 5)
	{
#ifdef PART_LM4F120H5QR

			ROM_SSIDataPut(g_SSIModule[g_SSI][SSIBASE], ucData);

			/* Wait until current transmission is over */
			while(ROM_SSIBusy(g_SSIModule[g_SSI][SSIBASE]));

			ROM_SSIDataGet(g_SSIModule[g_SSI][SSIBASE], &ulRxData);

			/* Wait until current transmission is over */
			while(ROM_SSIBusy(g_SSIModule[g_SSI][SSIBASE]));
#endif
	}

	return ((unsigned char)(ulRxData & 0xFF));
}
Exemplo n.º 5
0
uint8_t SPIClass::transfer(uint8_t ssPin, uint8_t data, uint8_t transferMode) {

	unsigned long rxData;

	digitalWrite(ssPin, LOW);

	ROM_SSIDataPut(SSIBASE, data);

	while(ROM_SSIBusy(SSIBASE));

	if(transferMode == SPI_LAST)
		digitalWrite(ssPin, HIGH);
	else
		digitalWrite(ssPin, LOW);

	ROM_SSIDataGet(SSIBASE, &rxData);

	return (uint8_t) rxData;

}
Exemplo n.º 6
0
//*****************************************************************************
//
//! Programs the MX66L51235F.
//!
//! \param ui32Addr is the address to be programmed.
//! \param pui8Data is a pointer to the data to be programmed.
//! \param ui32Count is the number of bytes to be programmed.
//!
//! This function programs data into the MX66L51235F.  This function will not
//! return until the data has be programmed.  The addresses to be programmed
//! must not span a 256-byte boundary (in other words, ``\e ui32Addr & ~255''
//! must be the same as ``(\e ui32Addr + \e ui32Count) & ~255'').
//!
//! \return None.
//
//*****************************************************************************
void
MX66L51235FPageProgram(uint32_t ui32Addr, const uint8_t *pui8Data,
                       uint32_t ui32Count)
{
    //
    // Write the extended address register.
    //
    MX66L51235FWriteEAR(ui32Addr);

    //
    // Enable program/erase of the SPI flash.
    //
    MX66L51235FWriteEnable();

    //
    // Assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, 0);

    //
    // Program the requested data.
    //
    ROM_SPIFlashPageProgram(SSI3_BASE, ui32Addr, pui8Data, ui32Count);

    //
    // Wait until the command has been completely transmitted.
    //
    while(ROM_SSIBusy(SSI3_BASE)) {
    }

    //
    // De-assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, GPIO_PIN_1);

    //
    // Wait for the page program operation to complete.
    //
    MX66L51235FWait();
}
Exemplo n.º 7
0
//*****************************************************************************
//
//! Erases a 64 KB block of the MX66L51235F.
//!
//! \param ui32Addr is the address of the block to erase.
//!
//! This function erases a 64 KB block of the MX66L51235F.  Each 64 KB block
//! has a 64 KB alignment; the MX66L51235F will ignore the lower 16 bits of the
//! address provided.  This function will not return until the data has be
//! erased.
//!
//! \return None.
//
//*****************************************************************************
void
MX66L51235FBlockErase64(uint32_t ui32Addr)
{
    //
    // Write the extended address register.
    //
    MX66L51235FWriteEAR(ui32Addr);

    //
    // Enable program/erase of the SPI flash.
    //
    MX66L51235FWriteEnable();

    //
    // Assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, 0);

    //
    // Erase the requested block.
    //
    ROM_SPIFlashBlockErase64(SSI3_BASE, ui32Addr);

    //
    // Wait until the command has been completely transmitted.
    //
    while(ROM_SSIBusy(SSI3_BASE)) {
    }

    //
    // De-assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, GPIO_PIN_1);

    //
    // Wait for the erase operation to complete.
    //
    MX66L51235FWait();
}
Exemplo n.º 8
0
//*****************************************************************************
//
// Enable program/erase of the MX66L51235F.
//
//*****************************************************************************
static void
MX66L51235FWriteEnable(void)
{
    //
    // Assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, 0);

    //
    // Enable programming/erasing of the MX66L51235F.
    //
    ROM_SPIFlashWriteEnable(SSI3_BASE);

    //
    // Wait until the command has been completely transmitted.
    //
    while(ROM_SSIBusy(SSI3_BASE)) {
    }

    //
    // De-assert the chip select to the MX66L51235F.
    //
    ROM_GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_1, GPIO_PIN_1);
}