/** * Enable prefetch mode * * @param[in] EntryPoint Timepoint designator. * @param[in] PlatformConfig Contains the runtime modifiable feature input data. * @param[in] StdHeader Config Handle for library, services. * * @retval AGESA_SUCCESS Always succeeds. * */ AGESA_STATUS InitializePrefetchModeFeature ( IN UINT64 EntryPoint, IN PLATFORM_CONFIGURATION *PlatformConfig, IN AMD_CONFIG_PARAMS *StdHeader ) { AP_EXE_PARAMS ApParams; AGESA_STATUS AgesaStatus; AGESA_STATUS CalledStatus; AgesaStatus = AGESA_SUCCESS; CalledStatus = AGESA_SUCCESS; IDS_HDT_CONSOLE (CPU_TRACE, " Prefetch Mode is not AUTO\n"); ApParams.StdHeader = *StdHeader; ApParams.FunctionNumber = AP_LATE_TASK_CPU_PREFETCH_MODE; ApParams.RelatedDataBlock = (VOID *) PlatformConfig; ApParams.RelatedBlockLength = sizeof (PLATFORM_CONFIGURATION); CalledStatus = RunLateApTaskOnAllAPs (&ApParams, StdHeader); if (CalledStatus > AgesaStatus) { AgesaStatus = CalledStatus; } AgesaStatus = CpuPrefetchModeApTask (&ApParams); if (CalledStatus > AgesaStatus) { AgesaStatus = CalledStatus; } return AgesaStatus; }
/** * Performs CPU related initialization at the late entry point * * This function should be the last function run by the AGESA * CPU module and prepares the processor for the operating system * bootstrap load process. * * @param[in] StdHeader Config handle for library and services * @param[in] PlatformConfig Contains the runtime modifiable feature input data. * * @retval AGESA_SUCCESS * */ AGESA_STATUS AmdCpuLate ( IN AMD_CONFIG_PARAMS *StdHeader, IN PLATFORM_CONFIGURATION *PlatformConfig ) { AP_EXE_PARAMS ApParams; if ((PlatformConfig->PlatformProfile.AdvancedPerformanceProfile.HardwarePrefetchMode != HARDWARE_PREFETCHER_AUTO) || (PlatformConfig->PlatformProfile.AdvancedPerformanceProfile.SoftwarePrefetchMode != SOFTWARE_PREFETCHES_AUTO)) { ApParams.StdHeader = *StdHeader; ApParams.FunctionNumber = AP_LATE_TASK_CPU_LATE_INIT; ApParams.RelatedDataBlock = (VOID *) PlatformConfig; ApParams.RelatedBlockLength = sizeof (PLATFORM_CONFIGURATION); RunLateApTaskOnAllAPs (&ApParams, StdHeader); CpuLateInitApTask (&ApParams); } DisableCf8ExtCfg (StdHeader); return (AGESA_SUCCESS); }
/** * IDS function force all cores run specific task after amdinitpost * * * @param[in] ApLateTaskPtr The Pointer of IDSAPLATETASK. * @param[in,out] StdHeader The Pointer of AMD_CONFIG_PARAMS. * * @retval AGESA_SUCCESS Success * @retval AGESA_ERROR meet some error * **/ AGESA_STATUS IdsAgesaRunFcnOnAllCoresLate ( IN IDSAPLATETASK *ApLateTaskPtr, IN OUT AMD_CONFIG_PARAMS *StdHeader ) { AP_EXE_PARAMS LaunchApParams; AGESA_STATUS Status; //init AgesaRunFcnOnAp parameters Status = AGESA_SUCCESS; LaunchApParams.FunctionNumber = IDS_LATE_RUN_AP_TASK_ID; LaunchApParams.RelatedBlockLength = SIZE_IN_DWORDS (IDSAPLATETASK); LaunchApParams.RelatedDataBlock = ApLateTaskPtr; LaunchApParams.StdHeader = *StdHeader; Status = RunLateApTaskOnAllAPs (&LaunchApParams, StdHeader); //do it on Bsp Status = ApLateTaskPtr->ApTask (ApLateTaskPtr->ApTaskPara, StdHeader); return Status; }
/** * Enable L3 dependent features. * * L3 features initialization requires the following series of steps. * 1. Disable L3 and DRAM scrubbers on all nodes * 2. Wait 40us for outstanding scrub results to complete * 3. Disable all cache activity in the system * 4. Issue WBINVD on all active cores * 5. Initialize Probe Filter, if supported * 6. Initialize ATM Mode, if supported * 7. Enable all cache activity in the system * 8. Restore L3 and DRAM scrubber register values * * @param[in] EntryPoint Timepoint designator. * @param[in] PlatformConfig Contains the runtime modifiable feature input data. * @param[in] StdHeader Config Handle for library, services. * * @retval AGESA_SUCCESS Always succeeds. * */ AGESA_STATUS STATIC InitializeL3Feature ( IN UINT64 EntryPoint, IN PLATFORM_CONFIGURATION *PlatformConfig, IN AMD_CONFIG_PARAMS *StdHeader ) { UINT32 CpuCount; UINT32 Socket; BOOLEAN HtAssistEnabled; BOOLEAN AtmModeEnabled; AGESA_STATUS AgesaStatus; AP_MAILBOXES ApMailboxes; AP_EXE_PARAMS ApParams; UINT32 Scrubbers[MAX_SOCKETS_SUPPORTED][L3_SCRUBBER_CONTEXT_ARRAY_SIZE]; L3_FEATURE_FAMILY_SERVICES *FamilyServices[MAX_SOCKETS_SUPPORTED]; AgesaStatus = AGESA_SUCCESS; HtAssistEnabled = TRUE; AtmModeEnabled = TRUE; IDS_HDT_CONSOLE (CPU_TRACE, " Enabling L3 dependent features\n"); // There are many family service call outs. Initialize the family service array while // cache is still enabled. for (Socket = 0; Socket < MAX_SOCKETS_SUPPORTED; Socket++) { if (IsProcessorPresent (Socket, StdHeader)) { GetFeatureServicesOfSocket (&L3FeatureFamilyServiceTable, Socket, (const VOID **) &FamilyServices[Socket], StdHeader); } else { FamilyServices[Socket] = NULL; } } if (EntryPoint == CPU_FEAT_AFTER_POST_MTRR_SYNC) { // Check for optimal settings GetApMailbox (&ApMailboxes.ApMailInfo.Info, StdHeader); CpuCount = GetNumberOfProcessors (StdHeader); if (((CpuCount == 1) && (ApMailboxes.ApMailInfo.Fields.ModuleType == 1)) || ((CpuCount == 2) && (ApMailboxes.ApMailInfo.Fields.ModuleType == 0))) { for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { // Only check for non-optimal HT Assist setting is if's supported. if ((FamilyServices[Socket] != NULL) && (FamilyServices[Socket]->IsHtAssistSupported (FamilyServices[Socket], PlatformConfig, StdHeader))) { if (FamilyServices[Socket]->IsNonOptimalConfig (FamilyServices[Socket], Socket, StdHeader)) { // Non-optimal settings. Log an event. AgesaStatus = AGESA_WARNING; PutEventLog (AgesaStatus, CPU_WARNING_NONOPTIMAL_HT_ASSIST_CFG, 0, 0, 0, 0, StdHeader); break; } } } } } else { // Disable the scrubbers. for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { if (FamilyServices[Socket] != NULL) { FamilyServices[Socket]->GetL3ScrubCtrl (FamilyServices[Socket], Socket, &Scrubbers[Socket][0], StdHeader); // If any node in the system does not support Probe Filter, disable it on the system if (!FamilyServices[Socket]->IsHtAssistSupported (FamilyServices[Socket], PlatformConfig, StdHeader)) { HtAssistEnabled = FALSE; } // If any node in the system does not support ATM mode, disable it on the system if (!FamilyServices[Socket]->IsAtmModeSupported (FamilyServices[Socket], PlatformConfig, StdHeader)) { AtmModeEnabled = FALSE; } } } // Wait for 40us WaitMicroseconds ((UINT32) 40, StdHeader); // Run DisableAllCaches on AP cores. ApParams.StdHeader = *StdHeader; ApParams.FunctionNumber = AP_LATE_TASK_DISABLE_CACHE; ApParams.RelatedDataBlock = (VOID *) &HtAssistEnabled; ApParams.RelatedBlockLength = sizeof (BOOLEAN); RunLateApTaskOnAllAPs (&ApParams, StdHeader); // Run DisableAllCaches on core 0. DisableAllCaches (&ApParams); // Family hook before initialization. for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { if (FamilyServices[Socket] != NULL) { FamilyServices[Socket]->HookBeforeInit (FamilyServices[Socket], Socket, StdHeader); } } // Activate Probe Filter & ATM mode. for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { if (FamilyServices[Socket] != NULL) { if (HtAssistEnabled) { FamilyServices[Socket]->HtAssistInit (FamilyServices[Socket], Socket, StdHeader); } if (AtmModeEnabled) { FamilyServices[Socket]->AtmModeInit (FamilyServices[Socket], Socket, StdHeader); } } } // Family hook after initialization. for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { if (FamilyServices[Socket] != NULL) { FamilyServices[Socket]->HookAfterInit (FamilyServices[Socket], Socket, StdHeader); } } // Run EnableAllCaches on core 0. EnableAllCaches (&ApParams); // Run EnableAllCaches on every core. ApParams.FunctionNumber = AP_LATE_TASK_ENABLE_CACHE; RunLateApTaskOnAllAPs (&ApParams, StdHeader); // Restore the scrubbers. for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { if (FamilyServices[Socket] != NULL) { FamilyServices[Socket]->SetL3ScrubCtrl (FamilyServices[Socket], Socket, &Scrubbers[Socket][0], StdHeader); } } } return AgesaStatus; }