sc_time &tdma_bus::get_CurrentP2Pdelay(phy_link_t &plink,
unsigned int msg_size
) {
std::string msg;
unsigned int slots_allocated, first_slot;
sc_time current_offset_delay, data_tx_delay;
link_info_t *plink_info_p;
// retrieve properties stored (by the base comm_res)
plink_info_p = get_properties(plink, msg_size);
if(plink_info_p==NULL) { // property for the link-msg_size combination not found
this->set_CurrentP2Pdelay(plink,msg_size); // refer to plinks info
// retrieve the properties again
plink_info_p = get_properties(plink, msg_size);
// ... and it should not fail again
if(plink_info_p==NULL) {
std::string rpt_msg;
std::ostringstream os;
rpt_msg = "Setting properties of link ";
os << plink;
rpt_msg += os.str();
rpt_msg += " in TDMA bus ";
rpt_msg += name();
rpt_msg += " failed.";
SC_REPORT_ERROR("KisTA",rpt_msg.c_str());
}
}
data_tx_delay = plink_info_p->getMaxP2Pdelay(msg_size);
// NOTE:
// Notice that in the CurrentP2P call, only the time invariant component
// was cached.
// Now, the time dependent component is added.
// A faster alternative is to use the L1 accuracy level, which provides
// a random offset bounded by the maximum offset
switch(accuracy_level) {
case 0:
first_slot = first_slot_allocation_table[plink.src];
current_offset_delay = current_offset_delay_L0(sc_time_stamp(),first_slot);
break;
case 1:
slots_allocated = channel_allocation_table[plink.src];
current_offset_delay = current_offset_delay_L1(slots_allocated);
break;
default:
msg = "TDMA bus ";
msg += name();
msg += ": unknown accuracy level calculating Current P2P delay. Supported ones range 0(most accurate, slower) to 1(faster-less accurate)";
SC_REPORT_ERROR("KisTA",msg.c_str());
}
current_tx_delay = current_offset_delay + data_tx_delay; // Note that we use a member variable of tdma_bus class (instead a local variable)
// to enable the return of a refernce
return current_tx_delay;
}
void sc_report::register_id( int id, const char* msg )
{
sc_deprecated_report_ids("sc_report::register_id()");
if ( id < 0 )
{
SC_REPORT_ERROR( SC_ID_REGISTER_ID_FAILED_,
"invalid report id" );
}
if ( msg == 0 )
{
SC_REPORT_ERROR( SC_ID_REGISTER_ID_FAILED_,
"invalid report message" );
}
sc_msg_def * md = sc_report_handler::mdlookup(id);
if ( !md )
md = sc_report_handler::add_msg_type(msg);
if ( !md )
{
SC_REPORT_ERROR( SC_ID_REGISTER_ID_FAILED_,
"report_map insertion error" );
}
if ( md->id != -1 )
{
if ( strcmp( msg, md->msg_type ) != 0 )
{
SC_REPORT_ERROR( SC_ID_REGISTER_ID_FAILED_,
"report id already exists" );
}
return;
}
md->id = id;
}
sc_time tdma_bus::calculate_MaxP2Pdelay(unsigned int msg_size, unsigned int slots_allocated) {
std::string msg;
//cout << "CALCULATE MAX (BOUND) P2P DELAY" << endl;
#ifdef _ENABLE_CHECK_ALLOCATED_CHANNELS_IN_CALCULATE_MAX_P2P_DELAY
if(slots_allocated>n_channels) {
msg = "Calling calculate_MaxP2Pdelay in TDMA bus ";
msg += name();
msg += " for ";
msg += std::to_string(slots_allocated);
msg += " slots, while the bus has ";
msg += n_channels;
msg += " slots.";
SC_REPORT_ERROR("KisTA", msg.c_str());
}
#endif
switch(accuracy_level){
case 0:
return calculate_MaxP2Pdelay_L0(msg_size,slots_allocated);
break;
case 1:
return calculate_MaxP2Pdelay_L1(msg_size,slots_allocated);
break;
case 2:
return calculate_MaxP2Pdelay_L2(msg_size,slots_allocated);
break;
default:
msg= "TDMA bus ";
msg += name();
msg += ": unknown accuracy level calculating Max. P2P delay. Supported ones range 0(most accurate, slower) to 2(faster-less accurate)";
SC_REPORT_ERROR("KisTA",msg.c_str());
}
}
void handle_sc_kernel_exception_message
(
uvm_ml_kernel_exception_message message,
const char* string1,
const char* string2
) {
char msg[1024];
switch (message) {
case UVM_ML_CREATE_SC_INST:
sprintf(msg, "\nSystemC module defname is '%s' \nHDL instname is '%s'",
string1, string2
);
SC_REPORT_ERROR(msg,"\n");
break;
case UVM_ML_CREATE_SC_INST_2:
sprintf(msg, "instname is '%s'", string1);
SC_REPORT_ERROR(msg,"\n");
break;
case UVM_ML_QUASI_STATIC_ELABORATION:
SC_REPORT_ERROR("SC_ID_COSIM_ERR_IN_QUASI_STATIC_ELAB","\n");
CURRENT_SIMCONTEXT_SET_ERROR();
break;
default:
assert(false);
break;
}
}
void
sc_module::positional_bind( sc_port_base& port_ )
{
if( m_port_index == (int)m_port_vec->size() ) {
char msg[BUFSIZ];
if( m_port_index == 0 ) {
std::sprintf( msg, "module `%s' has no ports", name() );
} else {
std::sprintf( msg, "all ports of module `%s' are bound", name() );
}
SC_REPORT_ERROR( SC_ID_BIND_PORT_TO_PORT_, msg );
}
int status = (*m_port_vec)[m_port_index]->pbind( port_ );
if( status != 0 ) {
char msg[BUFSIZ];
switch( status ) {
case 1:
std::sprintf( msg, "port %d of module `%s' is already bound",
m_port_index, name() );
break;
case 2:
std::sprintf( msg, "type mismatch on port %d of module `%s'",
m_port_index, name() );
break;
default:
std::sprintf( msg, "unknown error" );
break;
}
SC_REPORT_ERROR( SC_ID_BIND_PORT_TO_PORT_, msg );
}
++ m_port_index;
}
void uvm_factory_rep::set_type_override(
string original_type_name,
string replacement_type_name,
bool replace
) {
// check replace_ment_type_name is registered
if (!creator_map[(char*)(replacement_type_name.c_str())]) {
char msg[1024];
sprintf(msg,
" Problem with replacement type in set_type_override. Type = %s",
replacement_type_name.c_str()
);
SC_REPORT_ERROR(UVM_CREATOR_NOT_FOUND_,msg);
return;
}
if (!replace && type_overrides[(char*)(original_type_name.c_str())]) {
char msg[1024];
sprintf(msg," Type = %s", original_type_name.c_str());
SC_REPORT_ERROR(UVM_OVERRIDE_EXISTS_,msg);
return;
}
type_overrides.insert(
strdup(original_type_name.c_str()),
new string(replacement_type_name)
);
}
//------------------------------------------------------------------------------
//"sc_reset_signal_is"
//
//------------------------------------------------------------------------------
void sc_reset::reset_signal_is( const sc_in<bool>& port, bool level )
{
const sc_signal_in_if<bool>* iface_p;
sc_process_b* process_p;
process_p = (sc_process_b*)sc_get_current_process_handle();
assert( process_p );
switch ( process_p->proc_kind() )
{
case SC_THREAD_PROC_:
case SC_METHOD_PROC_:
SC_REPORT_ERROR(SC_ID_RESET_SIGNAL_IS_NOT_ALLOWED_,"");
break;
case SC_CTHREAD_PROC_:
process_p->m_reset_level = level;
iface_p = DCAST<const sc_signal_in_if<bool>*>(port.get_interface());
if ( iface_p )
reset_signal_is( *iface_p, level );
else
{
new sc_reset_finder( &port, level, process_p );
}
break;
default:
SC_REPORT_ERROR(SC_ID_UNKNOWN_PROCESS_TYPE_, process_p->name());
break;
}
}
//------------------------------------------------------------------------------
//"sc_reset::reset_signal_is"
//
// Notes:
// (1) For sc_cthread_process instances we do not record the process in
// the m_processes list. This is because we want the reset to act as
// a synchronous reset rather than an asynchronous one.
//------------------------------------------------------------------------------
void sc_reset::reset_signal_is( const sc_signal_in_if<bool>& iface, bool level )
{
sc_process_b* process_p; // Process adding reset for.
sc_reset* reset_p; // Reset object.
process_p = sc_process_b::last_created_process_base();
assert( process_p );
if ( process_p->m_reset_p )
SC_REPORT_ERROR(SC_ID_MULTIPLE_RESETS_,process_p->name());
switch ( process_p->proc_kind() )
{
case SC_CTHREAD_PROC_:
process_p->m_reset_level = level;
reset_p = iface.is_reset();
process_p->m_reset_p = reset_p;
reset_p->m_processes.push_back(process_p);
break;
case SC_THREAD_PROC_:
case SC_METHOD_PROC_:
SC_REPORT_ERROR(SC_ID_RESET_SIGNAL_IS_NOT_ALLOWED_,"");
break;
default:
SC_REPORT_ERROR(SC_ID_UNKNOWN_PROCESS_TYPE_, process_p->name());
break;
}
}
tlm::tlm_response_status Intc::read(ensitlm::addr_t a, ensitlm::data_t &d) {
switch (a) {
case XIN_ISR_OFFSET: /* Interrupt Status Register */
d = m_active_it;
break;
case XIN_IPR_OFFSET: /* Interrupt Pending Register */
SC_REPORT_ERROR(name(),
"register XIN_IPR_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
case XIN_IER_OFFSET: /* Interrupt Enable Register */
d = m_enabled_it;
break;
case XIN_IAR_OFFSET: /* Interrupt Acknowledge Register */
SC_REPORT_ERROR(name(),
"register XIN_IAR_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
case XIN_SIE_OFFSET: /* Set Interrupt Enable Register */
SC_REPORT_ERROR(name(),
"register XIN_SIE_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
case XIN_CIE_OFFSET: /* Clear Interrupt Enable Register */
SC_REPORT_ERROR(name(),
"register XIN_CIE_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
case XIN_IVR_OFFSET: /* Interrupt Vector Register */
SC_REPORT_ERROR(name(),
"register XIN_IVR_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
case XIN_MER_OFFSET: /* Master Enable Register */
SC_REPORT_ERROR(name(),
"register XIN_MER_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
case XIN_IMR_OFFSET: /* Interrupt Mode Register */
SC_REPORT_ERROR(name(),
"register XIN_IMR_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
case XIN_ILR_OFFSET: /* Interrupt level register */
SC_REPORT_ERROR(name(),
"register XIN_ILR_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
case XIN_IVAR_OFFSET: /* Interrupt Vector Address Register */
SC_REPORT_ERROR(name(),
"register XIN_IVAR_OFFSET not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
break;
default:
SC_REPORT_ERROR(name(), "register not implemented");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
}
return tlm::TLM_OK_RESPONSE;
}
// For allocating a specific (and contiguous) set of slots
// It raises an error if there are busy slots in that region
void tdma_bus::assign_free_slots(unsigned int first_slot, unsigned int req_slots) {
std::string msg;
free_slot_range_t free_slot_range;
if(free_slot_table.size()<1) {
msg = "In TDMA bus ";
msg += name();
msg += ": Empty free slot table when trying to assign free slots.";
SC_REPORT_ERROR("KisTA",msg.c_str());
}
// First searches in the regions if the first slot is comprised in the range
// If it is not found, it raises the error, if it is found, it is checked
// that it fits in the range and the free slots table updated accordingly
for(auto it = free_slot_table.begin(); it != free_slot_table.end(); it++ ) {
free_slot_range = *it;
if( (first_slot >= free_slot_range.first) && (first_slot <= free_slot_range.second) ) {
// First slot is in this free range, here is where we have to check if the allocation
// is possible
if(req_slots < (free_slot_range.second - free_slot_range.first + 1) ) {
// slots taken from this range:
// update the range ...
it->first = first_slot + req_slots;
// ... and first slot from the range does not need to be returned, because it is known by the caller
return;
} else if ( req_slots == (free_slot_range.second - free_slot_range.first + 1) ) {
// slots taken from this range:
// eliminate the range entry from the vector...
free_slot_table.erase(it);
// ... and first slot from the range selected returned
return;
} else {
it++; // no room in this entry, the next entry in the
// free slot table is tried
}
} else {
it++; // looks for the next free range
}
}
// reaching this point means that the first slot was not found in any
// free range of the table
msg = "In TDMA bus ";
msg += name();
msg += ": Trying to allocate ";
msg += std::to_string(req_slots);
msg += " slots from slot ";
msg += std::to_string(first_slot);
msg += " Current status of the allocation table:";
for(auto it = free_slot_table.begin(); it != free_slot_table.end(); it++ ) {
msg += "(";
msg += std::to_string(it->first);
msg += ",";
msg += std::to_string(it->second);
msg += ")";
}
SC_REPORT_ERROR("KisTA",msg.c_str());
}
// Looks for req_slots slots and provides the first slot position
// if sucessful, or raises an error otherwise
unsigned int tdma_bus::assign_free_slots(unsigned int req_slots) {
std::string msg;
free_slot_range_t free_slot_range;
if(free_slot_table.size()<1) {
msg = "In TDMA bus ";
msg += name();
msg += ": Empty free slot table when trying to assign free slots.";
SC_REPORT_ERROR("KisTA",msg.c_str());
}
for(auto it = free_slot_table.begin(); it != free_slot_table.end(); it++ ) {
free_slot_range = *it;
if( req_slots < (free_slot_range.second - free_slot_range.first + 1)) {
// slots taken from this range
// update the range ...
it->first = it->first + req_slots;
// ... and first slot from the range selected returned
return free_slot_range.first; // notice that free_slot_range variable is required to not to return the updated index
} else if(req_slots == (free_slot_range.second - free_slot_range.first + 1)) {
// slots taken from this range:
// eliminate the range entry from the vector...
free_slot_table.erase(it);
// ... and first slot from the range selected returned
return free_slot_range.first;
} else {
it++; // no room in this entry, the next entry in the
// free slot table is tried
}
}
// reaching this point means that no space was found in the free slot
// table, either because there was no sufficient space or because
// the table is fragmented in a manner it prevents the allocation
msg = "In TDMA bus ";
msg += name();
msg += ": Trying to allocate ";
msg += std::to_string(req_slots);
msg += " slots. Current status of the allocation table:";
for(auto it = free_slot_table.begin(); it != free_slot_table.end(); it++ ) {
msg += "(";
msg += std::to_string(it->first);
msg += ",";
msg += std::to_string(it->second);
msg += ")";
}
SC_REPORT_ERROR("KisTA",msg.c_str());
}
//Method used for receiving acknowledgements of interrupts; the ack consists of
//uninteresting data and the address corresponds to the interrupt signal to
//be lowered
//As a response, I lower the interrupt by sending a NULL pointer on the init_socket
void b_transport(tlm::tlm_generic_payload& trans, sc_time& delay) {
if(this->lastIrq < 0) {
THROW_EXCEPTION("Error, lowering an interrupt which hasn't been raised yet!!");
}
tlm::tlm_command cmd = trans.get_command();
sc_dt::uint64 adr = trans.get_address();
unsigned char* ptr = trans.get_data_ptr();
if(trans.get_command() == tlm::TLM_READ_COMMAND) {
THROW_EXCEPTION("Error, the read request is not currently supported by external PINs");
}
else if(cmd == tlm::TLM_WRITE_COMMAND) {
if(this->lastIrq != adr) {
THROW_EXCEPTION("Error, lowering interrupt " << std::hex << std::showbase << (unsigned)adr << " while " << std::hex << std::showbase << this->lastIrq << " was raised");
}
else {
//finally I can really lower the interrupt: I send 0 on
//the initSocked
unsigned char data = 0;
trans.set_data_ptr(&data);
trans.set_dmi_allowed(false);
trans.set_response_status( tlm::TLM_INCOMPLETE_RESPONSE );
sc_time delay;
this->init_socket->b_transport(trans, delay);
if(trans.is_response_error()) {
std::string errorStr("Error in b_transport of PIN, response status = " + trans.get_response_string());
SC_REPORT_ERROR("TLM-2", errorStr.c_str());
}
this->lastIrq = -1;
}
}
trans.set_response_status(tlm::TLM_OK_RESPONSE);
}
void sc_value_base::concat_set( uint64 /*src*/, int /*low_i*/ )
{
char error_message[128];
std::sprintf(error_message,
"concat_set(uint64) method not supported by this type");
SC_REPORT_ERROR( sc_core::SC_ID_OPERATION_FAILED_, error_message );
}
tlm::tlm_response_status
Bus::write(const basic::addr_t &a, const basic::data_t &d)
{
// Testing the bypass
BASIC_TRACE_DEBUG("[!] CALL THE BUS'S WRITE FUNCTION [!]\n");
if(a % sizeof(basic::data_t)) {
SC_REPORT_ERROR(name(),
"unaligned write");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
}
addr_map_t::iterator it = addr_map.find(addr_range(a, a));
if(it == addr_map.end()) {
std::cerr << name() << ": no target at address " <<
std::hex << a << std::endl;
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
}
#ifdef DEBUG
std::cout << "Debug: " << name() <<
": write access at 0x" << std::hex << a <<
" (data: 0x" << d << ")\n";
#endif
tlm::tlm_response_status s =
initiator.write(a - (*it).first.begin, d, (*it).second);
return s;
}
//Simple systemc thread which keeps on generating interrupts;
//the number of the interrupt is printed to the screen before sending it to
//the processor
void generateIrq() {
while(true) {
//An interrupt transaction is composed of a data pointer (containing
//0 if the interrupt has to be lowered, different if raised) and an
//address, corrisponding to the ID of the interrupt
if(this->lastIrq == -1) {
unsigned char data = 1;
tlm::tlm_generic_payload trans;
boost::uniform_int<> degen_dist(0x1, 0xe);
boost::variate_generator<boost::minstd_rand&, boost::uniform_int<> > deg(this->generator, degen_dist);
this->lastIrq = deg();
std::cerr << "Sending out IRQ id=" << std::hex << std::showbase << this->lastIrq << std::endl;
trans.set_address(this->lastIrq);
trans.set_data_ptr(&data);
trans.set_data_length(0);
trans.set_byte_enable_ptr(0);
trans.set_dmi_allowed(false);
trans.set_response_status( tlm::TLM_INCOMPLETE_RESPONSE );
sc_time delay;
this->init_socket->b_transport(trans, delay);
if(trans.is_response_error()) {
std::string errorStr("Error in generateIrq, response status = " + trans.get_response_string());
SC_REPORT_ERROR("TLM-2", errorStr.c_str());
}
}
wait(this->latency);
}
}
void tdma_bus::set_CurrentP2Pdelay(phy_link_t &plink,
unsigned int msg_size
) {
std::string rpt_msg;
unsigned int slots_allocated;
sc_time data_tx_delay;
//link_info_t *plink_info_p;
// retrieve slots allocated from the channel allocation table
slots_allocated = channel_allocation_table[plink.src];
if(slots_allocated==0) {
rpt_msg = "No slot allocated for the physical link (";
rpt_msg += plink.src->name();
rpt_msg += ",";
rpt_msg += plink.dest->name();
rpt_msg += ").";
SC_REPORT_ERROR("KisTA",rpt_msg.c_str());
}
data_tx_delay = calculate_data_tx_delay_L0(msg_size,slots_allocated);
// NOTES:
// - Here the inherited function of the comm_res base class is used
// to cache the transmission delay value (that is, only the time invariant)
// part. Therefore, the get_CurrentP2Pdelay has to take that into account
// in order to later one compose the accurate time-variant value
set_CurrentP2Pdelay(plink,data_tx_delay, msg_size);
}
const char*
sc_name_gen::gen_unique_name( const char* basename_, bool preserve_first )
{
if ( basename_ == 0 )
{
SC_REPORT_ERROR( SC_ID_GEN_UNIQUE_NAME_, 0 );
}
int* c = m_unique_name_map[basename_];
if ( c == 0 )
{
c = new int( 0 );
m_unique_name_map.insert( CCAST<char*>( basename_ ), c );
if (preserve_first)
{
std::sprintf( m_unique_name, "%s", basename_ );
}
else
{
std::sprintf( m_unique_name, "%s_%d", basename_, *c );
}
}
else
{
std::sprintf( m_unique_name, "%s_%d", basename_, ++ (*c) );
}
return m_unique_name;
}
void sc_reset::reset_signal_is(
bool async, const sc_out<bool>& port, bool level )
{
const sc_signal_in_if<bool>* iface_p;
sc_process_b* process_p;
process_p = (sc_process_b*)sc_get_current_process_handle();
assert( process_p );
process_p->m_has_reset_signal = true;
switch ( process_p->proc_kind() )
{
case SC_THREAD_PROC_:
case SC_METHOD_PROC_:
case SC_CTHREAD_PROC_:
iface_p = DCAST<const sc_signal_in_if<bool>*>(port.get_interface());
if ( iface_p )
reset_signal_is( async, *iface_p, level );
else
new sc_reset_finder( async, &port, level, process_p );
break;
default:
SC_REPORT_ERROR(SC_ID_UNKNOWN_PROCESS_TYPE_, process_p->name());
break;
}
}
//------------------------------------------------------------------------------
//"sc_reset::reset_signal_is"
//
// This static method will register the active process instance as being
// reset by the sc_signal<bool> whose interface has been supplied. If no
// sc_reset object instance has been attached to the sc_signal<bool> yet, it
// will be created and attached. The active process instance is pushed into
// the list of processes that the sc_reset object instance should notify if
// the value of the reset signal changes.
//
// Arguments:
// async = true if the reset signal is asynchronous, false if not.
// iface = interface for the reset signal.
// level = is the level at which reset is active, either true or false.
// Notes:
// (1) If reset is asserted we tell the process that it is in reset
// initially.
//------------------------------------------------------------------------------
void sc_reset::reset_signal_is(
bool async, const sc_signal_in_if<bool>& iface, bool level )
{
sc_process_b* process_p; // process adding reset for.
sc_reset_target reset_target; // entry to build for the process.
sc_reset* reset_p; // reset object.
process_p = sc_process_b::last_created_process_base();
assert( process_p );
process_p->m_has_reset_signal = true;
switch ( process_p->proc_kind() )
{
case SC_METHOD_PROC_:
case SC_CTHREAD_PROC_:
case SC_THREAD_PROC_:
reset_p = iface.is_reset();
process_p->m_resets.push_back(reset_p);
reset_target.m_async = async;
reset_target.m_level = level;
reset_target.m_process_p = process_p;
reset_p->m_targets.push_back(reset_target);
if ( iface.read() == level ) process_p->initially_in_reset( async );
break;
default:
SC_REPORT_ERROR(SC_ID_UNKNOWN_PROCESS_TYPE_, process_p->name());
break;
}
}
void sc_value_base::concat_clear_data( bool /* to_ones */ )
{
char error_message[128];
std::sprintf(error_message,
"concat_clear_data method not supported by this type");
SC_REPORT_ERROR( sc_core::SC_ID_OPERATION_FAILED_, error_message );
}
sc_module::sc_module( const sc_module_name& )
: sc_object(::sc_core::sc_get_curr_simcontext()
->get_object_manager()
->top_of_module_name_stack()
->operator const char*()),
sensitive(this),
sensitive_pos(this),
sensitive_neg(this),
m_end_module_called(false),
m_port_vec(),
m_port_index(0),
m_name_gen(0),
m_module_name_p(0)
{
/* For those used to the old style of passing a name to sc_module,
this constructor will reduce the chance of making a mistake */
/* When this form is used, we better have a fresh sc_module_name
on the top of the stack */
sc_module_name* mod_name =
simcontext()->get_object_manager()->top_of_module_name_stack();
if (0 == mod_name || 0 != mod_name->m_module_p)
SC_REPORT_ERROR( SC_ID_SC_MODULE_NAME_REQUIRED_, 0 );
sc_module_init();
mod_name->set_module( this );
m_module_name_p = mod_name; // must come after sc_module_init call.
}
logic_address get_address_by_elem_name<logic_address>(std::string elem_name) {
std::string msg;
tasks_info_by_name_t::iterator task_info_it;
/*
cout << "A) SYSTEM TASKS: " << task_info_by_name.size() << endl;
for(task_by_name_it=task_info_by_name.begin();task_by_name_it!=task_info_by_name.end(); task_by_name_it++) {
cout << task_by_name_it->first << endl;
}
cout << "B) ENV TASKS: " << env_tasks_by_name.size() << endl;
for(etn_it=env_tasks_by_name.begin();etn_it!=env_tasks_by_name.end(); etn_it++) {
cout << etn_it->first << endl;
}
*/
// First, looks for the logic address (TASK) in the declared system-level tasks
task_info_it = task_info_by_name.find(elem_name);
// if found, it returns the logic address of the system task
if(task_info_it != task_info_by_name.end()) return task_info_it->second->get_address();
// Reaching this point means that no task with such a name is found in the system task set,
// so it tries to find it in the environment set
task_info_it = env_tasks_by_name.find(elem_name);
if(task_info_it != env_tasks_by_name.end()) return task_info_it->second->get_address(); // logic_address is task_base_t pointer
else {
msg = "Logic address (task info pointer) could not be obtained for task ";
msg += elem_name;
SC_REPORT_ERROR("KisTA", msg.c_str());
}
}
void scverify_top::deadlock_notify() {
if (deadlocked.read() == SC_LOGIC_1) {
testbench_INST->check_results();
SC_REPORT_ERROR("System","Simulation deadlock detected");
sc_stop();
}
}
void
sc_signal_invalid_writer( sc_object* target, sc_object* first_writer,
sc_object* second_writer, bool check_delta )
{
if ( second_writer )
{
std::stringstream msg;
msg
<< "\n signal "
"`" << target->name() << "' "
"(" << target->kind() << ")"
<< "\n first driver "
"`" << first_writer->name() << "' "
" (" << first_writer->kind() << ")"
<< "\n second driver "
"`" << second_writer->name() << "' "
"(" << second_writer->kind() << ")";
if( check_delta )
{
msg << "\n first conflicting write in delta cycle "
<< sc_delta_count();
}
SC_REPORT_ERROR( SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_,
msg.str().c_str() );
}
}
void
sc_bit::invalid_value( int i )
{
char msg[BUFSIZ];
std::sprintf( msg, "sc_bit( %d )", i );
SC_REPORT_ERROR( sc_core::SC_ID_VALUE_NOT_VALID_, msg );
}
tlm::tlm_response_status
Bus::write(ensitlm::addr_t a, ensitlm::data_t d)
{
if(a % sizeof(ensitlm::data_t)) {
SC_REPORT_ERROR(name(),
"unaligned write");
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
}
addr_map_t::iterator it = addr_map.find(addr_range(a, a));
if(it == addr_map.end()) {
std::cerr << name() << ": no target at address " <<
std::hex << a << std::endl;
return tlm::TLM_ADDRESS_ERROR_RESPONSE;
}
#ifdef DEBUG
std::cout << "Debug: " << name() <<
": write access at 0x" << std::hex << a <<
" (data: 0x" << d << ")\n";
#endif
tlm::tlm_response_status s =
initiator.write(a - (*it).first.begin, d, (*it).second);
return s;
}
sc_module* uvm_ml_tlm_rec::create_sc_module_instance
(std::string defName,
std::string instName
)
{
sc_module* m = 0;
try {
const char* ccdefName = defName.c_str();
uvm_ml_new_module_func f = 0;
if (!new_module_funcs ||
!(f = (*new_module_funcs)[ccdefName])) {
char msg[1024];
sprintf(msg, "SystemC module name is '%s'", defName.c_str());
SC_REPORT_ERROR(msg,"\n");
}
// replace "." or ":" in the instName with "_"
// sc_string_old spurepath = purify_name(instName);
std::string spurepath = purify_name(instName);
try {
m = (*f)(spurepath.c_str());
}
UVM_ML_CATCH_SC_KERNEL_EXCEPTION_1
(
UVM_ML_CREATE_SC_INST, 0, "", instName.c_str()
)
}
UVM_ML_CATCH_SC_KERNEL_EXCEPTION_1(UVM_ML_CREATE_SC_INST_2, 0, instName.c_str(), 0)
return m;
}
// conversion factor for desired output data rates
double conv_data_rate_factor(char unit) {
std::string rpt_msg;
if(unit == 'b') {
return 1.0;
}
else
if(unit == 'B') {
return 0.125; // 1.0/8.0
}
else
if( (unit == 'K') || (unit == 'k')) {
return 0.001;
}
else
if(unit == 'M') {
return 0.000001;
}
else
if(unit == 'G') {
return 0.000000001;
}
else
if(unit == 'T') {
return 0.000000000001;
}
else {
rpt_msg = "Unknown unit. Supported units for throughput are 'b' (bps), 'B' (Bytes/s), 'K' or 'k' (Kbps), 'M' (Mbps), 'G' (Gbps) and 'T' (Tbps).";
SC_REPORT_ERROR("KisTA",rpt_msg.c_str());
}
}
void sc_clock::register_port( sc_port_base& port, const char* if_typename_ )
{
std::string nm( if_typename_ );
if( nm == typeid( sc_signal_inout_if<bool> ).name() ) {
SC_REPORT_ERROR(SC_ID_ATTEMPT_TO_BIND_CLOCK_TO_OUTPUT_, "");
}
}
//------------------------------------------------------------------------------
//"sc_method_process::sc_method_process"
//
// This is the object instance constructor for this class.
//------------------------------------------------------------------------------
sc_method_process::sc_method_process( const char* name_p,
bool free_host, SC_ENTRY_FUNC method_p,
sc_process_host* host_p, const sc_spawn_options* opt_p
):
sc_process_b(
name_p && name_p[0] ? name_p : sc_gen_unique_name("method_p"),
free_host, method_p, host_p, opt_p)
{
// CHECK IF THIS IS AN sc_module-BASED PROCESS AND SIMUALTION HAS STARTED:
if ( DCAST<sc_module*>(host_p) != 0 && sc_is_running() )
{
SC_REPORT_ERROR( SC_ID_MODULE_METHOD_AFTER_START_, "" );
}
// INITIALIZE VALUES:
//
// If there are spawn options use them.
m_process_kind = SC_METHOD_PROC_;
if (opt_p)
{
m_dont_init = opt_p->m_dont_initialize;
// traverse event sensitivity list
for (unsigned int i = 0; i < opt_p->m_sensitive_events.size(); i++)
{
sc_sensitive::make_static_sensitivity(
this, *opt_p->m_sensitive_events[i]);
}
// traverse port base sensitivity list
for ( unsigned int i = 0; i < opt_p->m_sensitive_port_bases.size(); i++)
{
sc_sensitive::make_static_sensitivity(
this, *opt_p->m_sensitive_port_bases[i]);
}
// traverse interface sensitivity list
for ( unsigned int i = 0; i < opt_p->m_sensitive_interfaces.size(); i++)
{
sc_sensitive::make_static_sensitivity(
this, *opt_p->m_sensitive_interfaces[i]);
}
// traverse event finder sensitivity list
for ( unsigned int i = 0; i < opt_p->m_sensitive_event_finders.size();
i++)
{
sc_sensitive::make_static_sensitivity(
this, *opt_p->m_sensitive_event_finders[i]);
}
}
else
{
m_dont_init = false;
}
}
