void pb_enter_default_mode_from_reset(void)
{
// PB0 Setup (SPI MISO=PB0.6, SCLK=PB0.5,MOSI=PB0.7,CS=PB0.8)
SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_0, 0x0040);
SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_0, 0x01A0);
SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_0, 0xFE1F);
// PB1 Setup (UART TX = PB1.12, RX = PB1.13)
SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_1, 0x2000);
SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_1, 0x1008);
SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_1, 0x0FFF);
// Enable Crossbar0 signals & set properties
SI32_PBCFG_A_enable_xbar0l_peripherals(SI32_PBCFG_0,
SI32_PBCFG_A_XBAR0L_SPI0EN |
SI32_PBCFG_A_XBAR0L_SPI0NSSEN);
SI32_PBCFG_A_enable_xbar0h_peripherals(SI32_PBCFG_0, SI32_PBCFG_A_XBAR0H_UART0EN);
SI32_PBCFG_A_enable_crossbar_0(SI32_PBCFG_0);
// PB2 Setup (SDSW = PB2.9, PB2.10 and PB2.11 are LEDs)
SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_2, 0x0200);
SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x0C00);
// Enable Crossbar1 signals & set properties
SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0);
}
void hw_init()
{
usb_pcb_t *pcb = usb_pcb_get();
SI32_CLKCTRL_0->APBCLKG0_SET = SI32_CLKCTRL_A_APBCLKG0_PLL0CEN_ENABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_PB0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_USART0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_USART1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_UART0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_UART1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_SPI0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_SPI1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_SPI2CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_I2C0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_I2C1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_EPCA0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_PCA0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_PCA1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_SSG0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_TIMER0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_TIMER1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_ADC0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_ADC1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_CMP0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_CMP1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_CS0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_AES0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_CRC0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_IDAC0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_IDAC1CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_LPT0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_I2S0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_USB0CEN_ENABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_EVREGCEN_DISABLED_U32 |
SI32_CLKCTRL_A_APBCLKG0_FLCTRLCEN_ENABLED_U32;
SI32_CLKCTRL_0->AHBCLKG_SET = SI32_CLKCTRL_A_AHBCLKG_RAMCEN_ENABLED_U32 |
SI32_CLKCTRL_A_AHBCLKG_DMACEN_DISABLED_U32 |
SI32_CLKCTRL_A_AHBCLKG_FLASHCEN_ENABLED_U32 |
SI32_CLKCTRL_A_AHBCLKG_EMIF0CEN_DISABLED_U32 |
SI32_CLKCTRL_A_AHBCLKG_USB0BCEN_ENABLED_U32;
SI32_WDTIMER_A_stop_counter(SI32_WDTIMER_0);
#ifdef PCB_V7
int pcb_v7_is_defined; //Will show a compiler warning to note hardware version
// Setup PBHD4
SI32_PBCFG_A_unlock_ports(SI32_PBCFG_0);
SI32_PBHD_A_write_pblock(SI32_PBHD_4, 0x00);
SI32_PBHD_A_select_pin0_safe_state(SI32_PBHD_4, 0x0);
SI32_PBHD_A_select_pin1_safe_state(SI32_PBHD_4, 0x0);
SI32_PBHD_A_select_pin2_safe_state(SI32_PBHD_4, 0x0);
SI32_PBHD_A_select_pin3_safe_state(SI32_PBHD_4, 0x0);
SI32_PBHD_A_select_pin4_safe_state(SI32_PBHD_4, 0x0);
SI32_PBHD_A_select_pin5_safe_state(SI32_PBHD_4, 0x0);
SI32_PBHD_A_enable_bias(SI32_PBHD_4);
SI32_PBHD_A_select_normal_power_port_mode(SI32_PBHD_4);
SI32_PBHD_A_enable_drivers(SI32_PBHD_4);
//Setup PB4.3 LED0/1
//Setup PB4.2 to LOW to turn on mosfets for bat charger!
SI32_PBHD_A_set_pins_push_pull_output( SI32_PBHD_4, 0x000C );
SI32_PBHD_A_disable_pullup_resistors( SI32_PBHD_4 );
SI32_PBHD_A_write_pins_low( SI32_PBHD_4, 0x04 );
SI32_PBHD_A_write_pins_high( SI32_PBHD_4, 0x08 );
SI32_PBCFG_A_enable_crossbar_0(SI32_PBCFG_0);
// Setup PB2
SI32_PBSTD_A_disable_pullup_resistors( SI32_PBSTD_2 );
// PB2.1 is wakeup
SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_2, 0x00000002);
// Setup PB3
SI32_PBSTD_A_disable_pullup_resistors( SI32_PBSTD_3 );
//PB3.9 is usb voltage detection
SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_3, 0x00000200);
#else
int pcb_v5_is_defined; //Will show a compiler warning to note hardware version
#endif
/* --------------------- */
/* Initialize USB Module */
/* --------------------- */
SI32_USB_A_enable_usb_oscillator(SI32_USB_0);
SI32_USB_A_verify_clock_is_running(SI32_USB_0);
SI32_USB_A_select_usb_clock_48mhz (SI32_USB_0);
// Perform asynchronous reset of the USB module
SI32_USB_A_reset_module(SI32_USB_0);
// Wait for reset to complete
while (SI32_USB_0->CLKSEL.RESET == SI32_USB_A_CLKSEL_RESET_SET_VALUE);
SI32_USB_A_write_cmint (SI32_USB_0, 0x00000000);
SI32_USB_A_write_ioint (SI32_USB_0, 0x00000000);
SI32_USB_A_enable_ep0_interrupt (SI32_USB_0);
// Enable Reset, Resume, Suspend interrupts
SI32_USB_A_enable_suspend_interrupt (SI32_USB_0);
SI32_USB_A_enable_resume_interrupt (SI32_USB_0);
SI32_USB_A_enable_reset_interrupt (SI32_USB_0);
//SI32_USB_A_enable_start_of_frame_interrupt (SI32_USB_0);
// Enable Transceiver, fullspeed
SI32_USB_A_write_tcontrol (SI32_USB_0, 0x00);
SI32_USB_A_select_transceiver_full_speed (SI32_USB_0);
SI32_USB_A_enable_transceiver (SI32_USB_0);
// _SI32_USB_A_enable_internal_pull_up (SI32_USB_0);
SI32_USB_A_enable_internal_pull_up( SI32_USB_0 );
// Enable clock recovery, single-step mode disabled
SI32_USB_A_enable_clock_recovery (SI32_USB_0);
SI32_USB_A_select_clock_recovery_mode_full_speed (SI32_USB_0);
SI32_USB_A_select_clock_recovery_normal_cal (SI32_USB_0);
SI32_USB_0->CMINTEPE.U32 |= (1<<16) ;
SI32_USB_0->CMINTEPE.U32 |= 7;
NVIC_EnableIRQ (USB0_IRQn);
SI32_USB_A_enable_module( SI32_USB_0 );
pcb->connected = true;
}
