static void
finalize_instance(conf_object_t *self)
{
int err;
uart_sampler_t *s = (uart_sampler_t *)self;
uart_sampler_conf_t *c = (uart_sampler_conf_t *)s->conf;
err = sampler_init(&s->sampler);
E_IF(err, "sampler_init", E_VOID);
s->sampler.usf_base_path = c->file_base_name;
s->sampler.sample_period = c->sample_period;
s->sampler.burst_period = c->burst_period;
s->sampler.burst_size = c->burst_size;
s->sampler.line_size_lg2 = c->line_size_lg2;
s->sampler.seed = 0;
if (!strncmp(c->burst_rnd_type, "const", 5)) {
s->sampler.burst_rnd = sampler_rnd_const;
} else {
s->sampler.burst_rnd = sampler_rnd_exp;
}
if (!strncmp(c->sample_rnd_type, "const", 5)) {
s->sampler.sample_rnd = sampler_rnd_const;
} else {
s->sampler.sample_rnd = sampler_rnd_exp;
}
if (!s->sampler.burst_size) {
err = sampler_burst_begin(&s->sampler, 0);
E_IF(err, "sampler_burst_begin", E_VOID);
}
if (!c->master) {
SIM_hap_add_callback("Uart_Sampler_Burst_Begin", hap_cb_begin, s);
SIM_hap_add_callback("Uart_Sampler_Burst_End", hap_cb_end, s);
}
}
//**************************************************************************
void init_local() {
class_data_t ruby_funcs;
conf_class_t *ruby_class;
conf_object_t *ruby_obj;
attr_value_t val;
conf_object_t *phys_mem0;
/* Initialize and register the class "ruby-class". */
bzero(&ruby_funcs, sizeof(class_data_t));
ruby_funcs.new_instance = ruby_new_instance;
ruby_funcs.delete_instance = NULL;
ruby_class = SIM_register_class("ruby", &ruby_funcs);
/* initialize the variable reader: sets all global variables to defaults */
init_variables();
/* Initialize and register the timing-model interface */
ruby_timing_interface = MM_ZALLOC(1, timing_model_interface_t);
ruby_timing_interface->operate = ruby_operate;
SIM_register_interface(ruby_class, "timing-model", ruby_timing_interface);
ruby_obj = SIM_new_object(ruby_class, "ruby0");
phys_mem0 = SIM_get_object("phys_mem0");
if(phys_mem0 == NULL) {
/* Look for an object called "phys_mem" instead */
SIM_clear_exception();
phys_mem0 = SIM_get_object("phys_mem");
}
if(phys_mem0 == NULL) {
/* Okay, now we can panic */
#ifndef SIMICS30
/*
* Must load a checkpoint BEFORE load-module ruby
*/
printf("Please load a checkpoint BEFORE executing \"load-module ruby\"\n");
#endif
#ifdef SIMICS30
/*
* This case arises because of Simics 3.0:
* Simics 3.0 loads and "digitally signs" modules immediately after compiling them.
* This raises havoc with Multifacet's modules, since most of them require a checkpoint
* to be loaded BEFORE the module.
*/
printf("\033[34;1m\n");
printf(" /***************************************************************************\\\n");
printf(" > Physical Memory object cannot be found. If you are NOT compiling Ruby and <\n");
printf(" > you see this message, something is wrong. <\n");
printf(" > This message is part of the normal compilation process. <\n");
printf(" \\***************************************************************************/\033[m\n\n");
#endif
SIM_clear_exception();
return;
}
val.kind = Sim_Val_Object;
val.u.object = ruby_obj;
set_error_t install_error = SIM_set_attribute(phys_mem0, "timing_model", &val);
if (install_error == Sim_Set_Ok) {
printf( "successful installation of the ruby timing model.\n");
} else {
printf( "error installing ruby timing model.\n");
exit(1);
}
/* Initialize the snoop interface if we are tracking values in simics */
if (init_use_snoop() == 1) {
ruby_observe_interface = MM_ZALLOC(1, timing_model_interface_t);
ruby_observe_interface->operate = ruby_observe;
SIM_register_interface(ruby_class, "snoop-memory", ruby_observe_interface);
SIM_set_attribute(phys_mem0, "snoop_device", &val);
}
/* init_opal_interface calls to a static function in OpalInterface.C
* to determine is opal is installed. If it is, it registers itself,
* and notifies opal that ruby is loaded. Otherwise, it does nothing. */
opal_interface = MM_ZALLOC(1, mf_ruby_api_t);
SIM_register_interface(ruby_class, "mf-ruby-api", opal_interface);
init_opal_interface( opal_interface );
// register a number of commands
#define RUBY_COMMAND( COMMAND ) \
SIM_register_attribute( ruby_class, COMMAND, \
initvar_dispatch_get, (void *) COMMAND, \
initvar_dispatch_set, (void *) COMMAND, \
Sim_Attr_Session, \
"See documentation with associated ruby command." )
RUBY_COMMAND( "init" );
RUBY_COMMAND( "readparam" );
RUBY_COMMAND( "saveparam" );
RUBY_COMMAND( "param" );
RUBY_COMMAND( "dump-stats" );
RUBY_COMMAND( "dump-short-stats" );
RUBY_COMMAND( "periodic-stats-file" );
RUBY_COMMAND( "periodic-stats-interval" );
RUBY_COMMAND( "clear-stats" );
RUBY_COMMAND( "system-recovery" );
RUBY_COMMAND( "debug-verb" );
RUBY_COMMAND( "debug-filter" );
RUBY_COMMAND( "debug-output-file" );
RUBY_COMMAND( "debug-start-time" );
RUBY_COMMAND( "set-checkpoint-interval" );
RUBY_COMMAND( "load-caches" );
RUBY_COMMAND( "save-caches" );
RUBY_COMMAND( "dump-cache" );
RUBY_COMMAND( "dump-cache-data" );
RUBY_COMMAND( "tracer-output-file" );
RUBY_COMMAND( "set-procs-per-chip" );
RUBY_COMMAND( "abort-all" );
RUBY_COMMAND( "xact-visualizer-file" );
RUBY_COMMAND( "print-temp" );
RUBY_COMMAND( "reset-temp" );
RUBY_COMMAND( "print-reuse" );
RUBY_COMMAND( "reset-reuse" );
// Add end_transaction magic callback
SIM_hap_add_callback("Core_Magic_Instruction", (obj_hap_func_t) magic_instruction_callback, NULL);
#ifdef SPARC
SIM_hap_add_callback("Core_Exception", (obj_hap_func_t) ctrl_exception_start, NULL);
SIM_hap_add_callback("Core_Exception_Return", (obj_hap_func_t) ctrl_exception_done, NULL);
SIM_hap_add_callback("Core_Mode_Change", (obj_hap_func_t) change_mode_callback, NULL);
/// for MMU
SIM_hap_add_callback("MMU_Data_TLB_Demap", (obj_hap_func_t) dtlb_demap_callback, NULL);
SIM_hap_add_callback("MMU_Data_TLB_Map", (obj_hap_func_t) dtlb_map_callback, NULL);
SIM_hap_add_callback("MMU_Data_TLB_Overwrite", (obj_hap_func_t) dtlb_overwrite_callback, NULL);
SIM_hap_add_callback("MMU_Data_TLB_Replace", (obj_hap_func_t) dtlb_replace_callback, NULL);
// Add callbacks to abort transactions on exceptions in Rock.
//
SIM_hap_add_callback("Core_Exception", (obj_hap_func_t) rock_exception_start, (void *) NULL);
SIM_hap_add_callback("Core_Exception_Return", (obj_hap_func_t) rock_exception_done, (void *) NULL);
// Add instruction decoder to install handlers for Rock-specific behavior.
//
decoder_t* decoder = ATMTP_create_instruction_decoder();
SIM_register_arch_decoder(decoder, NULL, 0);
#endif
// CM 2/2003:
// Note: Please register other callbacks in the appropriate interface file,
// instead of here. This module should only register callbacks that
// are common to the "Driver" class (parent class to SimicsInterface
// and OpalInterface).
// If its only used by SimicsInterface, put it in that class.
}
