/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
volatile uint32_t u32InitCount;
uint32_t au32CAPValus[10];
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU @ %d Hz\n", SystemCoreClock);
printf("+---------------------------------------------------+\n");
printf("| Timer External Capture Function Sample Code |\n");
printf("+---------------------------------------------------+\n\n");
printf("# Timer Settings:\n");
printf(" Timer0: Clock source is 12 MHz; Toggle-output mode and frequency is 500 Hz.\n");
printf(" Timer3: Clock source is 12 MHz; Toggle-output mode and frequency is 1 Hz.\n");
printf(" Timer2: Clock source is HCLK(72 MHz); Continuous counting mode; TCMP is 0xFFFFFF;\n");
printf(" Counter pin enable; Capture pin and capture interrupt enable;\n");
printf("# Generate 500 Hz frequency from TM0 and connect TM0 pin to Timer2 counter pin.\n");
printf("# Generate 1 Hz frequency from TM3 and connect TM3 pin to TM2_EXT capture pin.\n");
printf("# Get 500 event counts from Timer2 counter pin when each TM2_EXT pin interrupt occurred.\n\n");
/* Initial Timer0 and Timer3 default setting */
TIMER_Open(TIMER0, TIMER_TOGGLE_MODE, 1000);
TIMER_Open(TIMER3, TIMER_TOGGLE_MODE, 2);
/* Initial Timer2 default setting */
TIMER_Open(TIMER2, TIMER_CONTINUOUS_MODE, 1);
/* Configure Timer2 setting for external counter input and capture function */
TIMER_SET_PRESCALE_VALUE(TIMER2, 0);
TIMER_SET_CMP_VALUE(TIMER2, 0xFFFFFF);
TIMER_EnableEventCounter(TIMER2, TIMER_COUNTER_FALLING_EDGE);
TIMER_EnableCapture(TIMER2, TIMER_CAPTURE_FREE_COUNTING_MODE, TIMER_CAPTURE_FALLING_EDGE);
TIMER_EnableCaptureInt(TIMER2);
/* Enable Timer2 NVIC */
NVIC_EnableIRQ(TMR2_IRQn);
/* Clear Timer2 interrupt counts to 0 */
u32InitCount = g_au32TMRINTCount[2] = 0;
/* Start Timer0, Timer2 and Timer3 counting */
TIMER_Start(TIMER0);
TIMER_Start(TIMER2);
TIMER_Start(TIMER3);
/* Check TM2_EXT interrupt counts */
while(1) {
if(g_au32TMRINTCount[2] != u32InitCount) {
au32CAPValus[u32InitCount] = TIMER_GetCaptureData(TIMER2);
printf("[%2d] - %4d\n", g_au32TMRINTCount[2], au32CAPValus[u32InitCount]);
if(u32InitCount > 1) {
if((au32CAPValus[u32InitCount] - au32CAPValus[u32InitCount - 1]) != 500) {
printf("*** FAIL ***\n");
while(1);
}
}
u32InitCount = g_au32TMRINTCount[2];
}
if(u32InitCount == 10)
break;
}
/* Stop Timer0, Timer2 and Timer3 counting */
TIMER_Close(TIMER0);
TIMER_Close(TIMER2);
TIMER_Close(TIMER3);
printf("*** PASS ***\n");
while(1);
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Unlock protected registers */
SYS_UnlockReg();
/* Enable Internal RC clock */
SYSCLK->PWRCON |= SYSCLK_PWRCON_IRC22M_EN_Msk;
/* Waiting for IRC22M clock ready */
SYS_WaitingForClockReady(SYSCLK_CLKSTATUS_IRC22M_STB_Msk);
/* Switch HCLK clock source to Internal RC */
SYSCLK->CLKSEL0 = SYSCLK_CLKSEL0_HCLK_IRC22M;
/* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware.*/
SYSCLK->PLLCON |= SYSCLK_PLLCON_PD_Msk;
/* Enable external 12MHz XTAL, internal 22.1184MHz */
SYSCLK->PWRCON |= SYSCLK_PWRCON_XTL12M_EN_Msk | SYSCLK_PWRCON_IRC22M_EN_Msk;
/* Enable PLL and Set PLL frequency */
SYSCLK->PLLCON = PLLCON_SETTING;
/* Waiting for clock ready */
SYS_WaitingForClockReady(SYSCLK_CLKSTATUS_PLL_STB_Msk | SYSCLK_CLKSTATUS_XTL12M_STB_Msk | SYSCLK_CLKSTATUS_IRC22M_STB_Msk);
/* Switch HCLK clock source to PLL, STCLK to HCLK/2 */
SYSCLK->CLKSEL0 = SYSCLK_CLKSEL0_STCLK_HCLK_DIV2 | SYSCLK_CLKSEL0_HCLK_PLL;
/* Enable IP clock */
SYSCLK->APBCLK = SYSCLK_APBCLK_UART0_EN_Msk|SYSCLK_APBCLK_PWM45_EN_Msk|SYSCLK_APBCLK_PWM67_EN_Msk;
/* IP clock source */
SYSCLK->CLKSEL1 = SYSCLK_CLKSEL1_UART_PLL;
/* IP clock source */
SYSCLK->CLKSEL2 = SYSCLK_CLKSEL2_PWM45_XTAL|SYSCLK_CLKSEL2_PWM67_XTAL;
/* Reset PWMB channel0~channel3 */
SYS->IPRSTC2 = SYS_IPRSTC2_PWM47_RST_Msk;
SYS->IPRSTC2 = 0;
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */
//SystemCoreClockUpdate();
PllClock = PLL_CLOCK; // PLL
SystemCoreClock = PLL_CLOCK / 1; // HCLK
CyclesPerUs = PLL_CLOCK / 1000000; // For SYS_SysTickDelay()
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set P3 multi-function pins for UART0 RXD and TXD */
SYS->P3_MFP = SYS_MFP_P30_RXD0 | SYS_MFP_P31_TXD0;
/* Set P2 multi-function pins for PWMB Channel0~3 */
SYS->P2_MFP = SYS_MFP_P24_PWM4|SYS_MFP_P25_PWM5|SYS_MFP_P26_PWM6|SYS_MFP_P27_PWM7;
/* Lock protected registers */
SYS_LockReg();
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
int32_t i32Err, i32TimeOutCnt;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU @ %dHz\n", SystemCoreClock);
printf("+-------------------------------------------------+\n");
printf("| PB.3(Output) and PD.7(Input) Sample Code |\n");
printf("+-------------------------------------------------+\n\n");
/*-----------------------------------------------------------------------------------------------------*/
/* GPIO Basic Mode Test --- Use Pin Data Input/Output to control GPIO pin */
/*-----------------------------------------------------------------------------------------------------*/
printf(" >> Please connect PB.3 and PD.7 first << \n");
printf(" Press any key to start test by using [Pin Data Input/Output Control] \n\n");
getchar();
/* Configure PB.3 as Output mode and PD.7 as Input mode then close it */
GPIO_SetMode(PB, BIT3, GPIO_MODE_OUTPUT);
GPIO_SetMode(PD, BIT7, GPIO_MODE_INPUT);
i32Err = 0;
printf("GPIO PB.3(output mode) connect to PD.7(input mode) ......");
/* Use Pin Data Input/Output Control to pull specified I/O or get I/O pin status */
/* Set PB.3 output pin value is low */
PB3 = 0;
/* Set time out counter */
i32TimeOutCnt = 100;
/* Wait for PD.7 input pin status is low for a while */
while(PD7 != 0)
{
if(i32TimeOutCnt > 0)
{
i32TimeOutCnt--;
}
else
{
i32Err = 1;
break;
}
}
/* Set PB.3 output pin value is high */
PB3 = 1;
/* Set time out counter */
i32TimeOutCnt = 100;
/* Wait for PD.7 input pin status is high for a while */
while(PD7 != 1)
{
if(i32TimeOutCnt > 0)
{
i32TimeOutCnt--;
}
else
{
i32Err = 1;
break;
}
}
/* Print test result */
if(i32Err)
{
printf(" [FAIL].\n");
}
else
{
printf(" [OK].\n");
}
/* Configure PB.3 and PD.7 to default Quasi-bidirectional mode */
GPIO_SetMode(PB, BIT3, GPIO_MODE_QUASI);
GPIO_SetMode(PD, BIT7, GPIO_MODE_QUASI);
while(1);
}
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
double dPeriodTime;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("CPU @ %d Hz\n", SystemCoreClock);
printf("+------------------------------------------------+\n");
printf("| WWDT Compare March Interrupt Sample Code |\n");
printf("+------------------------------------------------+\n\n");
/* To check if system has been reset by WWDT time-out reset or not */
if(WWDT_GET_RESET_FLAG() == 1)
{
WWDT_CLEAR_RESET_FLAG();
printf("*** System has been reset by WWDT time-out reset event. [WWDTCR: 0x%08X] ***\n\n", WWDT->WWDTCR);
while(1);
}
dPeriodTime = (((double)(1000000 * 2048) / (double)SystemCoreClock) * 1024) * 32;
printf("# WWDT Settings: \n");
printf(" - Clock source is HCLK/2048 (%d Hz) \n", SystemCoreClock / 2048);
printf(" - WWDT counter prescale period is 1024, \n");
printf(" and max WWDT time-out period is 1024 * (64 * WWDT_CLK)\n");
printf(" - Interrupt enable \n");
printf(" - Window Compare value is 32 \n");
printf("# System will generate first WWDT compare match interrupt event after %.2f us.\n", dPeriodTime);
printf(" 1.) use PA.0 high/low period to check WWDT compare match interrupt period time\n");
printf(" 2.) reload WWDT counter value to avoid WWDT time-out reset system occurred\n");
printf(" when interrupt counts less than 11.\n");
printf(" 3.) do not reload WWDT counter value to generate WWDT time-out reset system event\n");
printf(" when interrupt counts large than 10.\n\n");
/* Use PA.0 to check WWDT compare match interrupt period time */
PA->PMD = 0xFFFFFFFD;
PA0 = 1;
/* Enable WDT/WWDT NVIC */
NVIC_EnableIRQ(WDT_IRQn);
g_u32WWDTINTCount = 0;
/*
Max time-out period is 1024*(64*WWDT_CLK);
WWDT compare value is 32;
Enable WWDT compare match interrupt;
*/
/* Note: WWDTCR register can be written only once after chip is powered on or reset */
WWDT->WWDTCR = WWDT_PRESCALER_1024 |
(32 << WWDT_WWDTCR_WINCMP_Pos) |
WWDT_WWDTCR_WWDTIE_Msk |
WWDT_WWDTCR_WWDTEN_Msk;
printf("[WWDTCR: 0x%08X]\n\n", WWDT->WWDTCR);
while(1);
}
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
volatile uint32_t u32InitCount;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU @ %d Hz\n", SystemCoreClock);
printf("+-------------------------------------------------+\n");
printf("| Timer0 Power-down and Wake-up Sample Code |\n");
printf("+-------------------------------------------------+\n\n");
printf("# Timer Settings:\n");
printf(" Timer0: Clock source is LIRC(10 kHz); Toggle-output mode and frequency is 1 Hz; Enable interrupt and wake-up.\n");
printf("# System will enter to Power-down mode while Timer0 interrupt count is reaching 3;\n");
printf(" And be waken-up while Timer0 interrupt count is reaching 4.\n\n");
/* To program PWRCON register, it needs to disable register protection first. */
SYS_UnlockReg();
/* Open Timer0 frequency to 1 Hz in toggle-output mode */
TIMER_Open(TIMER0, TIMER_TOGGLE_MODE, 1);
/* Enable Timer0 interrupt and wake-up function */
TIMER_EnableInt(TIMER0);
TIMER_EnableWakeup(TIMER0);
/* Enable Timer0 NVIC */
NVIC_EnableIRQ(TMR0_IRQn);
/* Start Timer0 counting */
TIMER_Start(TIMER0);
u32InitCount = g_u8IsTMR0WakeupFlag = g_au32TMRINTCount[0] = 0;
while(g_au32TMRINTCount[0] < 10) {
if(g_au32TMRINTCount[0] != u32InitCount) {
printf("Timer0 interrupt count - %d\n", g_au32TMRINTCount[0]);
if(g_au32TMRINTCount[0] == 3) {
PowerDownFunction();
/* Check if Timer0 time-out interrupt and wake-up flag occurred */
while(1) {
if(((CLK->PWRCON & CLK_PWRCON_PD_WU_STS_Msk) == CLK_PWRCON_PD_WU_STS_Msk) && (g_u8IsTMR0WakeupFlag == 1))
break;
}
printf("System has been waken-up done. (Timer0 interrupt count is %d)\n\n", g_au32TMRINTCount[0]);
}
u32InitCount = g_au32TMRINTCount[0];
}
}
/* Stop Timer0 counting */
TIMER_Stop(TIMER0);
printf("*** PASS ***\n");
while(1);
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
uint32_t i;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
/*
This sample code sets I2C bus clock to 100kHz. Then, accesses EEPROM 24LC64 with Byte Write
and Byte Read operations, and check if the read data is equal to the programmed data.
*/
printf("+-------------------------------------------------------+\n");
printf("| M05xx I2C Driver Sample Code with EEPROM 24LC64 |\n");
printf("+-------------------------------------------------------+\n");
/* Init I2C0 to access EEPROM */
I2C0_Init();
g_u8DeviceAddr = 0x50;
for(i = 0; i < 0x100; i++)
{
g_au8TxData[0] = (uint8_t)((i & 0xFF00) >> 8);
g_au8TxData[1] = (uint8_t)(i & 0x00FF);
g_au8TxData[2] = (uint8_t)(g_au8TxData[1] + 3);
g_u8DataLen = 0;
g_u8EndFlag = 0;
/* I2C function to write data to slave */
s_I2C0HandlerFn = (I2C_FUNC)I2C_MasterTx;
/* I2C as master sends START signal */
I2C_SET_CONTROL_REG(I2C0, I2C_I2CON_STA);
/* Wait I2C Tx Finish */
while(g_u8EndFlag == 0);
g_u8EndFlag = 0;
/* I2C function to read data from slave */
s_I2C0HandlerFn = (I2C_FUNC)I2C_MasterRx;
/* Set EEPROM Addres */
g_u8DataLen = 0;
g_u8DeviceAddr = 0x50;
I2C_SET_CONTROL_REG(I2C0, I2C_I2CON_STA);
/* Wait I2C Rx Finish */
while(g_u8EndFlag == 0);
/* Compare data */
if(g_u8RxData != g_au8TxData[2])
{
printf("I2C Byte Write/Read Failed, Data 0x%x\n", g_u8RxData);
return -1;
}
}
printf("I2C Access EEPROM Test OK\n");
s_I2C0HandlerFn = NULL;
/* Close I2C0 */
I2C0_Close();
return 0;
}
void DataFlashWrite(uint32_t addr, uint32_t size, uint32_t buffer)
{
/* This is low level write function of USB Mass Storage */
int32_t len, i, offset;
uint32_t *pu32;
uint32_t alignAddr;
/* Modify the address to MASS_STORAGE_OFFSET */
addr += MASS_STORAGE_OFFSET;
len = (int32_t)size;
SYS_UnlockReg();
FMC_Open();
if ( len == FLASH_PAGE_SIZE && ((addr & (FLASH_PAGE_SIZE-1)) == 0) )
{
FMC_Erase(addr);
while (len >= FLASH_PAGE_SIZE)
{
FMC_ProgramPage(addr, (uint32_t *) buffer);
len -= FLASH_PAGE_SIZE;
buffer += FLASH_PAGE_SIZE;
addr += FLASH_PAGE_SIZE;
}
}
else
{
do
{
alignAddr = addr & 0x1FE00;
/* Get the sector offset*/
offset = ( addr & (FLASH_PAGE_SIZE-1) );
if ( offset || (size < FLASH_PAGE_SIZE) )
{
/* Non 4k alignment. Note: It needs to avoid add MASS_STORAGE_OFFSET twice. */
DataFlashRead(alignAddr - MASS_STORAGE_OFFSET, FLASH_PAGE_SIZE, (uint32_t)&g_sectorBuf[0]);
}
/* Update the data */
pu32 = (uint32_t *)buffer;
len = FLASH_PAGE_SIZE - offset;
if (size < len)
len = size;
for (i=0; i<len/4; i++)
{
g_sectorBuf[offset/4 + i] = pu32[i];
}
FMC_Erase(alignAddr);
for(i=0; i<16; i++)
{
FMC_ProgramPage(alignAddr + (i << 8), (uint32_t *) g_sectorBuf + (i << 8));
}
size -= len;
addr += len;
buffer += len;
}
while (size > 0);
}
FMC_Close();
SYS_LockReg();
}
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
volatile uint32_t u32InitCount;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("CPU @ %d Hz\n", SystemCoreClock);
printf("+--------------------------------------------+\n");
printf("| Timer Periodic Interrupt Sample Code |\n");
printf("+--------------------------------------------+\n\n");
printf("# Timer0 Settings:\n");
printf(" - Clock source is HXT \n");
printf(" - Time-out frequency is 1 Hz\n");
printf(" - Periodic mode \n");
printf(" - Interrupt enable \n");
printf("# Timer1 Settings:\n");
printf(" - Clock source is HCLK \n");
printf(" - Time-out frequency is 2 Hz\n");
printf(" - Periodic mode \n");
printf(" - Interrupt enable \n");
printf("# Timer2 Settings:\n");
printf(" - Clock source is HIRC \n");
printf(" - Time-out frequency is 4 Hz\n");
printf(" - Periodic mode \n");
printf(" - Interrupt enable \n");
printf("# Timer3 Settings:\n");
printf(" - Clock source is HXT \n");
printf(" - Time-out frequency is 8 Hz\n");
printf(" - Periodic mode \n");
printf(" - Interrupt enable \n");
printf("# Check Timer0 ~ Timer3 interrupt counts are reasonable or not.\n\n");
/* Open Timer0 in periodic mode, enable interrupt and 1 interrupt tick per second */
TIMER0->TCMPR = __HXT;
TIMER0->TCSR = TIMER_TCSR_IE_Msk | TIMER_PERIODIC_MODE;
TIMER_SET_PRESCALE_VALUE(TIMER0, 0);
/* Open Timer1 in periodic mode, enable interrupt and 2 interrupt ticks per second */
TIMER1->TCMPR = ((SystemCoreClock / 4) / 2);
TIMER1->TCSR = TIMER_TCSR_IE_Msk | TIMER_PERIODIC_MODE;
TIMER_SET_PRESCALE_VALUE(TIMER1, 3);
/* Open Timer2 in periodic mode, enable interrupt and 4 interrupt ticks per second */
TIMER2->TCMPR = ((__HIRC / 1) / 4);
TIMER2->TCSR = TIMER_TCSR_IE_Msk | TIMER_PERIODIC_MODE;
TIMER_SET_PRESCALE_VALUE(TIMER2, 0);
/* Open Timer3 in periodic mode, enable interrupt and 8 interrupt ticks per second */
TIMER3->TCMPR = ((__HXT / 1) / 8);
TIMER3->TCSR = TIMER_TCSR_IE_Msk | TIMER_PERIODIC_MODE;
TIMER_SET_PRESCALE_VALUE(TIMER3, 0);
/* Enable Timer0 ~ Timer3 NVIC */
NVIC_EnableIRQ(TMR0_IRQn);
NVIC_EnableIRQ(TMR1_IRQn);
NVIC_EnableIRQ(TMR2_IRQn);
NVIC_EnableIRQ(TMR3_IRQn);
/* Clear Timer0 ~ Timer3 interrupt counts to 0 */
g_au32TMRINTCount[0] = g_au32TMRINTCount[1] = g_au32TMRINTCount[2] = g_au32TMRINTCount[3] = 0;
u32InitCount = g_au32TMRINTCount[0];
/* Start Timer0 ~ Timer3 counting */
TIMER_Start(TIMER0);
TIMER_Start(TIMER1);
TIMER_Start(TIMER2);
TIMER_Start(TIMER3);
/* Check Timer0 ~ Timer3 interrupt counts */
printf("# Timer interrupt counts :\n");
while(u32InitCount < 20)
{
if(g_au32TMRINTCount[0] != u32InitCount)
{
printf(" TMR0:%3d TMR1:%3d TMR2:%3d TMR3:%3d\n",
g_au32TMRINTCount[0], g_au32TMRINTCount[1], g_au32TMRINTCount[2], g_au32TMRINTCount[3]);
u32InitCount = g_au32TMRINTCount[0];
if((g_au32TMRINTCount[1] > (g_au32TMRINTCount[0] * 2 + 1)) || (g_au32TMRINTCount[1] < (g_au32TMRINTCount[0] * 2 - 1)) ||
(g_au32TMRINTCount[2] > (g_au32TMRINTCount[0] * 4 + 1)) || (g_au32TMRINTCount[2] < (g_au32TMRINTCount[0] * 4 - 1)) ||
(g_au32TMRINTCount[3] > (g_au32TMRINTCount[0] * 8 + 1)) || (g_au32TMRINTCount[3] < (g_au32TMRINTCount[0] * 8 - 1)))
{
printf("*** FAIL ***\n");
while(1);
}
}
}
printf("*** PASS ***\n");
while(1);
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main (void)
{
uint8_t ch;
uint32_t u32Data;
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Init UART0 for printf */
UART0_Init();
/* Unlock protected registers for ISP function */
SYS_UnlockReg();
/* Enable ISP function */
FMC->ISPCON |= FMC_ISPCON_ISPEN_Msk;
/* Check the signature to check if Simple LD code is finished or not */
if (inp32(KEY_ADDR) == SIGNATURE)
{
/* Just clear SIGNATURE and finish the sample code if Simple LD code has been executed. */
outp32(KEY_ADDR, 0);
/* Read BS */
printf(" Boot Mode .................................. ");
if ((FMC->ISPCON & FMC_ISPCON_BS_Msk) == FMC_ISPCON_BS_APROM)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
}
goto lexit;
}
/*
This sample code will demo some function about FMC:
1. Check if CPU boots from APROM
2. Read 96-bit UID
3. Erase LDROM, program LD sample code to LDROM, and verify LD sample code
4. Select next booting from LDROM and run LD sample code
*/
printf("\n\n");
printf("+--------------------------------------------------------+\n");
printf("| M05xx Flash Memory Controller Driver Sample Code |\n");
printf("+--------------------------------------------------------+\n");
printf("\nCPU @ %dHz\n\n", SystemCoreClock);
/* Read BS */
printf(" Boot Mode .................................. ");
if ((FMC->ISPCON & FMC_ISPCON_BS_Msk) == FMC_ISPCON_BS_APROM)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
goto lexit;
}
/* Read UID */
printf(" UID[ 0:31] ................................. [0x%x]\n", FMC_ReadUID(0));
printf(" UID[32:63] ................................. [0x%x]\n", FMC_ReadUID(1));
printf(" UID[64:95] ................................. [0x%x]\n", FMC_ReadUID(2));
/* Read Data Flash base address */
printf(" Data Flash Base Address .................... [0x%x]\n", FMC->DFBADR);
/* Check the data in LD ROM to avoid overwrite them */
u32Data = FMC_Read(FMC_LDROM_BASE);
if (u32Data != 0xFFFFFFFF)
{
printf("\n WARNING: There is code in LD ROM.\n If you proceed, the code in LD ROM will be corrupted.\n");
printf(" Continue? [y/n]:");
ch = getchar();
putchar(ch);
if (ch != 'y')
goto lexit;
printf("\n\n");
}
/* Check LD image size */
g_u32ImageSize = (uint32_t)&loaderImageLimit - (uint32_t)&loaderImageBase;
if (g_u32ImageSize == 0)
{
printf(" ERROR: Loader Image is 0 bytes!\n");
goto lexit;
}
if (g_u32ImageSize > FMC_LDROM_SIZE)
{
printf(" ERROR: Loader Image is larger than 4KBytes!\n");
goto lexit;
}
/* Erase LDROM, program LD sample code to LDROM, and verify LD sample code */
/* The chip will boot from LDROM and run LD sample code if LD sample code is downloaded successfully */
FMC_LDROM_Test();
lexit:
/* Disable ISP function */
FMC->ISPCON &= ~FMC_ISPCON_ISPEN_Msk;
/* Lock protected registers */
SYS_LockReg();
printf("\nFMC Sample Code Completed.\n");
}
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
volatile uint32_t u32InitCount;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU @ %d Hz\n", SystemCoreClock);
printf("+-------------------------------------------------+\n");
printf("| Timer1 External Counter Input Sample Code |\n");
printf("+-------------------------------------------------+\n\n");
printf("# Timer Settings:\n");
printf(" Timer1: Clock source is HCLK(50 MHz); Continuous counting mode; Interrupt enable;\n");
printf(" External counter input enable; TCMP is 56789.\n");
printf("# Connect P2.0 to T1 pin and pull P2.0 High/Low as T1 counter input source.\n\n");
/* Configure P2.0 as GPIO output pin and pull pin status to Low first */
P2->PMD = 0xFFFD;
P20 = 0;
/* Enable Timer1 NVIC */
NVIC_EnableIRQ(TMR1_IRQn);
/* Clear Timer1 interrupt counts to 0 */
g_au32TMRINTCount[1] = 0;
/* Enable Timer1 external counter input function */
TIMER1->TCMPR = 56789;
TIMER1->TCSR = TIMER_TCSR_CEN_Msk | TIMER_TCSR_IE_Msk | TIMER_TCSR_CTB_Msk | TIMER_CONTINUOUS_MODE;
/* To check if TDR of Timer1 must be 0 as default value */
if(TIMER_GetCounter(TIMER1) != 0)
{
printf("Default counter value is not 0. (%d)\n", TIMER_GetCounter(TIMER1));
/* Stop Timer1 counting */
TIMER1->TCSR = 0;
while(1);
}
/* To generate one counter event to T1 pin */
GeneratePORT2Counter(0, 1);
/* To check if TDR of Timer1 must be 1 */
while(TIMER_GetCounter(TIMER1) == 0);
if(TIMER_GetCounter(TIMER1) != 1)
{
printf("Get unexpected counter value. (%d)\n", TIMER_GetCounter(TIMER1));
/* Stop Timer1 counting */
TIMER1->TCSR = 0;
while(1);
}
/* To generate remains counts to T1 pin */
GeneratePORT2Counter(0, (56789 - 1));
while(1)
{
if((g_au32TMRINTCount[1] == 1) && (TIMER_GetCounter(TIMER1) == 56789))
{
printf("Timer1 external counter input function ... PASS.\n");
break;
}
}
/* Stop Timer1 counting */
TIMER1->TCSR = 0;
while(1);
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("+------------------------------------------------------------------------+\n");
printf("| PWM Driver Sample Code |\n");
printf("| |\n");
printf("+------------------------------------------------------------------------+\n");
printf(" This sample code will use PWM0 channel 0 to capture\n the signal from PWM1 channel 0.\n");
printf(" I/O configuration:\n");
printf(" PWM0_CH0(PA.12 PWM0 channel 0) <--> PWM1_CH0(PA.2 PWM1 channel 0)\n\n");
printf("Use PWM0 Channel 0(PA.12) to capture the PWM1 Channel 0(PA.2) Waveform\n");
while(1)
{
printf("Press any key to start PWM Capture Test\n");
getchar();
/*--------------------------------------------------------------------------------------*/
/* Set the PWM1 Channel 0 as PWM output function. */
/*--------------------------------------------------------------------------------------*/
/* Assume PWM output frequency is 250Hz and duty ratio is 30%, user can calculate PWM settings by follows.
duty ratio = (CMR+1)/(CNR+1)
cycle time = CNR+1
High level = CMR+1
PWM clock source frequency = __HXT = 12000000
(CNR+1) = PWM clock source frequency/prescaler/clock source divider/PWM output frequency
= 12000000/2/1/250 = 24000
(Note: CNR is 16 bits, so if calculated value is larger than 65536, user should increase prescale value.)
CNR = 23999
duty ratio = 30% ==> (CMR+1)/(CNR+1) = 30%
CMR = 7199
Prescale value is 1 : prescaler= 2
Clock divider is PWM_CSR_DIV1 : clock divider =1
*/
/* set PWM1 channel 0 output configuration */
PWM_ConfigOutputChannel(PWM1, 0, 250, 30);
/* Enable PWM Output path for PWM1 channel 0 */
PWM_EnableOutput(PWM1, PWM_CH_0_MASK);
/* Enable Timer for PWM1 channel 0 */
PWM_Start(PWM1, PWM_CH_0_MASK);
/*--------------------------------------------------------------------------------------*/
/* Set the PWM0 channel 0 for capture function */
/*--------------------------------------------------------------------------------------*/
/* If input minimum frequency is 250Hz, user can calculate capture settings by follows.
Capture clock source frequency = __HXT = 12000000 in the sample code.
(CNR+1) = Capture clock source frequency/prescaler/clock source divider/minimum input frequency
= 12000000/2/1/250 = 24000
(Note: CNR is 16 bits, so if calculated value is larger than 65536, user should increase prescale value.)
CNR = 0xFFFF
(Note: In capture mode, user should set CNR to 0xFFFF to increase capture frequency range.)
*/
/* set PWM0 channel 0 capture configuration */
PWM_ConfigCaptureChannel(PWM0, 0, 166, 0);
/* Enable capture falling edge interrupt for PWM0 channel 0 */
//PWM_EnableCaptureInt(PWM0, 0, PWM_CAPTURE_INT_FALLING_LATCH);
/* Enable PWM0 NVIC interrupt */
//NVIC_EnableIRQ(PWM0_IRQn);
/* Enable Timer for PWM0 channel 0 */
PWM_Start(PWM0, PWM_CH_0_MASK);
/* Enable Capture Function for PWM0 channel 0 */
PWM_EnableCapture(PWM0, PWM_CH_0_MASK);
/* Enable falling capture reload */
PWM0->CAPCTL |= PWM_CAPCTL_FCRLDEN0_Msk;
/* Wait until PWM0 channel 0 Timer start to count */
while((PWM0->CNT[0]) == 0);
/* Capture the Input Waveform Data */
CalPeriodTime(PWM0, 0);
/*---------------------------------------------------------------------------------------------------------*/
/* Stop PWM1 channel 0 (Recommended procedure method 1) */
/* Set PWM Timer loaded value(Period) as 0. When PWM internal counter(CNT) reaches to 0, disable PWM Timer */
/*---------------------------------------------------------------------------------------------------------*/
/* Set PWM1 channel 0 loaded value as 0 */
PWM_Stop(PWM1, PWM_CH_0_MASK);
/* Wait until PWM1 channel 0 Timer Stop */
while((PWM1->CNT[0] & PWM_CNT_CNT_Msk) != 0);
/* Disable Timer for PWM1 channel 0 */
PWM_ForceStop(PWM1, PWM_CH_0_MASK);
/* Disable PWM Output path for PWM1 channel 0 */
PWM_DisableOutput(PWM1, PWM_CH_0_MASK);
/*---------------------------------------------------------------------------------------------------------*/
/* Stop PWM0 channel 0 (Recommended procedure method 1) */
/* Set PWM Timer loaded value(Period) as 0. When PWM internal counter(CNT) reaches to 0, disable PWM Timer */
/*---------------------------------------------------------------------------------------------------------*/
/* Disable PWM0 NVIC */
//NVIC_DisableIRQ(PWM0_IRQn);
/* Set loaded value as 0 for PWM0 channel 0 */
PWM_Stop(PWM0, PWM_CH_0_MASK);
/* Wait until PWM0 channel 0 current counter reach to 0 */
while((PWM0->CNT[0] & PWM_CNT_CNT_Msk) != 0);
/* Disable Timer for PWM0 channel 0 */
PWM_ForceStop(PWM0, PWM_CH_0_MASK);
/* Disable Capture Function and Capture Input path for PWM0 channel 0 */
PWM_DisableCapture(PWM0, PWM_CH_0_MASK);
/* Clear Capture Interrupt flag for PWM0 channel 0 */
PWM_ClearCaptureIntFlag(PWM0, 0, PWM_CAPTURE_INT_FALLING_LATCH);
}
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Unlock protected registers */
SYS_UnlockReg();
/* Enable External XTAL (4~24 MHz) */
CLK_EnableXtalRC(CLK_PWRCON_HXT_EN_Msk);
/* Waiting for 12MHz clock ready */
CLK_WaitClockReady( CLK_CLKSTATUS_HXT_STB_Msk);
/* Switch HCLK clock source to HXT */
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT,CLK_CLKDIV0_HCLK(1));
/* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware.*/
CLK->PLLCON|= CLK_PLLCON_PD_Msk;
/* Set PLL frequency */
CLK->PLLCON = PLLCON_SETTING;
/* Waiting for clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_PLL_STB_Msk);
/* Switch HCLK clock source to PLL */
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL,CLK_CLKDIV0_HCLK(1));
/* Enable IP clock */
CLK_EnableModuleClock(UART0_MODULE);
/* enable PWM0 Channel 0~5 peripheral clock */
CLK_EnableModuleClock(PWM0CH01_MODULE);
CLK_EnableModuleClock(PWM0CH23_MODULE);
CLK_EnableModuleClock(PWM0CH45_MODULE);
/* Select IP clock source */
CLK_SetModuleClock(UART0_MODULE,CLK_CLKSEL1_UART_S_HXT,CLK_CLKDIV0_UART(1));
/* Set PCLK as PWM0 channel 0~3 clock source */
CLK_SetModuleClock(PWM0CH01_MODULE,CLK_CLKSEL2_PWM0CH01_S_PCLK,1);
CLK_SetModuleClock(PWM0CH23_MODULE,CLK_CLKSEL2_PWM0CH23_S_PCLK,1);
CLK_SetModuleClock(PWM0CH45_MODULE,CLK_CLKSEL2_PWM0CH45_S_PCLK,1);
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
SystemCoreClockUpdate();
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set GPG multi-function pins for UART0 RXD and TXD */
SYS->GPG_MFPL = SYS_GPG_MFPL_PG1_MFP_UART0_RXD | SYS_GPG_MFPL_PG2_MFP_UART0_TXD ;
/* Set GPG multi-function pins for CKO */
SYS->GPC_MFPL = (SYS->GPC_MFPL & ~SYS_GPC_MFPL_PC5_MFP_Msk) | SYS_GPC_MFPL_PC5_MFP_CLK_O ;
/* Set A5 A6 C10 C11 A12 A11 multi-function pins for PWM Channel 0~5 */
SYS->GPA_MFPL = (SYS->GPA_MFPL & ~(SYS_GPA_MFPL_PA5_MFP_Msk | SYS_GPA_MFPL_PA6_MFP_Msk)) | SYS_GPA_MFPL_PA5_MFP_PWM0_CH0 | SYS_GPA_MFPL_PA6_MFP_PWM0_CH1;
SYS->GPC_MFPH = (SYS->GPC_MFPH & ~(SYS_GPC_MFPH_PC10_MFP_Msk | SYS_GPC_MFPH_PC11_MFP_Msk)) | SYS_GPC_MFPH_PC10_MFP_PWM0_CH2 | SYS_GPC_MFPH_PC11_MFP_PWM0_CH3;
SYS->GPA_MFPH = (SYS->GPA_MFPH & ~(SYS_GPA_MFPH_PA12_MFP_Msk | SYS_GPA_MFPH_PA11_MFP_Msk)) | SYS_GPA_MFPH_PA12_MFP_PWM0_CH4 | SYS_GPA_MFPH_PA11_MFP_PWM0_CH5;
/* Lock protected registers */
SYS_LockReg();
}
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
const uint8_t acCRCSrcPattern[] = {0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38};
uint32_t i, u32TargetChecksum = 0xA12B, u32CalChecksum = 0;
uint16_t *p16SrcAddr;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU @ %d Hz\n", SystemCoreClock);
printf("+---------------------------------------------+\n");
printf("| CRC-CCITT Polynomial Mode Sample Code |\n");
printf("+---------------------------------------------+\n\n");
printf("# Calculate [0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38] CRC-CCITT checksum value.\n");
printf(" - Seed value is 0xFFFF \n");
printf(" - CPU write data length is 16-bit \n");
printf(" - Checksum complement disable \n");
printf(" - Checksum reverse disable \n");
printf(" - Write data complement disable \n");
printf(" - Write data reverse disable \n");
printf(" - Checksum should be 0x%X \n\n", u32TargetChecksum);
/* Enable CRC controller clock */
CLK->AHBCLK |= CLK_AHBCLK_CRCCKEN_Msk;
/* Disable CRC function */
CRC->CTL &= ~CRC_CTL_CRCEN_Msk;
/* Configure CRC controller for CRC-CCITT CPU mode */
CRC_SET_SEED(0xFFFF);
CRC->CTL = CRC_CCITT | CRC_CPU_WDATA_16 | CRC_CTL_CRCEN_Msk;
/* Reset CRC controller */
CRC->CTL |= CRC_CTL_CRCRST_Msk;
/* Convert 16-bit source data */
p16SrcAddr = (uint16_t *)acCRCSrcPattern;
/* Start to execute CRC-CCITT operation */
for(i = 0; i < sizeof(acCRCSrcPattern) / 2; i++)
{
CRC_WRITE_DATA((p16SrcAddr[i] & 0xFFFF));
}
/* Disable CRC function */
CRC->CTL &= ~CRC_CTL_CRCEN_Msk;
/* Get CRC-CCITT checksum value */
u32CalChecksum = (CRC->CHECKSUM & 0xFFFF);
printf("CRC checksum is 0x%X ... %s.\n", u32CalChecksum, (u32CalChecksum == u32TargetChecksum) ? "PASS" : "FAIL");
while(1);
}
static void prvSetupHardware( void )
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Enable External XTAL (4~24 MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Waiting for 12MHz clock ready */
CLK_WaitClockReady( CLK_STATUS_HXTSTB_Msk);
/* Switch HCLK clock source to HXT */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HXT,CLK_CLKDIV0_HCLK(1));
/* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware.*/
CLK->PLLCTL |= CLK_PLLCTL_PD_Msk;
/* Set PLL frequency */
CLK->PLLCTL = CLK_PLLCTL_84MHz_HXT;
/* Waiting for clock ready */
CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
/* Switch HCLK clock source to PLL */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL,CLK_CLKDIV0_HCLK(1));
/* Enable IP clock */
CLK_EnableModuleClock(UART0_MODULE);
CLK_EnableModuleClock(EMAC_MODULE);
/* Select IP clock source */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
// Configure MDC clock rate to HCLK / (127 + 1) = 656 kHz if system is running at 84 MHz
CLK_SetModuleClock(EMAC_MODULE, 0, CLK_CLKDIV3_EMAC(127));
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
SystemCoreClockUpdate();
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set GPG multi-function pins for UART0 RXD and TXD */
SYS->GPG_MFPL = SYS_GPG_MFPL_PG1MFP_UART0_RXD | SYS_GPG_MFPL_PG2MFP_UART0_TXD ;
// Configure RMII pins
SYS->GPC_MFPL = SYS_GPC_MFPL_PC0MFP_EMAC_REFCLK |
SYS_GPC_MFPL_PC1MFP_EMAC_MII_RXERR |
SYS_GPC_MFPL_PC2MFP_EMAC_MII_RXDV |
SYS_GPC_MFPL_PC3MFP_EMAC_MII_RXD1 |
SYS_GPC_MFPL_PC4MFP_EMAC_MII_RXD0 |
SYS_GPC_MFPL_PC6MFP_EMAC_MII_TXD0 |
SYS_GPC_MFPL_PC7MFP_EMAC_MII_TXD1;
SYS->GPC_MFPH = SYS_GPC_MFPH_PC8MFP_EMAC_MII_TXEN;
// Enable high slew rate on all RMII pins
PC->SLEWCTL |= 0x1DF;
// Configure MDC, MDIO at PB14 & PB15
SYS->GPB_MFPH = SYS_GPB_MFPH_PB14MFP_EMAC_MII_MDC | SYS_GPB_MFPH_PB15MFP_EMAC_MII_MDIO;
/* Lock protected registers */
SYS_LockReg();
/* Init UART to 115200-8n1 for print message */
UART_Open(UART0, 115200);
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main (void)
{
uint32_t u32data;
/* If define INIT_SYSCLK_AT_BOOTING in system_M051Series.h, HCLK will be set to 50MHz in SystemInit(void)*/
if(SYS->REGWRPROT == 1) // In end of main function, program issued CPU reset and write-protection will be disabled.
SYS_LockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init(); //In the end of SYS_Init() will issue SYS_LockReg() to lock protected register. If user want to write protected register, please issue SYS_UnlockReg() to unlock protected register.
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU @ %dHz\n", SystemCoreClock);
/*
This sample code will show some function about system manager controller and clock controller:
1. Read PDID
2. Get and clear reset source
3. Setting about BOD
4. Change system clock depended on different PLL settings
5. Outout system clock from CKO pin, and the output frequency = system clock / 4
*/
printf("+---------------------------------------+\n");
printf("| M05xx System Driver Sample Code |\n");
printf("+---------------------------------------+\n");
if (M32(FLAG_ADDR) == SIGNATURE)
{
printf(" CPU Reset success!\n");
M32(FLAG_ADDR) = 0;
printf(" Press any key to continue ...\n");
getchar();
}
/*---------------------------------------------------------------------------------------------------------*/
/* Misc system function test */
/*---------------------------------------------------------------------------------------------------------*/
/* Read Part Device ID */
printf("Product ID 0x%x\n", SYS->PDID);
/* Get reset source from last operation */
u32data = SYS->RSTSRC;
printf("Reset Source 0x%x\n", u32data);
/* Clear reset source */
SYS->RSTSRC = u32data;
/* Unlock protected registers for Brown-Out Detector settings */
SYS_UnlockReg();
/* Check if the write-protected registers are unlocked before BOD setting and CPU Reset */
if (SYS->REGWRPROT != 0)
{
printf("Protected Address is Unlocked\n");
}
/* Enable Brown-Out Detector and Low Voltage Reset function, and set Brown-Out Detector voltage 2.7V */
SYS->BODCR =SYS_BODCR_BOD_EN_Msk | SYS_BODCR_BOD_VL_2_7V | SYS_BODCR_LVR_EN_Msk;
/* Enable Brown-Out Interrupt function */
SYS->BODCR &= ~SYS_BODCR_BOD_RSTEN_Msk;
NVIC_EnableIRQ(BOD_IRQn);
/* Get system clock frequency and PLL clock frequency */
printf(" Change system clock to %d Hz and PLL clock is %d Hz\n", SystemCoreClock, PllClock);
/* Run PLL Test */
SYS_PLL_Test();
/* Write a signature work to SRAM to check if it is reset by software */
M32(FLAG_ADDR) = SIGNATURE;
printf("\n\n >>> Reset CPU <<<\n");
/* Waiting for message send out */
_UART_WAIT_TX_EMPTY(UART0);
/* Switch HCLK clock source to Internal 22MHz */
SYSCLK->CLKSEL0 = SYSCLK_CLKSEL0_HCLK_IRC22M;
/* Set PLL to Power down mode and HW will also clear PLL_STB bit in CLKSTATUS register */
SYSCLK->PLLCON |= SYSCLK_PLLCON_PD_Msk;
/* Reset CPU */
_SYS_RESET_CPU();
}
/* ------------- */
int main(void)
{
uint32_t u32DataCount;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init system, IP clock and multi-function I/O. */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Configure UART0: 115200, 8-bit word, no parity bit, 1 stop bit. */
UART_Open(UART0, 115200);
/* Init SPI */
SPI_Init();
printf("\n\n");
printf("+-----------------------------------------------------+\n");
printf("| SPI Master Mode Sample Code |\n");
printf("+-----------------------------------------------------+\n");
printf("\n");
printf("Configure SPI0 as a master.\n");
printf("Bit length of a transaction: 32\n");
printf("The I/O connection for SPI0:\n");
printf(" SPI0_SS0 (PC.0)\n SPI0_CLK (PC.1)\n");
printf(" SPI0_MISO0 (PC.2)\n SPI0_MOSI0 (PC.3)\n\n");
printf("SPI controller will enable FIFO mode and transfer %d data to a off-chip slave device.\n", TEST_COUNT);
printf("In the meanwhile the SPI controller will receive %d data from the off-chip slave device.\n", TEST_COUNT);
printf("After the transfer is done, the %d received data will be printed out.\n", TEST_COUNT);
printf("The SPI master configuration is ready.\n");
for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)
{
/* Write the initial value to source buffer */
g_au32SourceData[u32DataCount] = 0x00550000 + u32DataCount;
/* Clear destination buffer */
g_au32DestinationData[u32DataCount] = 0;
}
printf("Before starting the data transfer, make sure the slave device is ready. Press any key to start the transfer.\n");
getchar();
printf("\n");
/* Set TX FIFO threshold, enable TX FIFO threshold interrupt and RX FIFO time-out interrupt */
SPI_EnableFIFO(SPI0, 4, 4);
SPI_EnableInt(SPI0, SPI_FIFO_TX_INT_MASK | SPI_FIFO_TIMEOUT_INT_MASK);
g_u32TxDataCount = 0;
g_u32RxDataCount = 0;
NVIC_EnableIRQ(SPI0_IRQn);
/* Wait for transfer done */
while(g_u32RxDataCount < TEST_COUNT);
/* Print the received data */
printf("Received data:\n");
for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)
{
printf("%d:\t0x%X\n", u32DataCount, g_au32DestinationData[u32DataCount]);
}
/* Disable TX FIFO threshold interrupt and RX FIFO time-out interrupt */
SPI_DisableInt(SPI0, SPI_FIFO_TX_INT_MASK | SPI_FIFO_TIMEOUT_INT_MASK);
NVIC_DisableIRQ(SPI0_IRQn);
printf("The data transfer was done.\n");
printf("\n\nExit SPI driver sample code.\n");
/* Reset SPI0 */
SPI_Close(SPI0);
while(1);
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Unlock protected registers */
SYS_UnlockReg();
/* Enable Internal RC clock */
SYSCLK->PWRCON |= SYSCLK_PWRCON_IRC22M_EN_Msk;
/* Waiting for IRC22M clock ready */
SYS_WaitingForClockReady(SYSCLK_CLKSTATUS_IRC22M_STB_Msk);
/* Switch HCLK clock source to Internal RC */
SYSCLK->CLKSEL0 = SYSCLK_CLKSEL0_HCLK_IRC22M;
/* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware.*/
SYSCLK->PLLCON |= SYSCLK_PLLCON_PD_Msk;
/* Enable external 12MHz XTAL */
SYSCLK->PWRCON |= SYSCLK_PWRCON_XTL12M_EN_Msk;
/* Enable PLL and Set PLL frequency */
SYSCLK->PLLCON = PLLCON_SETTING;
/* Waiting for clock ready */
SYS_WaitingForClockReady(SYSCLK_CLKSTATUS_PLL_STB_Msk | SYSCLK_CLKSTATUS_XTL12M_STB_Msk);
/* Switch HCLK clock source to PLL, STCLK to HCLK/2 */
SYSCLK->CLKSEL0 = SYSCLK_CLKSEL0_STCLK_HCLK_DIV2 | SYSCLK_CLKSEL0_HCLK_PLL;
/* Enable EBI clock */
SYSCLK->AHBCLK |= SYSCLK_AHBCLK_EBI_EN_Msk;
/* Enable IP clock */
SYSCLK->APBCLK = SYSCLK_APBCLK_UART0_EN_Msk;
/* IP clock source */
SYSCLK->CLKSEL1 = SYSCLK_CLKSEL1_UART_PLL;
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */
//SystemCoreClockUpdate();
PllClock = PLL_CLOCK; // PLL
SystemCoreClock = PLL_CLOCK / 1; // HCLK
CyclesPerUs = PLL_CLOCK / 1000000; // For SYS_SysTickDelay()
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set P3 multi-function pins for UART0 RXD, TXD and EBI MCLK, nWR and nRD */
SYS->P3_MFP = SYS_MFP_P30_RXD0 | SYS_MFP_P31_TXD0 | SYS_MFP_P33_MCLK | SYS_MFP_P36_nWR | SYS_MFP_P37_nRD;
/* Set P0 multi-function pins for EBI AD0 ~ AD7 */
SYS->P0_MFP = SYS_MFP_P00_AD0 | SYS_MFP_P01_AD1 | SYS_MFP_P02_AD2 | SYS_MFP_P03_AD3 |
SYS_MFP_P04_AD4 | SYS_MFP_P05_AD5 | SYS_MFP_P06_AD6 | SYS_MFP_P07_AD7;
/* Set P2 multi-function pins for EBI AD8 ~ AD15 */
SYS->P2_MFP = SYS_MFP_P20_AD8 | SYS_MFP_P21_AD9 | SYS_MFP_P22_AD10 | SYS_MFP_P23_AD11 |
SYS_MFP_P24_AD12 | SYS_MFP_P25_AD13 | SYS_MFP_P26_AD14 | SYS_MFP_P27_AD15;
/* Set P1 multi-function pins for EBI nWRL and nWRH */
SYS->P1_MFP = SYS_MFP_P10_nWRL | SYS_MFP_P11_nWRH;
/* Set P4 multi-function pins for EBI nCS, ALE and ICE CLK and DAT */
SYS->P4_MFP = SYS_MFP_P44_nCS | SYS_MFP_P45_ALE | SYS_MFP_P46_ICE_CLK | SYS_MFP_P47_ICE_DAT;
/* Lock protected registers */
SYS_LockReg();
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Init UART0 for printf */
UART0_Init();
/* Lock protected registers */
SYS_LockReg();
/*
This sample code sets I2C bus clock to 100kHz. Then, Master accesses Slave with Byte Write
and Byte Read operations, and check if the read data is equal to the programmed data.
*/
printf("\n");
printf("+-------------------------------------------------------+\n");
printf("| M05xx I2C Driver Sample Code(Master) for access Slave |\n");
printf("| |\n");
printf("| I2C Master (I2C0) <---> I2C Slave(I2C0) |\n");
printf("+-------------------------------------------------------+\n");
printf("Configure I2C0 as a master.\n");
printf("The I/O connection for I2C0:\n");
printf("I2C0_SDA(P3.4), I2C0_SCL(P3.5)\n");
/* Init I2C0 */
I2C0_Init();
printf("\n");
printf("Check I2C Slave(I2C0) is running first!\n");
printf("Press any key to continue.\n");
getchar();
/* Access Slave with no address */
printf("\n");
printf(" == No Mask Address ==\n");
I2C0_Read_Write_SLAVE(0x15);
I2C0_Read_Write_SLAVE(0x35);
I2C0_Read_Write_SLAVE(0x55);
I2C0_Read_Write_SLAVE(0x75);
printf("SLAVE Address test OK.\n");
/* Access Slave with address mask */
printf("\n");
printf(" == Mask Address ==\n");
I2C0_Read_Write_SLAVE(0x15 & ~0x01);
I2C0_Read_Write_SLAVE(0x35 & ~0x04);
I2C0_Read_Write_SLAVE(0x55 & ~0x01);
I2C0_Read_Write_SLAVE(0x75 & ~0x04);
printf("SLAVE Address Mask test OK.\n");
s_I2C0HandlerFn = NULL;
/* Close I2C0 */
I2C0_Close();
return 0;
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Unlock protected registers */
SYS_UnlockReg();
/* Enable Internal RC clock */
SYSCLK->PWRCON |= SYSCLK_PWRCON_IRC22M_EN_Msk;
/* Waiting for IRC22M clock ready */
SYS_WaitingForClockReady(SYSCLK_CLKSTATUS_IRC22M_STB_Msk);
/* Switch HCLK clock source to Internal RC */
SYSCLK->CLKSEL0 = SYSCLK_CLKSEL0_HCLK_IRC22M;
/* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware.*/
SYSCLK->PLLCON |= SYSCLK_PLLCON_PD_Msk;
/* Enable external 12MHz XTAL, internal 22.1184MHz */
SYSCLK->PWRCON |= SYSCLK_PWRCON_XTL12M_EN_Msk | SYSCLK_PWRCON_IRC22M_EN_Msk;
/* Enable PLL and Set PLL frequency */
SYSCLK->PLLCON = PLLCON_SETTING;
/* Waiting for clock ready */
SYS_WaitingForClockReady(SYSCLK_CLKSTATUS_PLL_STB_Msk | SYSCLK_CLKSTATUS_XTL12M_STB_Msk | SYSCLK_CLKSTATUS_IRC22M_STB_Msk);
/* Switch HCLK clock source to PLL, STCLK to HCLK/2 */
SYSCLK->CLKSEL0 = SYSCLK_CLKSEL0_STCLK_HCLK_DIV2 | SYSCLK_CLKSEL0_HCLK_PLL;
SYS_LockReg();
// Enable IP clock
// SYSCLK->APBCLK = SYSCLK_APBCLK_PWM01_EN_Msk | SYSCLK_APBCLK_PWM23_EN_Msk | SYSCLK_APBCLK_TMR2_EN_Msk;
// IP clock source
// SYSCLK->CLKSEL1 = SYSCLK_CLKSEL1_PWM01_HCLK | SYSCLK_CLKSEL1_PWM23_HCLK | SYSCLK_CLKSEL1_TMR2_HCLK;
// IP clock source
// SYSCLK->CLKSEL2 = SYSCLK_CLKSEL2_PWM01_XTAL|SYSCLK_CLKSEL2_PWM23_XTAL;
// Reset PWMA channel0~channel3
// SYS->IPRSTC2 = SYS_IPRSTC2_PWM03_RST_Msk;
// SYS->IPRSTC2 = 0;
// Update System Core Clock
// User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically.
//SystemCoreClockUpdate();
PllClock = PLL_CLOCK; // PLL
SystemCoreClock = PLL_CLOCK / 1; // HCLK
CyclesPerUs = PLL_CLOCK / 1000000; // For SYS_SysTickDelay()
// Init LCD GPIO
_GPIO_SET_PIN_MODE(P3, 0, GPIO_PMD_OUTPUT);
_GPIO_SET_PIN_MODE(P3, 1, GPIO_PMD_OUTPUT);
_GPIO_SET_PIN_MODE(P3, 2, GPIO_PMD_OUTPUT);
_GPIO_SET_PIN_MODE(P3, 3, GPIO_PMD_OUTPUT);
_GPIO_SET_PIN_MODE(P3, 4, GPIO_PMD_OUTPUT);
_GPIO_SET_PIN_MODE(P3, 5, GPIO_PMD_OUTPUT);
// Init Encoder GPIO
_GPIO_SET_PIN_MODE(P0, 2, GPIO_PMD_INPUT);
_GPIO_SET_PIN_MODE(P0, 3, GPIO_PMD_INPUT);
/*
_GPIO_ENABLE_DEBOUNCE(P0, 2);
_GPIO_ENABLE_DEBOUNCE(P0, 3);
_GPIO_SET_DEBOUNCE_TIME(GPIO_DBNCECON_DBCLKSRC_HCLK, GPIO_DBNCECON_DBCLKSEL_16);
*/
/*
GPIO_EnableInt(P0, 2, GPIO_INT_RISING);
GPIO_EnableInt(P0, 3, GPIO_INT_RISING);
*/
NVIC_SetPriority(TMR2_IRQn,0);
NVIC_SetPriority(SysTick_IRQn,1);
NVIC_SetPriority(GPIO_P0P1_IRQn,2);
NVIC_SetPriority(PWMA_IRQn,3);
/*
NVIC_EnableIRQ(GPIO_P0P1_IRQn);
NVIC_EnableIRQ(TMR2_IRQn);
NVIC_EnableIRQ(PWMA_IRQn);
*/
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
// Set P3 multi-function pins for UART0 RXD and TXD
// SYS->P3_MFP = SYS_MFP_P30_RXD0 | SYS_MFP_P31_TXD0;
// Set P2 multi-function pins for PWMB Channel0~3
// SYS->P2_MFP = SYS_MFP_P20_PWM0 | SYS_MFP_P22_PWM2; // P2.2 teszt jel, késõbb leszedendõ
// SYS->P4_MFP = SYS_MFP_P40_T2EX;
/* Lock protected registers */
// SYS_LockReg();
}
int main()
{
uint32_t i, u32Data;
SYS_Init();
UART_Init();
printf("\n\n");
printf("+----------------------------------------+\n");
printf("| MINI51 FMC Sample Code |\n");
printf("+----------------------------------------+\n");
SYS_UnlockReg();
/* Enable FMC ISP function */
FMC_Open();
if (set_data_flash_base(DATA_FLASH_TEST_BASE) < 0)
{
printf("Failed to set Data Flash base address!\n");
goto lexit;
}
/* Read BS */
printf(" Boot Mode ............................. ");
if (FMC_GetBootSource() == 0)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
goto lexit;
}
u32Data = FMC_ReadCID();
printf(" Company ID ............................ [0x%08x]\n", u32Data);
u32Data = FMC_ReadPID();
printf(" Product ID ............................ [0x%08x]\n", u32Data);
for (i = 0; i < 3; i++)
{
u32Data = FMC_ReadUID(i);
printf(" Unique ID %d ........................... [0x%08x]\n", i, u32Data);
}
for (i = 0; i < 4; i++)
{
u32Data = FMC_ReadUCID(i);
printf(" Unique Customer ID %d .................. [0x%08x]\n", i, u32Data);
}
/* Read User Configuration */
printf(" User Config 0 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE));
printf(" User Config 1 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE+4));
/* Read Data Flash base address */
u32Data = FMC_ReadDataFlashBaseAddr();
printf(" Data Flash Base Address ............... [0x%08x]\n", u32Data);
printf("\n\nLDROM test =>\n");
FMC_ENABLE_LD_UPDATE();
if (flash_test(FMC_LDROM_BASE, FMC_LDROM_END, TEST_PATTERN) < 0)
{
printf("\n\nLDROM test failed!\n");
goto lexit;
}
FMC_DISABLE_LD_UPDATE();
printf("\n\nAPROM test =>\n");
FMC_ENABLE_AP_UPDATE();
if (flash_test(APROM_TEST_BASE, DATA_FLASH_TEST_BASE, TEST_PATTERN) < 0)
{
printf("\n\nAPROM test failed!\n");
goto lexit;
}
FMC_DISABLE_AP_UPDATE();
printf("\n\nData Flash test =>\n");
if (flash_test(DATA_FLASH_TEST_BASE, DATA_FLASH_TEST_END, TEST_PATTERN) < 0)
{
printf("\n\nUHB test failed!\n");
goto lexit;
}
lexit:
/* Disable FMC ISP function */
FMC_Close();
/* Lock protected registers */
SYS_LockReg();
printf("\nFMC Sample Code Completed.\n");
while (1);
}
