// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(void)
{
unsigned char n;
unsigned long flags;
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
// lock interrupts for accurate timing
local_irq_save(flags);
ApplyTargetVDD();
// wait 1msec for the power to stabilize
#if 1 //etinum.LJ.firmware_update
Delay(1000);
#else
for (n=0; n<10; n++) {
Delay(DELAY100us/3);
}
#endif
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
local_irq_restore(flags);
if (fIsError = fDetectHiLoTransition()) {
return(INIT_ERROR);
}
printk(KERN_ERR "[CYPRESS] step1 passed\n");
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(id_setup_1, num_bits_id_setup_1);
if (fIsError = fDetectHiLoTransition()) {
return(INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
printk(KERN_ERR "[CYPRESS] step2 passed\n");
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return(PASS);
}
// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(void)
{
// unsigned char n;
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
RemoveTargetVDD();
mdelay(5);
ApplyTargetVDD();
// wait 1msec for the power to stabilize
mdelay(1);
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
fIsError = fDetectHiLoTransition();
if ( fIsError ) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
return(INIT_ERROR);
}
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if ( fIsError ) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
return(INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return(PASS);
}
// ============================================================================
// fXRESInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fXRESInitializeTargetForISSP(void)
{
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
// Cycle reset and put the device in programming mode when it exits reset
AssertXRES();
DeassertXRES();
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
//PTJ: Send id_setup_1 instead of init1_v
//PTJ: both send CA Test Key and do a Calibrate1 SROM function
SendVector(id_setup_1, num_bits_id_setup_1);
if (fIsError = fDetectHiLoTransition()) {
// TX8SW_CPutString("\r\n fDetectHiLoTransition Error");
printk(KERN_INFO "\r\n fDetectHiLoTransition Error\n");
return (INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return (PASS);
}
// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(unsigned long flag)
{
int n;
printk(KERN_ERR"[TOUCHKEY]start fPowerCycleInitializeTargetForISSP\n");
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
ApplyTargetVDD();
local_irq_save(flag);
// wait 1msec for the power to stabilize
//#if 0
for (n = 0; n < 10; n++) {
Delay(DELAY100us);
}
//#endif
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
// printk(KERN_DEBUG "fDetectHiLoTransition\n");
if ((fIsError = fDetectHiLoTransition())) {
#if defined(CONFIG_TARGET_LOCALE_NAATT)
local_irq_restore(flag);
#endif
printk(KERN_ERR"[TOUCHKEY]fDetectHiLoTransition()error!!!\n");
return (INIT_ERROR);
}
// Configure the pins for initialization
// SetSDATAHiZ(); // issp_test_20100709 block
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end); //PTJ: rev308, added to match spec
// printk("SendVector(id_setup_1)\n",0,0,0);
SendVector(id_setup_1, num_bits_id_setup_1);
if ((fIsError = fDetectHiLoTransition())) {
#if defined(CONFIG_TARGET_LOCALE_NAATT)
local_irq_restore(flag);
#endif
printk(KERN_ERR"[TOUCHKEY]fDetectHiLoTransition()error!!!\n");
return (INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return (PASS);
}
/* =========================================================================
ErrorTrap()
Return is not valid from main for PSOC, so this ErrorTrap routine is used.
For some systems returning an error code will work best. For those, the
calls to ErrorTrap() should be replaced with a return(bErrorNumber). For
other systems another method of reporting an error could be added to this
function -- such as reporting over a communcations port.
========================================================================= */
void ErrorTrap(unsigned char bErrorNumber)
{
#ifndef RESET_MODE
/* Set all pins to highZ to avoid back powering the PSoC through the
GPIO protection diodes.
*/
SetSCLKHiZ();
SetSDATAHiZ();
/* If Power Cycle programming, turn off the target */
/* RemoveTargetVDD(); */
#endif
pr_info("ErrorTrap:go to error!\n");
return ;
}
/*============================================================================
SendVector()
This routine sends the vector specifed. All vectors constant strings found
in ISSP_Vectors.h. The data line is returned to HiZ after the vector is
sent.
bVect a pointer to the vector to be sent.
nNumBits the number of bits to be sent.
bCurrByte scratch var to keep the byte to be sent.
There is no returned value.
============================================================================
*/
void SendVector(const unsigned char *bVect, unsigned int iNumBits)
{
SetSDATAStrong();
while (iNumBits > 0) {
if (iNumBits >= 8) {
SendByte(*(bVect), 8);
iNumBits -= 8;
bVect++;
} else {
SendByte(*(bVect), iNumBits);
iNumBits = 0;
}
}
SetSDATAHiZ();
}
/* ========================================================================= */
void ErrorTrap(unsigned char bErrorNumber)
{
#ifndef RESET_MODE
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// If Power Cycle programming, turn off the target
RemoveTargetVDD();
#endif
// ioctl(touch_fd, DEV_CTRL_TOUCH_INT_ENABLE,NULL);
// printk("[TSP] %s,%d error!!\n",__func__,__LINE__);
// exit(1);
// while (1);
// return(bErrorNumbers);
}
/* ========================================================================= */
void ErrorTrap(unsigned char bErrorNumber)
{
#ifndef RESET_MODE
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// If Power Cycle programming, turn off the target
// RemoveTargetVDD();
#endif
CYTTSP_DBG(">>>> ISSP Error : %d <<<<\n", bErrorNumber);
CYTTSP_DBG(">>>> Plese try again\n");
//while (1);
// return(bErrorNumbers);
}
// ============================================================================
// fVerifyTargetBlock()
// Verify the block just written to. This can be done byte-by-byte before the
// protection bits are set.
// Returns:
// 0 if successful
// BLOCK_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fVerifyTargetBlock(unsigned char bBankNumber,
unsigned char bBlockNumber)
{
SendVector(set_block_number, 11);
//Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bBlockNumber, 8);
SendByte(set_block_number_end, 3);
SendVector(verify_setup_v, num_bits_verify_setup);
if ((fIsError = fDetectHiLoTransition())) {
return (BLOCK_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress = 0;
bTargetDataPtr = 0;
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4); //PTJ 308: this was changed from sending the first 5 bits to sending the first 4
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress, 6);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return an error.
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return (BLOCK_ERROR);
bTargetDataPtr++;
// Increment the address by four to accomodate 6-Bit addressing
// (puts the 6-bit address into MSBit locations for "SendByte()").
bTargetAddress += 4;
}
return (PASS);
}
signed char fReadByteLoop(unsigned int blknum)
{
bTargetAddress = 0;
bTargetDataPtr = 0;
while(bTargetDataPtr < TARGET_DATABUFF_LEN)
{
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4);
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress,7);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
//if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
if (bTargetDataIN != pSocData[blknum*TARGET_DATABUFF_LEN + bTargetDataPtr])
{
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("bTargetDataIN : ");
UART_PutHexByte(bTargetDataIN);
UART_CPutString(" abTargetDataOUT : ");
UART_PutHexByte(pSocData[blknum*TARGET_DATABUFF_LEN + bTargetDataPtr]);
#endif
return(BLOCK_ERROR);
}
bTargetDataPtr++;
// Increment the address by 2 to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
bTargetAddress += 2;
}
return(PASS);
}
/* ============================================================================
// ReStartTarget()
// After programming, the target PSoC must be reset to take it out of
// programming mode. This routine performs a reset.
============================================================================*/
void ReStartTarget(void)
{
#ifdef RESET_MODE
/* Assert XRES, then release, then disable XRES-Enable */
AssertXRES();
udelay(XRES_CLK_DELAY);
DeassertXRES();
#else
/* Set all pins to highZ to avoid back powering the PSoC through the GPIO */
/* protection diodes. */
SetSCLKHiZ();
SetSDATAHiZ();
/* Cycle power on the target to cause a reset */
RemoveTargetVDD();
udelay(POWER_CYCLE_DELAY);
ApplyTargetVDD();
#endif
}
// ============================================================================
// ReStartTarget()
// After programming, the target PSoC must be reset to take it out of
// programming mode. This routine performs a reset.
// ============================================================================
void ReStartTarget(void)
{
#ifdef RESET_MODE
// Assert XRES, then release, then disable XRES-Enable
AssertXRES();
Delay(XRES_CLK_DELAY);
DeassertXRES();
#else
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Cycle power on the target to cause a reset
RemoveTargetVDD();
mdelay(300);
ApplyTargetVDD();
#endif
}
signed char fReadByteLoop(void)
{
/* char x = 0; //wly */
bTargetAddress = 0;
bTargetDataPtr = 0;
/* pr_info("wly: fReadByteLoop"); */
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_write_setup, num_bits_read_write_setup);
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 4);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 7);
RunClock(2); /* Run two SCLK cycles between writing and reading */
SetSDATAHiZ(); /* Set to HiZ so Target can drive SDATA */
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); /* Send the ReadByte Vector End */
/* Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
//pr_info("wly: bTargetDataIN=%x, %x\n", bTargetDataIN, abTargetDataOUT[bTargetDataPtr]);
*/
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return BLOCK_ERROR;
bTargetDataPtr++;
/* Increment the address by 2 to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
*/
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable);
return PASS;
}
/* ============================================================================
// fXRESInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fXRESInitializeTargetForISSP(void)
{
/* Configure the pins for initialization */
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
#ifdef ACTIVE_LOW_XRES
AssertXRES(); /* assert XRES before setting XRES pin to strong */
SetXRESStrong();
DeassertXRES();
/* Delay(XRES_CLK_DELAY); */
mdelay(1);
AssertXRES();
#else
/* Cycle reset and put the device in programming mode when it exits reset */
SetXRESStrong();
AssertXRES();
Delay(XRES_CLK_DELAY);
DeassertXRES();
#endif
/* !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
*/
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if (fIsError)
return INIT_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/* NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec). */
return PASS;
}
void ReStartTarget(void)
{
//int i;
#ifdef RESET_MODE
/* Assert XRES, then release, then disable XRES-Enable */
AssertXRES();
Delay(XRES_CLK_DELAY);
DeassertXRES();
#else
/* Set all pins to highZ to avoid back powering
the PSoC through the GPIO protection diodes.
*/
SetSCLKHiZ();
SetSDATAHiZ();
/* Cycle power on the target to cause a reset */
RemoveTargetVDD();
// jjlee for (i = 0; i < 100; i++)
Delay(50000);
ApplyTargetVDD();
#endif
}
signed char fReadByteLoop(void)
{
bTargetAddress = 0;
bTargetDataPtr = 0;
while (bTargetDataPtr < TargetDatabufLen) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 5);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 6);
/* Run two SCLK cycles between writing and reading */
RunClock(2);
/* Set to HiZ so Target can drive SDATA */
SetSDATAHiZ();
bTargetDataIN = bReceiveByte();
RunClock(1);
/* Send the ReadByte Vector End */
SendVector(read_byte_v + 1, 1);
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr]) {
#ifdef TX_ON
TX8SW_PutCRLF();
TX8SW_CPutString("bTargetDataIN : ");
TX8SW_PutSHexByte(bTargetDataIN);
TX8SW_CPutString(" abTargetDataOUT : ");
TX8SW_PutSHexByte(abTargetDataOUT[bTargetDataPtr]);
#endif
return BLOCK_ERROR;
}
bTargetDataPtr++;
bTargetAddress += 4;
}
return PASS;
}
/*============================================================================
fXRESInitializeTargetForISSP()
Implements the intialization vectors for the device.
Returns:
0 if successful
INIT_ERROR if timed out on handshake to the device.
============================================================================
*/
signed char fXRESInitializeTargetForISSP(void)
{
/*Configure the pins for initialization*/
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
SetXRESStrong();
/* Cycle reset and put the device
in programming mode when it exits reset */
AssertXRES();
Delay(XRES_CLK_DELAY);
DeassertXRES();
/*
!!! NOTE:
The timing spec that requires that the first Init-Vector happen within
1 msec after the reset/power up. For this reason, it is not advisable
to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
Init-Vector instructions below. Doing so could introduce excess delay
and cause the target device to exit ISSP Mode.
PTJ: Send id_setup_1 instead of init1_v
PTJ: both send CA Test Key and do a Calibrate1 SROM function
*/
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return INIT_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/*
NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
it does not occur (per spec).
*/
return PASS;
}
// ============================================================================
// PTJ: fReadSecurity()
// This reads from SM0 with Read Supervisory SPC command.
// Need to have SPC Test Mode enabled before using these commands?
// Returns:
// 0 if successful
// __________ if timed out on handshake to the device.
// ============================================================================
signed char fReadSecurity(void)
{
SendVector(ReadSecuritySetup, num_bits_ReadSecuritySetup);
// SendVector(SPCTestMode_enable, num_bits_SPCTestMode_enable);
bTargetAddress = 0x00;
while (bTargetAddress < (SECURITY_BYTES_PER_BANK * 2)) { //PTJ: we do SECURITY_BYTES_PER_BANK * 2 because we bTargetAddress += 2
//PTJ: TSYNC Enable
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_security_pt1, num_bits_read_security_pt1); //PTJ:
// Set the drive here because SendByte() does not.
SetSDATAStrong();
SendByte(bTargetAddress, 7); //PTJ: hardcode MSb of address as 0 in bit stream
SendVector(read_security_pt1_end,
num_bits_read_security_pt1_end);
//PTJ: TSYNC Disable
SendVector(tsync_disable, num_bits_tsync_disable);
SendVector(read_security_pt2, num_bits_read_security_pt2);
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(read_security_pt3, num_bits_read_security_pt3);
SetSDATAStrong();
SendByte(bTargetAddress, 7);
SendVector(read_security_pt3_end,
num_bits_read_security_pt3_end);
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress += 2;
}
bTargetAddress = 0x00;
bTargetDataPtr = 0x00;
SendVector(tsync_enable, num_bits_tsync_enable); //PTJ: 307, added for tsync testing
while (bTargetAddress < (SECURITY_BYTES_PER_BANK * 2)) { //PTJ: we do SECURITY_BYTES_PER_BANK * 2 because we bTargetAddress += 2
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4);
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress, 7);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
// return(BLOCK_ERROR);
// Increment the address by two to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
bTargetDataPtr++;
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable); //PTJ: 307, added for tsync testing
return (PASS);
}
/* ============================================================================
// fDetectHiLoTransition()
// Waits for transition from SDATA = 1 to SDATA = 0. Has a 100 msec timeout.
// TRANSITION_TIMEOUT is a loop counter for a 100msec timeout when waiting for
// a high-to-low transition. This is used in the polling loop of
// fDetectHiLoTransition(). The timing of the while(1) loops can be calculated
// and the number of loops is counted, using iTimer, to determine when 100
// msec has passed.
//
// SCLK cannot run faster than the specified maximum frequency of 8MHz. Some
// processors may need to have delays added after setting SCLK low and setting
// SCLK high in order to not exceed this specification. The maximum frequency
// of SCLK should be measured as part of validation of the final program
//
// Returns:
// 0 if successful
// -1 if timed out.
============================================================================*/
signed char fDetectHiLoTransition(void)
{
/* nTimer breaks out of the while loops if the wait in the two loops totals
// more than 100 msec. Making this static makes the loop run a faster.
// This is really a processor/compiler dependency and it not needed.
*/
static unsigned int iTimer;
/* NOTE:
// These loops look unconventional, but it is necessary to check SDATA_PIN
// as shown because the transition can be missed otherwise, due to the
// length of the SDATA Low-High-Low after certain commands.
*/
/* Generate clocks for the target to pull SDATA High */
iTimer = 40000; /*TRANSITION_TIMEOUT; */
while (1) {
int ret;
SCLKLow();
ret = fSDATACheck();
if (ret) /* exit once SDATA goes HI */
break;
SCLKHigh();
/* If the wait is too long then timeout */
if (iTimer-- == 0)
return ERROR;
}
/* Generate Clocks and wait for Target to pull SDATA Low again */
#if 0 /* wly */
iTimer = 40000;/* TRANSITION_TIMEOUT; */
while (1) {
int ret;
SCLKLow();
ret = fSDATACheck();
/* pr_info("wly while 2, ret=%d\n", ret); */
if (!ret) { /* exit once SDATA returns LOW */
break;
}
/* SCLKHigh();
// If the wait is too long then timeout
*/
if (iTimer-- == 0) {
#ifdef USE_TP
SetTPHigh(); /* Only used of Test Points are enabled */
#endif
return ERROR;
}
}
#else
SCLKHigh();
SetSDATALow();
SCLKLow();
if (!fSDATACheck()) /* exit once SDATA returns LOW */
SetSDATAHiZ();
mdelay(20);
#endif
#ifdef USE_TP
SetTPHigh(); /* Only used of Test Points are enabled */
#endif
return PASS;
}
/*
============================================================================
fPowerCycleInitializeTargetForISSP()
Implements the intialization vectors for the device.
The first time fDetectHiLoTransition is called the Clk pin is highZ because
the clock is not needed during acquire.
Returns:
0 if successful
INIT_ERROR if timed out on handshake to the device.
============================================================================
*/
signed char fPowerCycleInitializeTargetForISSP(void)
{
unsigned char n;
/*
Set all pins to highZ to avoid back powering the PSoC through the GPIO
protection diodes.
*/
SetSCLKHiZ();
SetSDATAHiZ();
/* Turn on power to the target device before other signals */
SetTargetVDDStrong();
for (n = 0; n < 100; n++)
Delay(50000);
ApplyTargetVDD();
/* wait 1msec for the power to stabilize */
for (n = 0; n < 10; n++)
Delay(DELAY100us);
/*
Set SCLK to high Z so there is no clock and wait for a high to low
transition on SDAT. SCLK is not needed this time.
*/
SetSCLKHiZ();
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return INIT_ERROR;
/*Configure the pins for initialization */
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
/*PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
!!! NOTE:
The timing spec that requires that the first Init-Vector happen within
1 msec after the reset/power up. For this reason, it is not advisable
to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
Init-Vector instructions below. Doing so could introduce excess delay
and cause the target device to exit ISSP Mode.
*/
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/*20100114 KJHW(Jason) : 0114 by KJHW */
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return INIT_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/*
NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
it does not occur (per spec).
*/
return PASS;
}
/* ============================================================================
// XCH: fVerifySecurity()
// This step is optional. Verifies that the security bits have been written correctly
============================================================================ */
signed char fVerifySecurity(void)
{
/* unsigned char bBlockNumber = 0;//wly */
bTargetAddress = 0x00;
#ifdef USE_TP
SetTPHigh(); /* Only used of Test Points are enabled */
#endif
#ifdef USE_TP
SetTPLow(); /* Only used of Test Points are enabled */
#endif
SendVector(verify_security, num_bits_verify_security);
fIsError = fDetectHiLoTransition();
if (fIsError)
return INIT_ERROR;
#ifdef USE_TP
SetTPHigh(); /* Only used of Test Points are enabled */
#endif
#ifdef USE_TP
SetTPLow(); /* Only used of Test Points are enabled */
#endif
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress = 0x00;
bTargetDataPtr = 0x00;
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_write_setup, num_bits_read_write_setup);
/* fReadWriteSetup(); */
/* we do SECURITY_BYTES_PER_BANK * 2 because we bTargetAddress += 2 */
while (bTargetAddress < (SECURITY_BYTES_PER_BANK * 2)) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 4);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 7);
SetSDATAHiZ(); /* Set to HiZ so Target can drive SDATA */
RunClock(2); /* Run two SCLK cycles between writing and reading */
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); /* Send the ReadByte Vector End */
/* Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
*/
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return BLOCK_ERROR;
/* Increment the address by two to accomodate 7-Bit addressing
(puts the 7-bit address into MSBit locations for "SendByte()").
*/
bTargetDataPtr++;
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable);
return PASS;
}
/* ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fPowerCycleInitializeTargetForISSP(void)
{
unsigned char n;
SetSDATALow();
SCLKLow();
RemoveTargetVDD();
mdelay(500);
SetSCLKHiZ();
SetSDATAHiZ();
/* Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
*/
/* Turn on power to the target device before other signals */
SetTargetVDDStrong();
ApplyTargetVDD();
/* wait 1msec for the power to stabilize */
for (n = 0; n < 10; n++)
udelay(DELAY100us);
/* Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
*/
SetSCLKHiZ();
mdelay(10);
/*
//fIsError = fDetectHiLoTransition();
//if (fIsError ) {
//printk("wly: fDetectHiLoTransition 11111 failed!\n");
//return(INIT_ERROR);
//}
*/
/* Configure the pins for initialization */
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow(); /* DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS! */
/* !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
*/
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if (fIsError) {
pr_info("wly: fDetectHiLoTransition 222222 failed!\n");
return INIT_ERROR;
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/* NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
*/
return PASS;
}
