int main(void)
{
int i = 0;
/* Init System, IP clock and multi-function I/O
In the end of SYS_Init() will issue SYS_LockReg()
to lock protected register. If user want to write
protected register, please issue SYS_UnlockReg()
to unlock protected register if necessary */
SYS_Init();
/* Init UART to 115200-8n1 for print message */
UART_Open(UART0, 115200);
/*Initial Timer0 to periodic mode with 1Hz */
TIMER_Open(TIMER0, TIMER_PERIODIC_MODE, 1);
/* Enable timer wake up system */
TIMER_EnableWakeup(TIMER0);
/* Enable Timer0 interrupt */
TIMER_EnableInt(TIMER0);
NVIC_EnableIRQ(TMR0_IRQn);
/* Start Timer0 counting */
TIMER_Start(TIMER0);
/* Unlock protected registers */
SYS_UnlockReg();
while(1)
{
CLK_PowerDown();
printf("Wake %d\n", i++);
}
}
static void lp_ticker_arm_cd(void)
{
TIMER_T * timer3_base = (TIMER_T *) NU_MODBASE(timer3_modinit.modname);
// Reset 8-bit PSC counter, 24-bit up counter value and CNTEN bit
// NUC472/M451: See TIMER_CTL_RSTCNT_Msk
// M480
timer3_base->CNT = 0;
while (timer3_base->CNT & TIMER_CNT_RSTACT_Msk);
// One-shot mode, Clock = 1 KHz
uint32_t clk_timer3 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
uint32_t prescale_timer3 = clk_timer3 / TMR3_CLK_PER_SEC - 1;
MBED_ASSERT((prescale_timer3 != (uint32_t) -1) && prescale_timer3 <= 127);
MBED_ASSERT((clk_timer3 % TMR3_CLK_PER_SEC) == 0);
// NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451/M480. In M451/M480, TIMER_CNT is updated continuously by default.
timer3_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk/* | TIMER_CTL_CNTDATEN_Msk*/);
timer3_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer3/* | TIMER_CTL_CNTDATEN_Msk*/;
cd_minor_clks = cd_major_minor_clks;
cd_minor_clks = NU_CLAMP(cd_minor_clks, TMR_CMP_MIN, TMR_CMP_MAX);
timer3_base->CMP = cd_minor_clks;
TIMER_EnableInt(timer3_base);
TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
TIMER_Start(timer3_base);
}
void lp_ticker_init(void)
{
if (lp_ticker_inited) {
return;
}
lp_ticker_inited = 1;
counter_major = 0;
cd_major_minor_clks = 0;
cd_minor_clks = 0;
wakeup_tick = (uint32_t) -1;
// Reset module
SYS_ResetModule(timer2_modinit.rsetidx);
SYS_ResetModule(timer3_modinit.rsetidx);
// Select IP clock source
CLK_SetModuleClock(timer2_modinit.clkidx, timer2_modinit.clksrc, timer2_modinit.clkdiv);
CLK_SetModuleClock(timer3_modinit.clkidx, timer3_modinit.clksrc, timer3_modinit.clkdiv);
// Enable IP clock
CLK_EnableModuleClock(timer2_modinit.clkidx);
CLK_EnableModuleClock(timer3_modinit.clkidx);
// Configure clock
uint32_t clk_timer2 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
uint32_t prescale_timer2 = clk_timer2 / TMR2_CLK_PER_SEC - 1;
MBED_ASSERT((prescale_timer2 != (uint32_t) -1) && prescale_timer2 <= 127);
MBED_ASSERT((clk_timer2 % TMR2_CLK_PER_SEC) == 0);
uint32_t cmp_timer2 = TMR2_CLK_PER_TMR2_INT;
MBED_ASSERT(cmp_timer2 >= TMR_CMP_MIN && cmp_timer2 <= TMR_CMP_MAX);
// Continuous mode
// NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451/M480. In M451/M480, TIMER_CNT is updated continuously by default.
((TIMER_T *) NU_MODBASE(timer2_modinit.modname))->CTL = TIMER_PERIODIC_MODE | prescale_timer2/* | TIMER_CTL_CNTDATEN_Msk*/;
((TIMER_T *) NU_MODBASE(timer2_modinit.modname))->CMP = cmp_timer2;
// Set vector
NVIC_SetVector(timer2_modinit.irq_n, (uint32_t) timer2_modinit.var);
NVIC_SetVector(timer3_modinit.irq_n, (uint32_t) timer3_modinit.var);
NVIC_EnableIRQ(timer2_modinit.irq_n);
NVIC_EnableIRQ(timer3_modinit.irq_n);
TIMER_EnableInt((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
// NOTE: TIMER_Start() first and then lp_ticker_set_interrupt(); otherwise, we may get stuck in lp_ticker_read() because
// timer is not running.
// Start timer
TIMER_Start((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
// Schedule wakeup to match semantics of lp_ticker_get_compare_match()
lp_ticker_set_interrupt(wakeup_tick);
}
void lp_ticker_init(void)
{
if (lp_ticker_inited) {
return;
}
lp_ticker_inited = 1;
counter_major = 0;
cd_major_minor_ms = 0;
cd_minor_ms = 0;
wakeup_tick = TMR_CMP_MAX * MS_PER_TMR2_CLK / MS_PER_TICK;
// Reset module
SYS_ResetModule(timer2_modinit.rsetidx);
SYS_ResetModule(timer3_modinit.rsetidx);
// Select IP clock source
CLK_SetModuleClock(timer2_modinit.clkidx, timer2_modinit.clksrc, timer2_modinit.clkdiv);
CLK_SetModuleClock(timer3_modinit.clkidx, timer3_modinit.clksrc, timer3_modinit.clkdiv);
// Enable IP clock
CLK_EnableModuleClock(timer2_modinit.clkidx);
CLK_EnableModuleClock(timer3_modinit.clkidx);
// Configure clock
uint32_t clk_timer2 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
uint32_t prescale_timer2 = clk_timer2 / TMR2_CLK_FREQ - 1;
MBED_ASSERT((prescale_timer2 != (uint32_t) -1) && prescale_timer2 <= 127);
uint32_t cmp_timer2 = MS_PER_TMR2_INT / MS_PER_TMR2_CLK;
MBED_ASSERT(cmp_timer2 >= TMR_CMP_MIN && cmp_timer2 <= TMR_CMP_MAX);
// Continuous mode
((TIMER_T *) NU_MODBASE(timer2_modinit.modname))->CTL = TIMER_PERIODIC_MODE | prescale_timer2 | TIMER_CTL_CNTDATEN_Msk;
((TIMER_T *) NU_MODBASE(timer2_modinit.modname))->CMP = cmp_timer2;
// Set vector
NVIC_SetVector(timer2_modinit.irq_n, (uint32_t) timer2_modinit.var);
NVIC_SetVector(timer3_modinit.irq_n, (uint32_t) timer3_modinit.var);
NVIC_EnableIRQ(timer2_modinit.irq_n);
NVIC_EnableIRQ(timer3_modinit.irq_n);
TIMER_EnableInt((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
// Schedule wakeup to match semantics of lp_ticker_get_compare_match()
lp_ticker_set_interrupt(lp_ticker_read(), wakeup_tick);
// Start timer
TIMER_Start((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
}
void Timer1Init(uint16_t freq)
{
/* Enable peripheral clock */
CLK_EnableModuleClock(TMR1_MODULE);
/* Peripheral clock source */
CLK_SetModuleClock(TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_LIRC, 0);
/* Enable Timer0 NVIC */
NVIC_EnableIRQ(TMR1_IRQn);
/* Open Timer0 time-out frequency to (freq) Hz in periodic mode */
TIMER_Open(TIMER1, TIMER_PERIODIC_MODE, freq);
/* Enable Timer0 time-out interrupt and wake-up function */
TIMER_EnableInt(TIMER1);
TIMER_EnableWakeup(TIMER1);
/* Start Timer0 counting */
TIMER_Start(TIMER1);
}
static void lp_ticker_arm_cd(void)
{
TIMER_T * timer3_base = (TIMER_T *) NU_MODBASE(timer3_modinit.modname);
// Reset 8-bit PSC counter, 24-bit up counter value and CNTEN bit
timer3_base->CTL |= TIMER_CTL_RSTCNT_Msk;
// One-shot mode, Clock = 1 KHz
uint32_t clk_timer3 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
uint32_t prescale_timer3 = clk_timer3 / TMR3_CLK_FREQ - 1;
MBED_ASSERT((prescale_timer3 != (uint32_t) -1) && prescale_timer3 <= 127);
timer3_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk | TIMER_CTL_CNTDATEN_Msk);
timer3_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer3 | TIMER_CTL_CNTDATEN_Msk;
cd_minor_ms = cd_major_minor_ms;
cd_minor_ms = NU_CLAMP(cd_minor_ms, TMR_CMP_MIN * MS_PER_TMR3_CLK, TMR_CMP_MAX * MS_PER_TMR3_CLK);
timer3_base->CMP = cd_minor_ms / MS_PER_TMR3_CLK;
TIMER_EnableInt(timer3_base);
TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
TIMER_Start(timer3_base);
}
int main(void)
{
/* Init System, IP clock and multi-function I/O
In the end of SYS_Init() will issue SYS_LockReg()
to lock protected register. If user want to write
protected register, please issue SYS_UnlockReg()
to unlock protected register if necessary */
SYS_Init();
/* Init UART to 115200-8n1 for print message */
UART_Open(UART0, 115200);
printf("\nThis sample code use timer to wake up system every 1 second \n");
/*Initial Timer0 to periodic mode with 1Hz */
TIMER_Open(TIMER0, TIMER_PERIODIC_MODE, 1);
/* Enable timer wake up system */
TIMER_EnableWakeup(TIMER0);
/* Enable Timer0 interrupt */
TIMER_EnableInt(TIMER0);
NVIC_EnableIRQ(TMR0_IRQn);
/* Start Timer0 counting */
TIMER_Start(TIMER0);
/* Unlock protected registers to let CPU enter power down mode */
SYS_UnlockReg();
while(1)
{
printf("Sleep 1 second\n");
// Wait 'til UART FIFO empty to get a cleaner console out
while(!UART_IS_TX_EMPTY(UART0));
CLK_PowerDown();
}
}
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
volatile uint32_t u32InitCount;
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU @ %d Hz\n", SystemCoreClock);
printf("+-------------------------------------------------+\n");
printf("| Timer0 Power-down and Wake-up Sample Code |\n");
printf("+-------------------------------------------------+\n\n");
printf("# Timer Settings:\n");
printf(" Timer0: Clock source is LIRC(10 kHz); Toggle-output mode and frequency is 1 Hz; Enable interrupt and wake-up.\n");
printf("# System will enter to Power-down mode while Timer0 interrupt count is reaching 3;\n");
printf(" And be waken-up while Timer0 interrupt count is reaching 4.\n\n");
/* To program PWRCON register, it needs to disable register protection first. */
SYS_UnlockReg();
/* Open Timer0 frequency to 1 Hz in toggle-output mode */
TIMER_Open(TIMER0, TIMER_TOGGLE_MODE, 1);
/* Enable Timer0 interrupt and wake-up function */
TIMER_EnableInt(TIMER0);
TIMER_EnableWakeup(TIMER0);
/* Enable Timer0 NVIC */
NVIC_EnableIRQ(TMR0_IRQn);
/* Start Timer0 counting */
TIMER_Start(TIMER0);
u32InitCount = g_u8IsTMR0WakeupFlag = g_au32TMRINTCount[0] = 0;
while(g_au32TMRINTCount[0] < 10) {
if(g_au32TMRINTCount[0] != u32InitCount) {
printf("Timer0 interrupt count - %d\n", g_au32TMRINTCount[0]);
if(g_au32TMRINTCount[0] == 3) {
PowerDownFunction();
/* Check if Timer0 time-out interrupt and wake-up flag occurred */
while(1) {
if(((CLK->PWRCON & CLK_PWRCON_PD_WU_STS_Msk) == CLK_PWRCON_PD_WU_STS_Msk) && (g_u8IsTMR0WakeupFlag == 1))
break;
}
printf("System has been waken-up done. (Timer0 interrupt count is %d)\n\n", g_au32TMRINTCount[0]);
}
u32InitCount = g_au32TMRINTCount[0];
}
}
/* Stop Timer0 counting */
TIMER_Stop(TIMER0);
printf("*** PASS ***\n");
while(1);
}
