Exemplo n.º 1
0
  /* pixel_height = */ 64
};

static const uint8_t u8x8_d_uc1604_jlx19264_init_seq[] = {
    
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */

  U8X8_C(0x0e2),            			/* soft reset */
  U8X8_DLY(200),
  U8X8_DLY(200),

  U8X8_C(0x02f),            			/* power on, Bit 2 PC2=1 (internal charge pump), Bits 0/1: cap of panel */
  U8X8_DLY(200),
  U8X8_DLY(200),
  
  U8X8_CA(0x081, 0x052),		/* set contrast, JLX19264G suggestion: 0x045 */
  U8X8_C(0x0eb),            			/* LCD bias Bits 0/1: 00=6 01=7, 10=8, 11=9 */

  
  //U8X8_C(0x023),            			/* Bit 0/1: Temp compenstation, Bit 2: Multiplex Rate 0=96, 1=128 */
  //U8X8_C(0x027),            			/* Bit 0/1: Temp compenstation, Bit 2: Multiplex Rate 0=96, 1=128 */

  U8X8_C(0x0c4),            			/* Map control, Bit 2: MY=1, Bit 1: MX=0 */
  U8X8_C(0x0a0),            			/* 0xa0: 76Hz FPS, controller default: 0x0a1: 95Hz FPS */
  
  
  U8X8_C(0x040),            			/* set scroll line to 0 */
  U8X8_C(0x089),            			/* RAM access control (controller default: 0x089)*/
  
  
  U8X8_C(0x000),		                /* column low nibble */
  https://github.com/olikraus/u8g2/issues/784

*/


#include "u8x8.h"



/* with internal charge pump (icp) */
static const uint8_t u8x8_d_ssd1318_128x96_icp_init_seq[] = {
    
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  
  
  U8X8_CA(0x0fd, 0x012),		/* unlock */
  U8X8_C(0x0ae),		                /* display off */
  U8X8_CA(0x0ad, 0x0d0),		/* external or internal IREF selection */
  U8X8_CA(0x0a8, 0x05f),		/* multiplex ratio, 96 duty */
  U8X8_CA(0x0d3, 0x000),		/* display offset */
  U8X8_CA(0x0a2, 0x000),		/* start line */
  
  
  // four possible charge pump setting from as per sec 6.8.2 of the ssd1318 datasheet
  // uncomment only one of the below for lines  
  // default: 
  // U8X8_CA(0x08d, 0x004, 0x0ac, 0x001),		/* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
  // U8X8_CA(0x08d, 0x044, 0x0ac, 0x001),		/* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
  // U8X8_CA(0x08d, 0x084, 0x0ac, 0x001),		/* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
  U8X8_CAAA(0x08d, 0x0c4, 0x0ac, 0x001),		/* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
  
Exemplo n.º 3
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    default:
      return 0;
  }
  return 1;
}

/*==================================================*/

/* QG-6428TSWKG01 */
static const uint8_t u8x8_d_sh1107_64x128_noname_init_seq[] = {
    
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  
  
  U8X8_C(0x0ae),		                /* display off */
  U8X8_CA(0x0dc, 0x000),		/* start line */
  U8X8_CA(0x081, 0x02f), 		/* [2] set contrast control */
  U8X8_C(0x020),		                /* use page addressing mode */

  // U8X8_C(0x0a1),				/* segment remap a0/a1*/
  // U8X8_C(0x0c8),				/* c0: scan dir normal, c8: reverse */
  // Flipmode
  U8X8_C(0x0a0),				/* segment remap a0/a1*/
  U8X8_C(0x0c0),				/* c0: scan dir normal, c8: reverse */
  
  U8X8_CA(0x0a8, 0x7f),		/* 0x03f) multiplex ratio */
  U8X8_CA(0x0d3, 0x060),		/* display offset */
  U8X8_CA(0x0d5, 0x051),		/* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
  U8X8_CA(0x0d9, 0x022), 		/* [2] pre-charge period 0x022/f1*/
  U8X8_CA(0x0db, 0x035), 		/* vcomh deselect level */  
  
Exemplo n.º 4
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  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  U8X8_C(0x0a9),		                /* display on */
  U8X8_END_TRANSFER(),             	/* disable chip */
  U8X8_END()             			/* end of sequence */
};

static const uint8_t u8x8_d_uc1611_powersave1_seq[] = {
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  U8X8_C(0x0a8),		                /* display off, enter sleep mode */
  U8X8_END_TRANSFER(),             	/* disable chip */
  U8X8_END()             			/* end of sequence */
};

static const uint8_t u8x8_d_uc1611_flip0_seq[] = {
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  U8X8_CA(0x0c0, 0x004),            	/* LCD Mapping */
  U8X8_END_TRANSFER(),             	/* disable chip */
  U8X8_END()             			/* end of sequence */
};

static const uint8_t u8x8_d_uc1611_flip1_seq[] = {
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  U8X8_CA(0x0c0, 0x002),            	/* LCD Mapping */
  U8X8_END_TRANSFER(),             	/* disable chip */
  U8X8_END()             			/* end of sequence */
};


uint8_t u8x8_d_uc1611_common(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
{
  uint8_t x, y, c;
Exemplo n.º 5
0
  STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
  ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
  
*/


#include "u8x8.h"


/* ER OLED */
static const uint8_t u8x8_d_ssd1326_er_256x32_init_seq[] = {
    
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */

  U8X8_CA(0x0fd, 0x012),		/* unlock (not required, this is default by reset) */
  
  
  U8X8_C(0x0ae),		                /* display off */
  U8X8_CA(0x0a8, 0x01f),		/* multiplex ratio: 0x03f * 1/64 duty - changed by CREESOO, acc. to datasheet, 100317*/ 
  U8X8_CA(0x0a1, 0x000),		/* display start line */
  U8X8_CA(0x0a2, 0x000),		/* display offset, shift mapping ram counter */
  //U8X8_CA(0x0ad, 0x002),		/* master configuration: disable embedded DC-DC, enable internal VCOMH */
  U8X8_CA(0x0a0, 0x052),		/* remap configuration, horizontal address increment (bit 2 = 0), enable nibble remap (upper nibble is left, bit 1 = 1) */
  U8X8_C(0x086),				/* full current range (0x084, 0x085, 0x086) */

  U8X8_C(0x0b7),				/* set default gray scale table */
    
  U8X8_CA(0x081, 0x027),		/* contrast, brightness, 0..128 */
  U8X8_CA(0x0b1, 0x071),                    /* phase length */
  //U8X8_CA(0x0b2, 0x051),		/* frame frequency (row period) */
Exemplo n.º 6
0
  /* tile_width = */ 16,
  /* tile_hight = */ 8,
  /* default_x_offset = */ 2,
  /* flipmode_x_offset = */ 2,
  /* pixel_width = */ 128,
  /* pixel_height = */ 64
};


static const uint8_t u8x8_d_ssd1309_128x64_noname_init_seq[] = {
    
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  
  
  U8X8_C(0x0ae),		                /* display off */
  U8X8_CA(0x0d5, 0x0a0),		/* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
  //U8X8_CA(0x0a8, 0x03f),		/* multiplex ratio */
  U8X8_C(0x040),		        	/* set display start line to 0 */
  U8X8_CA(0x020, 0x002),		/* page addressing mode */
  
  U8X8_C(0x0a1),				/* segment remap a0/a1*/
  U8X8_C(0x0c8),				/* c0: scan dir normal, c8: reverse */
  // Flipmode
  // U8X8_C(0x0a0),				/* segment remap a0/a1*/
  // U8X8_C(0x0c0),				/* c0: scan dir normal, c8: reverse */
  
  U8X8_CA(0x0da, 0x012),		/* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */

  U8X8_CA(0x081, 0x06f), 		/* [2] set contrast control */
  U8X8_CA(0x0d9, 0x0d3), 		/* [2] pre-charge period 0x022/f1*/
  U8X8_CA(0x0db, 0x020), 		/* vcomh deselect level */  
Exemplo n.º 7
0
  
*/


#include "u8x8.h"



/* EastRising 0.66 OLED */
static const uint8_t u8x8_d_ssd1306_64x48_er_init_seq[] = {
    
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  
  
  U8X8_C(0x0ae),		                /* display off */
  U8X8_CA(0x0d5, 0x080),		/* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
  U8X8_CA(0x0a8, 0x02f),		/* multiplex ratio, 0.66 OLED: changed from 0x1f to 0x2f */
  U8X8_CA(0x0d3, 0x000),		/* display offset, 0.66 OLED  */
  U8X8_C(0x040),		                /* set display start line to 0, 0.66 OLED */
  U8X8_CA(0x08d, 0x014),		/* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, 0.66 OLED  0x14*/
  U8X8_CA(0x020, 0x000),		/* page addressing mode */
  
  U8X8_C(0x0a1),				/* segment remap a0/a1, 0.66 OLED  */
  U8X8_C(0x0c8),				/* c0: scan dir normal, c8: reverse, 0.66 OLED  */
  // Flipmode
  // U8X8_C(0x0a0),				/* segment remap a0/a1*/
  // U8X8_C(0x0c0),				/* c0: scan dir normal, c8: reverse */
  
  U8X8_CA(0x0da, 0x012),		/* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5), 0.66 OLED */
  U8X8_CA(0x081, 0x0cf),		/* [2] set contrast control, 0.66 OLED datasheet: 0xcf */
  U8X8_CA(0x0d9, 0x022),		/* [2] pre-charge period 0x022/f1, 0.66 OLED datasheet: 0x22 */
#include "u8x8.h"




static const uint8_t u8x8_d_ssd1306_128x64_noname_init_seq[] = {
    
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */
  
  
  U8X8_C(0x0ae),		                /* display off */
  U8X8_CA(0x0d5, 0x080),		/* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
  U8X8_CA(0x0a8, 0x03f),		/* multiplex ratio */
  U8X8_CA(0x0d3, 0x000),		/* display offset */
  U8X8_C(0x040),		                /* set display start line to 0 */
  U8X8_CA(0x08d, 0x014),		/* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */
  U8X8_CA(0x020, 0x000),		/* page addressing mode */
  
#if U8X8_DEFAULT_FLIP_MODE == 0 
  U8X8_C(0x0a1),				/* segment remap a0/a1*/
  U8X8_C(0x0c8),				/* c0: scan dir normal, c8: reverse */
#else
  U8X8_C(0x0a0),				/* segment remap a0/a1*/
  U8X8_C(0x0c0),				/* c0: scan dir normal, c8: reverse */
#endif
  
  U8X8_CA(0x0da, 0x012),		/* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */
  U8X8_CA(0x081, 0x0cf),		/* [2] set contrast control */
  U8X8_CA(0x0d9, 0x0f1),		/* [2] pre-charge period 0x022/f1*/
  U8X8_CA(0x0db, 0x040),		/* vcomh deselect level */
Exemplo n.º 9
0
*/


#include "u8x8.h"


#define L(a,b,c,d) (((a)<<6)|((b)<<4)|((c)<<2)|(d))


/* GDE021A1, 2.1" EPD */
static const uint8_t u8x8_d_ssd1606_172x72_gde021a1_init_seq[] = {
    
  U8X8_START_TRANSFER(),             	/* enable chip, delay is part of the transfer start */

  U8X8_CA(0x10, 0x00),	/* Deep Sleep mode Control: Disable */
  U8X8_CA(0x11, 0x03),	/* Define data entry mode, x&y inc, x first */
  U8X8_CAA(0x44, 0, 31),	/* RAM x start & end, each byte has 4 pixel, 32*4=128 */
  U8X8_CAA(0x45, 0, 179),	/* RAM y start & end, 179 MAX */
  
  U8X8_CA(0x4e, 0),	/* set x pos, 0..31 */
  U8X8_CA(0x4f, 0),	/* set y pos, 0...179 */

  U8X8_CA(0xf0, 0x1f),	/* set booster feedback to internal */
  U8X8_CA(0x22, 0xc0),	/* display update seq. option: enable clk, enable CP, .... todo: this is never activated */
  
  U8X8_C(0x32),	/* write LUT register*/

#ifdef ORIGINAL_LUT
  
  /* wavefrom part of the LUT: absolute LUT... this will always force the destination color */
Exemplo n.º 10
0
  U8X8_DLY(200),

  U8X8_C(0x023),            			/* Bit 0/1: Temp compenstation, Bit 2: Multiplex Rate 0=96, 1=128 */
  //U8X8_C(0x027),            			/* Bit 0/1: Temp compenstation, Bit 2: Multiplex Rate 0=96, 1=128 */

  U8X8_C(0x0c8),            			/* Map control, Bit 3: MY=1, Bit 2: MX=0, Bit 0: MSF =0 */
  U8X8_C(0x0e8),            			/* LCD bias Bits 0/1: 00=10.7 01=10.3, 10=12.0, 11=12.7 */
  
  U8X8_C(0x02f),            			/* power on, Bit 2 PC2=1 (internal charge pump), Bits 0/1: cap of panel */
  U8X8_DLY(50),
  
  U8X8_C(0x040),            			/* set display start line to 0 */
  U8X8_C(0x090),            			/* no fixed lines */
  U8X8_C(0x089),            			/* RAM access control */
  
  U8X8_CA(0x081, 0x014),		/* set contrast, ERC24064-1 default: 0x040 */
  
  U8X8_C(0x000),		                /* column low nibble */
  U8X8_C(0x010),		                /* column high nibble */  
  U8X8_C(0x0b0),		                /* page adr  */
  
  
  U8X8_END_TRANSFER(),             	/* disable chip */
  U8X8_END()             			/* end of sequence */
};

uint8_t u8x8_d_uc1608_erc24064(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
{
  /* call common procedure first and handle messages there */
  if ( u8x8_d_uc1608_common(u8x8, msg, arg_int, arg_ptr) == 0 )
  {