void Uart::end()
{
UART_HAL_Init(instance);
NVIC_DisableIRQ(irqNumber);
SIM_HAL_DisableClock(SIM, gate_name);
rxBuffer.clear();
}
void Uart::begin(uint32_t baudrate)
{
SIM_HAL_EnableClock(SIM, gate_name);
PORT_CLOCK_ENABLE(rx);
PORT_CLOCK_ENABLE(tx);
PORT_SET_MUX_UART(rx);
PORT_SET_MUX_UART(tx);
#if FSL_FEATURE_SOC_UART_COUNT
UART_HAL_Init(instance);
UART_HAL_SetBaudRate(instance, clock, baudrate);
UART_HAL_SetBitCountPerChar(instance, kUart8BitsPerChar);
UART_HAL_SetParityMode(instance, kUartParityDisabled);
#if FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT
UART_HAL_SetStopBitCount(instance, kUartOneStopBit);
#endif
UART_HAL_SetIntMode(instance, kUartIntRxDataRegFull, true);
NVIC_EnableIRQ(irqNumber);
UART_HAL_EnableTransmitter(instance);
UART_HAL_EnableReceiver(instance);
#endif
}
/*FUNCTION**********************************************************************
*
* Function Name : UART_DRV_Init
* Description : This function initializes a UART instance for operation.
* This function will initialize the run-time state structure to keep track of the on-going
* transfers, ungate the clock to the UART module, initialize the module
* to user defined settings and default settings, configure the IRQ state structure and enable
* the module-level interrupt to the core, and enable the UART module transmitter and receiver.
* The following is an example of how to set up the uart_state_t and the
* uart_user_config_t parameters and how to call the UART_DRV_Init function by passing
* in these parameters:
* uart_user_config_t uartConfig;
* uartConfig.baudRate = 9600;
* uartConfig.bitCountPerChar = kUart8BitsPerChar;
* uartConfig.parityMode = kUartParityDisabled;
* uartConfig.stopBitCount = kUartOneStopBit;
* uart_state_t uartState;
* UART_DRV_Init(instance, &uartState, &uartConfig);
*
*END**************************************************************************/
uart_status_t UART_DRV_Init(uint32_t instance, uart_state_t * uartStatePtr,
const uart_user_config_t * uartUserConfig)
{
assert(uartStatePtr && uartUserConfig);
assert(instance < HW_UART_INSTANCE_COUNT);
uint32_t baseAddr = g_uartBaseAddr[instance];
uint32_t uartSourceClock;
/* Exit if current instance is already initialized. */
if (g_uartStatePtr[instance])
{
return kStatus_UART_Initialized;
}
/* Clear the state structure for this instance. */
memset(uartStatePtr, 0, sizeof(uart_state_t));
/* Save runtime structure pointer.*/
g_uartStatePtr[instance] = uartStatePtr;
/* Un-gate UART module clock */
CLOCK_SYS_EnableUartClock(instance);
/* Initialize UART to a known state. */
UART_HAL_Init(baseAddr);
/* Create Semaphore for txIrq and rxIrq. */
OSA_SemaCreate(&uartStatePtr->txIrqSync, 0);
OSA_SemaCreate(&uartStatePtr->rxIrqSync, 0);
/* UART clock source is either system clock or bus clock depending on the instance */
uartSourceClock = CLOCK_SYS_GetUartFreq(instance);
/* Initialize UART baud rate, bit count, parity and stop bit. */
UART_HAL_SetBaudRate(baseAddr, uartSourceClock, uartUserConfig->baudRate);
UART_HAL_SetBitCountPerChar(baseAddr, uartUserConfig->bitCountPerChar);
UART_HAL_SetParityMode(baseAddr, uartUserConfig->parityMode);
#if FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT
UART_HAL_SetStopBitCount(baseAddr, uartUserConfig->stopBitCount);
#endif
#if FSL_FEATURE_UART_HAS_FIFO
uint8_t fifoSize;
/* Obtain raw TX FIFO size bit setting */
fifoSize = UART_HAL_GetTxFifoSize(baseAddr);
/* Now calculate the number of data words per given FIFO size */
uartStatePtr->txFifoEntryCount = (fifoSize == 0 ? 1 : 0x1 << (fifoSize + 1));
/* Configure the TX FIFO watermark to be 1/2 of the total entry or 0 if entry count = 1
* A watermark setting of 0 for TX FIFO entry count of 1 means that TDRE will only interrupt
* when the TX buffer (the one entry in the TX FIFO) is empty. Otherwise, if we set the
* watermark to 1, the TDRE will always be set regardless if the TX buffer was empty or not
* as the spec says TDRE will set when the FIFO is at or below the configured watermark. */
if (uartStatePtr->txFifoEntryCount > 1)
{
UART_HAL_SetTxFifoWatermark(baseAddr, (uartStatePtr->txFifoEntryCount >> 1U));
}
void serial_init(serial_t *obj, PinName tx, PinName rx) {
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
obj->index = pinmap_merge(uart_tx, uart_rx);
MBED_ASSERT((int)obj->index != NC);
uint32_t uartSourceClock = CLOCK_SYS_GetUartFreq(obj->index);
CLOCK_SYS_EnableUartClock(obj->index);
uint32_t uart_addrs[] = UART_BASE_ADDRS;
UART_HAL_Init(uart_addrs[obj->index]);
UART_HAL_SetBaudRate(uart_addrs[obj->index], uartSourceClock, 9600);
UART_HAL_SetParityMode(uart_addrs[obj->index], kUartParityDisabled);
#if FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT
UART_HAL_SetStopBitCount(uart_addrs[obj->index], kUartOneStopBit);
#endif
UART_HAL_SetBitCountPerChar(uart_addrs[obj->index], kUart8BitsPerChar);
UART_HAL_DisableTransmitter(uart_addrs[obj->index]);
UART_HAL_DisableReceiver(uart_addrs[obj->index]);
pinmap_pinout(tx, PinMap_UART_TX);
pinmap_pinout(rx, PinMap_UART_RX);
if (tx != NC) {
UART_HAL_FlushTxFifo(uart_addrs[obj->index]);
UART_HAL_EnableTransmitter(uart_addrs[obj->index]);
pin_mode(tx, PullUp);
}
if (rx != NC) {
UART_HAL_EnableReceiver(uart_addrs[obj->index]);
pin_mode(rx, PullUp);
}
if (obj->index == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
}
/*FUNCTION**********************************************************************
*
* Function Name : UART_DRV_DmaInit
* Description : This function initializes a UART instance for operation.
* This function will initialize the run-time state structure to keep track of
* the on-going transfers, ungate the clock to the UART module, initialize the
* module to user defined settings and default settings, configure UART DMA
* and enable the UART module transmitter and receiver.
* The following is an example of how to set up the uart_dma_state_t and the
* uart_user_config_t parameters and how to call the UART_DRV_DmaInit function
* by passing in these parameters:
* uart_user_config_t uartConfig;
* uartConfig.baudRate = 9600;
* uartConfig.bitCountPerChar = kUart8BitsPerChar;
* uartConfig.parityMode = kUartParityDisabled;
* uartConfig.stopBitCount = kUartOneStopBit;
* uart_dma_state_t uartDmaState;
* UART_DRV_DmaInit(instance, &uartDmaState, &uartConfig);
*
*END**************************************************************************/
uart_status_t UART_DRV_DmaInit(uint32_t instance,
uart_dma_state_t * uartDmaStatePtr,
const uart_dma_user_config_t * uartUserConfig)
{
assert(uartDmaStatePtr && uartUserConfig);
assert(g_uartBase[instance]);
assert(instance < UART_INSTANCE_COUNT);
/* This driver only support UART instances with separate DMA channels for
* both Tx and Rx.*/
assert(FSL_FEATURE_UART_HAS_SEPARATE_DMA_RX_TX_REQn(instance) == 1);
UART_Type * base = g_uartBase[instance];
uint32_t uartSourceClock = 0;
dma_request_source_t uartTxDmaRequest = kDmaRequestMux0Disable;
dma_request_source_t uartRxDmaRequest = kDmaRequestMux0Disable;
/* Exit if current instance is already initialized. */
if (g_uartStatePtr[instance])
{
return kStatus_UART_Initialized;
}
/* Clear the state structure for this instance. */
memset(uartDmaStatePtr, 0, sizeof(uart_dma_state_t));
/* Save runtime structure pointer.*/
g_uartStatePtr[instance] = uartDmaStatePtr;
/* Un-gate UART module clock */
CLOCK_SYS_EnableUartClock(instance);
/* Initialize UART to a known state. */
UART_HAL_Init(base);
/* Create Semaphore for txIrq and rxIrq. */
OSA_SemaCreate(&uartDmaStatePtr->txIrqSync, 0);
OSA_SemaCreate(&uartDmaStatePtr->rxIrqSync, 0);
/* UART clock source is either system or bus clock depending on instance */
uartSourceClock = CLOCK_SYS_GetUartFreq(instance);
/* Initialize UART baud rate, bit count, parity and stop bit. */
UART_HAL_SetBaudRate(base, uartSourceClock, uartUserConfig->baudRate);
UART_HAL_SetBitCountPerChar(base, uartUserConfig->bitCountPerChar);
UART_HAL_SetParityMode(base, uartUserConfig->parityMode);
#if FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT
UART_HAL_SetStopBitCount(base, uartUserConfig->stopBitCount);
#endif
/* Enable DMA trigger when transmit data register empty,
* and receive data register full. */
UART_HAL_SetTxDmaCmd(base, true);
UART_HAL_SetRxDmaCmd(base, true);
switch (instance)
{
#if (FSL_FEATURE_UART_HAS_SEPARATE_DMA_RX_TX_REQn(0) == 1)
case 0:
uartRxDmaRequest = kDmaRequestMux0UART0Rx;
uartTxDmaRequest = kDmaRequestMux0UART0Tx;
break;
#endif
#if (FSL_FEATURE_UART_HAS_SEPARATE_DMA_RX_TX_REQn(1) == 1)
case 1:
uartRxDmaRequest = kDmaRequestMux0UART1Rx;
uartTxDmaRequest = kDmaRequestMux0UART1Tx;
break;
#endif
#if (FSL_FEATURE_UART_HAS_SEPARATE_DMA_RX_TX_REQn(2) == 1)
case 2:
uartRxDmaRequest = kDmaRequestMux0UART2Rx;
uartTxDmaRequest = kDmaRequestMux0UART2Tx;
break;
#endif
default :
break;
}
/* Request DMA channels for RX FIFO. */
DMA_DRV_RequestChannel(kDmaAnyChannel, uartRxDmaRequest,
&uartDmaStatePtr->dmaUartRx);
DMA_DRV_RegisterCallback(&uartDmaStatePtr->dmaUartRx,
UART_DRV_DmaRxCallback, (void *)instance);
/* Request DMA channels for TX FIFO. */
DMA_DRV_RequestChannel(kDmaAnyChannel, uartTxDmaRequest,
&uartDmaStatePtr->dmaUartTx);
DMA_DRV_RegisterCallback(&uartDmaStatePtr->dmaUartTx,
UART_DRV_DmaTxCallback, (void *)instance);
/* Finally, enable the UART transmitter and receiver*/
UART_HAL_EnableTransmitter(base);
UART_HAL_EnableReceiver(base);
return kStatus_UART_Success;
}
