//Read from UART0(requires special uart.c!)
static void ICACHE_FLASH_ATTR recvTask(os_event_t *events)
{
	uint8_t c, i;
  char ch[1000];
  c = 0;
  i = 0;
  
  //uart0_tx_buffer("uart",4);
  
	while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
	{
		WRITE_PERI_REG(0X60000914, 0x73); //WTD
		c = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF; 
		
		ch[i] = c;
		i++;
  }

	if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
	}
	else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
	}
	ETS_UART_INTR_ENABLE();
	
	// send to Server if available
	if (pconn && i != 0) 
	{
	  espconn_sent(pconn, ch, i);
	}		
}
Exemplo n.º 2
0
//// modified for LASS , receive data from UART0 (sensor)
static void ICACHE_FLASH_ATTR recvTask(os_event_t *events)
{
	uint8_t i;
	uint16 length = 0;
  //char* p;
  //p=&LASSstring[0];
	while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
	{
		WRITE_PERI_REG(0X60000914, 0x73); //WTD
    //length=0;
		while ((READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) && (length<MAX_UARTBUFFER))
			uartbuffer[length++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
		//refer to Plantower PMS5003 
			p1_0 = (uint32)uartbuffer[4]*256+(uint32)uartbuffer[5];
			p2_5 = (uint32)uartbuffer[6]*256+(uint32)uartbuffer[7];
			p10_0 = (uint32)uartbuffer[8]*256+(uint32)uartbuffer[9];
	}

	if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
	}
	else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
	}
  
  INFO("%s\r\n",LASSstring);
	//uart_rx_intr_enable(UART0);
  ETS_UART_INTR_ENABLE();
  ///// BUG ! TX malfunctioned!
}
Exemplo n.º 3
0
/******************************************************************************
 * FunctionName : uart0_rx_intr_handler
 * Description  : Internal used function
 *                UART0 interrupt handler, add self handle code inside
 * Parameters   : void *para - point to ETS_UART_INTR_ATTACH's arg
 * Returns      : NONE
*******************************************************************************/
static void // must not use ICACHE_FLASH_ATTR !
uart0_rx_intr_handler(void *para)
{
  // we assume that uart1 has interrupts disabled (it uses the same interrupt vector)
  uint8 uart_no = UART0;
  const uint32 one_sec = 1000000; // one second in usecs

  // we end up largely ignoring framing errors and we just print a warning every second max
  if (READ_PERI_REG(UART_INT_RAW(uart_no)) & UART_FRM_ERR_INT_RAW) {
    uint32 now = system_get_time();
    if (last_frm_err == 0 || (now - last_frm_err) > one_sec) {
      os_printf("UART framing error (bad baud rate?)\n");
      last_frm_err = now;
    }
    // clear rx fifo (apparently this is not optional at this point)
    SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST);
    CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST);
    // reset framing error
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_FRM_ERR_INT_CLR);
  // once framing errors are gone for 10 secs we forget about having seen them
  } else if (last_frm_err != 0 && (system_get_time() - last_frm_err) > 10*one_sec) {
    last_frm_err = 0;
  }

  if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)
  ||  UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST))
  {
    //DBG_UART("stat:%02X",*(uint8 *)UART_INT_ENA(uart_no));
    ETS_UART_INTR_DISABLE();
    post_usr_task(uart_recvTaskNum, 0);
  }
}
Exemplo n.º 4
0
static void ICACHE_FLASH_ATTR recvTask(os_event_t *events)
{
	uint8_t i;

	while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
	{
		WRITE_PERI_REG(0X60000914, 0x73); //WTD
		uint16 length = 0;
		while ((READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) && (length<MAX_UARTBUFFER))
			uartbuffer[length++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
		for (i = 0; i < MAX_CONN; ++i)
			if (connData[i].conn) 
				espbuffsent(&connData[i], uartbuffer, length);		
	}

	if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
	}
	else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
	{
		WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
	}
	ETS_UART_INTR_ENABLE();
}
Exemplo n.º 5
0
/**
  * @brief  Uart receive task.
  * @param  events: contain the uart receive data
  * @retval None
  */
static void ICACHE_FLASH_ATTR ///////
at_recvTask(os_event_t *events)
{
  
  uint8_t temp;

  while(READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
  {
    
    temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;     
      
    if (ser_count>64) ser_count = 0;
    ser[ser_count] = temp;
    ser_count++;
    ser[64] = ser_count;   
    feedwdt();
  }
  
  if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
  {
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
  }
  else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
  {
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
  }
  ETS_UART_INTR_ENABLE();
}
Exemplo n.º 6
0
static  __attribute__ ((section(".iram0.text"))) void uart0_rx_intr_handler(void *para)
{
    /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
     * uart1 and uart0 respectively
     */
    //RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
    char RcvChar;

    if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST)) {
        return;
    }

    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);

    while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
	    RcvChar = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
	    /* you can add your handle code below.*/
	    system_os_post(1, 0, RcvChar);

	    if (RcvChar == 114)
	    {
	    	ets_uart_printf("RcvChar \r\n");
	    }
    }

}
Exemplo n.º 7
0
/*
 * UART rx Interrupt routine
 */
static void uart_isr(void *arg)
{
	uint8_t temp;
	signed portBASE_TYPE ret;
	portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
	if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
	{
		return;
	}
	WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);

    while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
		temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
		ret = xQueueSendToBackFromISR
                    (
                        uart_rx_queue,
						&temp,
                        &xHigherPriorityTaskWoken
                    );
		if (ret != pdTRUE)
		{
			uart_rx_overruns++;
		} 
		else
		{
			uart_rx_bytes++;
		}
	}
	portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
Exemplo n.º 8
0
IRAM NOINSTR static void esp_handle_uart_int(struct mgos_uart_state *us) {
  if (us == NULL) return;
  const int uart_no = us->uart_no;
  /* Since both UARTs use the same int, we need to apply the mask manually. */
  const unsigned int int_st = READ_PERI_REG(UART_INT_ST(uart_no)) &
                              READ_PERI_REG(UART_INT_ENA(uart_no));
  const struct mgos_uart_config *cfg = &us->cfg;
  if (int_st == 0) return;
  us->stats.ints++;
  if (int_st & UART_RXFIFO_OVF_INT_ST) us->stats.rx_overflows++;
  if (int_st & UART_CTS_CHG_INT_ST) {
    if (esp_uart_cts(uart_no) != 0 && esp_uart_tx_fifo_len(uart_no) > 0) {
      us->stats.tx_throttles++;
    }
  }
  if (int_st & (UART_RX_INTS | UART_TX_INTS)) {
    int int_ena = UART_INFO_INTS;
    if (int_st & UART_RX_INTS) us->stats.rx_ints++;
    if (int_st & UART_TX_INTS) us->stats.tx_ints++;
    if (adj_rx_fifo_full_thresh(us)) {
      int_ena |= UART_RXFIFO_FULL_INT_ENA;
    } else if (cfg->rx_fc_type == MGOS_UART_FC_SW) {
      /* Send XOFF and keep RX ints disabled */
      while (esp_uart_tx_fifo_len(uart_no) >= 127) {
      }
      esp_uart_tx_byte(uart_no, MGOS_UART_XOFF_CHAR);
      us->xoff_sent = true;
    }
    WRITE_PERI_REG(UART_INT_ENA(uart_no), int_ena);
    mgos_uart_schedule_dispatcher(uart_no, true /* from_isr */);
  }
  WRITE_PERI_REG(UART_INT_CLR(uart_no), int_st);
}
Exemplo n.º 9
0
void HardwareSerial::uart0_rx_intr_handler(void *para)
{
    /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
     * uart1 and uart0 respectively
     */
    RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
    uint8 RcvChar;

    if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART_ID_0)) & UART_RXFIFO_FULL_INT_ST))
        return;

    WRITE_PERI_REG(UART_INT_CLR(UART_ID_0), UART_RXFIFO_FULL_INT_CLR);

    while (READ_PERI_REG(UART_STATUS(UART_ID_0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
    {
        RcvChar = READ_PERI_REG(UART_FIFO(UART_ID_0)) & 0xFF;

        /* you can add your handle code below.*/
      if (memberData[UART_ID_0].useRxBuff)
      {
        *(pRxBuff->pWritePos) = RcvChar;

        // insert here for get one command line from uart
        if (RcvChar == '\n' )
            pRxBuff->BuffState = WRITE_OVER;

        pRxBuff->pWritePos++;

        if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE))
        {
            // overflow ...we may need more error handle here.
        	pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff;
        }

        if (pRxBuff->pWritePos == pRxBuff->pReadPos)
        {   // Prevent readbuffer overflow
			if (pRxBuff->pReadPos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE))
			{
				pRxBuff->pReadPos = pRxBuff->pRcvMsgBuff ;
			} else {
				pRxBuff->pReadPos++;
			}
		}
      }
      if (memberData[UART_ID_0].HWSDelegate)
        {
        	unsigned short cc;
        	cc = (pRxBuff->pWritePos < pRxBuff->pReadPos) ? ((pRxBuff->pWritePos + RX_BUFF_SIZE) - pRxBuff->pReadPos)
        													: (pRxBuff->pWritePos - pRxBuff->pReadPos);
        	memberData[UART_ID_0].HWSDelegate(Serial, RcvChar, cc);
        }
    }

}
Exemplo n.º 10
0
void uart_isr(void *arg) {
  uint32_t int_st = READ_PERI_REG(UART_INT_ST(0));
  while (1) {
    uint32_t fifo_len = READ_PERI_REG(UART_STATUS(0)) & 0xff;
    if (fifo_len == 0) {
      break;
    }
    while (fifo_len-- > 0) {
      uint8_t byte = READ_PERI_REG(UART_FIFO(0)) & 0xff;
      uart_isr_receive(byte);
    }
  }
  WRITE_PERI_REG(UART_INT_CLR(0), int_st);
}
Exemplo n.º 11
0
void uart_isr(void *arg) {
  uint32_t int_st = READ_PERI_REG(UART_INT_ST(0));
  struct uart_buf *ub = (struct uart_buf *) arg;
  while (1) {
    uint32_t fifo_len = READ_PERI_REG(UART_STATUS(0)) & 0xff;
    if (fifo_len == 0) break;
    while (fifo_len-- > 0) {
      uint8_t byte = READ_PERI_REG(UART_FIFO(0)) & 0xff;
      *ub->pw++ = byte;
      ub->nr++;
      if (ub->pw >= ub->data + UART_BUF_SIZE) ub->pw = ub->data;
    }
  }
  WRITE_PERI_REG(UART_INT_CLR(0), int_st);
}
Exemplo n.º 12
0
void HardwareSerial::uartReceiveInterruptHandler(void *para)
{
    /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
     * uart1 and uart0 respectively
     */
    HardwareSerial* Self = hardwareSerialObjects[UART_ID_0];
    uint8 RcvChar;

    if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART_ID_0)) & UART_RXFIFO_FULL_INT_ST))
        return;

    WRITE_PERI_REG(UART_INT_CLR(UART_ID_0), UART_RXFIFO_FULL_INT_CLR);

    while (READ_PERI_REG(UART_STATUS(UART_ID_0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
    {
        RcvChar = READ_PERI_REG(UART_FIFO(UART_ID_0)) & 0xFF;

        /* you can add your handle code below.*/
        if (Self->useRxBuff)
        {
            Self->rxBuffer.Push(RcvChar);
        }

        if ((Self->HWSDelegate) || (Self->commandExecutor))
        {
            SerialDelegateMessage serialDelegateMessage;
            serialDelegateMessage.uart = Self->uart;
            serialDelegateMessage.rcvChar = RcvChar;
            serialDelegateMessage.charCount = Self->rxBuffer.Len();

            if (Self->HWSDelegate)
            {
//        	  system_os_post(USER_TASK_PRIO_0, SERIAL_SIGNAL_DELEGATE, serialQueueParameter);
                serialDelegateMessage.type = SERIAL_SIGNAL_DELEGATE;
                xQueueSendToBackFromISR ( serialDelegateQueue, &serialDelegateMessage, NULL);
            }
            if (Self->commandExecutor)
            {
//        	  system_os_post(USER_TASK_PRIO_0, SERIAL_SIGNAL_COMMAND, serialQueueParameter);
                serialDelegateMessage.type = SERIAL_SIGNAL_COMMAND;
                xQueueSendToBackFromISR ( serialDelegateQueue, &serialDelegateMessage, NULL);
            }
        }
    }
}
Exemplo n.º 13
0
IRAM NOINSTR static void esp_handle_uart_int(struct esp_uart_state *us) {
  const int uart_no = us->cfg->uart_no;
  /* Since both UARTs use the same int, we need to apply the mask manually. */
  const unsigned int int_st = READ_PERI_REG(UART_INT_ST(uart_no)) &
                              READ_PERI_REG(UART_INT_ENA(uart_no));
  if (int_st == 0) return;
  us->stats.ints++;
  if (int_st & UART_RXFIFO_OVF_INT_ST) us->stats.rx_overflows++;
  if (int_st & UART_CTS_CHG_INT_ST) {
    if (cts(uart_no) != 0 && tx_fifo_len(uart_no) > 0) us->stats.tx_throttles++;
  }
  if (int_st & (UART_RX_INTS | UART_TX_INTS)) {
    if (int_st & UART_RX_INTS) us->stats.rx_ints++;
    if (int_st & UART_TX_INTS) us->stats.tx_ints++;
    /* Wake up the processor and disable TX and RX ints until it runs. */
    WRITE_PERI_REG(UART_INT_ENA(uart_no), UART_INFO_INTS);
    us->cfg->dispatch_cb(uart_no);
  }
  WRITE_PERI_REG(UART_INT_CLR(uart_no), int_st);
}
Exemplo n.º 14
0
/**
  * @brief  Uart receive task.
  * @param  events: contain the uart receive data
  * @retval None
  */
static void ICACHE_FLASH_ATTR ///////
at_recvTask(os_event_t *events)
{
  static uint8_t atHead[2];
  static uint8_t *pCmdLine;
  uint8_t temp;

//  temp = events->par;
//  temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
//  temp = 'X';
  //add transparent determine
  while(READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
  {
//    temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
    WRITE_PERI_REG(0X60000914, 0x73); //WTD

    temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
     
    /*
    if(at_state != at_statIpTraning)
    {
      temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
      if((temp != '\n') && (echoFlag))
      {
        uart_tx_one_char(temp); //display back
      }
    }
     * */
    if((at_state != at_statIpTraning) && (temp != '\n') && (echoFlag))
    {

      uart_tx_one_char(UART0,temp); //display back
     // uart_tx_one_char(temp); //display back

    }
            
    
    switch(at_state)
    {
    case at_statIdle: //serch "AT" head
      atHead[0] = atHead[1];
      atHead[1] = temp;
      if((os_memcmp(atHead, "AT", 2) == 0) || (os_memcmp(atHead, "at", 2) == 0))
      {
        at_state = at_statRecving;
        pCmdLine = at_cmdLine;
        atHead[1] = 0x00;
      }
      else if(temp == '\n') //only get enter
      {
        uart0_sendStr("\r\nError\r\n");
      }
      break;

    case at_statRecving: //push receive data to cmd line
      *pCmdLine = temp;
      if(temp == '\n')
      {
        system_os_post(at_procTaskPrio, 0, 0);
        at_state = at_statProcess;
        if(echoFlag)
        {
          uart0_sendStr("\r\n"); ///////////
        }
      }
      else if(pCmdLine >= &at_cmdLine[at_cmdLenMax - 1])
      {
        at_state = at_statIdle;
      }
      pCmdLine++;
      break;

    case at_statProcess: //process data
      if(temp == '\n')
      {
//      system_os_post(at_busyTaskPrio, 0, 1);
        uart0_sendStr("\r\nbusy p...\r\n");
      }
      break;

    case at_statIpSending:
      *pDataLine = temp;
      if((pDataLine >= &at_dataLine[at_sendLen - 1]) || (pDataLine >= &at_dataLine[at_dataLenMax - 1]))
      {
        system_os_post(at_procTaskPrio, 0, 0);
        at_state = at_statIpSended;
      }
      pDataLine++;
//    *pDataLine = temp;
//    if (pDataLine == &UartDev.rcv_buff.pRcvMsgBuff[at_sendLen-1])
//    {
//      system_os_post(at_procTaskPrio, 0, 0);
//      at_state = at_statIpSended;
//    }
//    pDataLine++;
      break;

    case at_statIpSended: //send data
      if(temp == '\n')
      {
//      system_os_post(at_busyTaskPrio, 0, 2);
        uart0_sendStr("busy s...\r\n");
      }
      break;

    case at_statIpTraning:
      os_timer_disarm(&at_delayChack);
//      *pDataLine = temp;
      if(pDataLine > &at_dataLine[at_dataLenMax - 1])
      {
        os_printf("exceed\r\n");
        return;
      }
      else if(pDataLine == &at_dataLine[at_dataLenMax - 1])
      {
        temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
        *pDataLine = temp;
        pDataLine++;
        at_tranLen++;
        os_timer_arm(&at_delayChack, 1, 0);
        return;
      }
      else
      {
        temp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
        *pDataLine = temp;
        pDataLine++;
        at_tranLen++;
//        if(ipDataSendFlag == 0)
//        {
//          os_timer_arm(&at_delayChack, 20, 0);
//        }
        os_timer_arm(&at_delayChack, 20, 0);
      }
      break;

//      os_timer_disarm(&at_delayChack);
//      *pDataLine = temp;
//      if(pDataLine >= &at_dataLine[at_dataLenMax - 1])
//      {
////        ETS_UART_INTR_DISABLE();
////      pDataLine++;
//        at_tranLen++;
////      os_timer_arm(&at_delayChack, 1, 0); /////
//        system_os_post(at_procTaskPrio, 0, 0);
//        break;
//      }
//      pDataLine++;
//      at_tranLen++;
//      if(ipDataSendFlag == 0)
//      {
//        os_timer_arm(&at_delayChack, 20, 0);
//      }
//      break;

    default:
      if(temp == '\n')
      {
      }
      break;
    } 
  }
  if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST))
  {
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
  }
  else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_TOUT_INT_ST))
  {
    WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);
  }
  ETS_UART_INTR_ENABLE();
}