static void ssauart_set_mctrl (struct uart_port *port, u_int mctrl)
{
#if 0
unsigned int mcr = 0;
if (mctrl & TIOCM_DTR) mcr |= (MCR_DTR);
if (mctrl & TIOCM_RTS) mcr |= (MCR_RTS);
UART_PUT_MCR(port, mcr); /* DTR and RTS set as required, all other bits cleared */
#endif
}
static void uart00_break_ctl(struct uart_port *port, int break_state)
{
unsigned int mcr;
mcr = UART_GET_MCR(port);
if (break_state == -1)
mcr |= UART_MCR_BR_MSK;
else
mcr &= ~UART_MCR_BR_MSK;
UART_PUT_MCR(port, mcr);
}
static void uart00_set_mctrl(struct uart_port *port, u_int mctrl)
{
unsigned char mcr = 0;
if (mctrl & TIOCM_RTS)
mcr |= UART_MCR_RTS_MSK;
if (mctrl & TIOCM_DTR)
mcr |= UART_MCR_DTR_MSK;
if (mctrl & TIOCM_LOOP)
mcr |= UART_MCR_LB_MSK;
UART_PUT_MCR(port, mcr);
}
static void uart00_break_ctl(struct uart_port *port, int break_state)
{
unsigned long flags;
unsigned int mcr;
spin_lock_irqsave(&port->lock, flags);
mcr = UART_GET_MCR(port);
if (break_state == -1)
mcr |= UART_MCR_BR_MSK;
else
mcr &= ~UART_MCR_BR_MSK;
UART_PUT_MCR(port, mcr);
spin_unlock_irqrestore(&port->lock, flags);
}
static void uart00_shutdown(struct uart_port *port)
{
/*
* disable all interrupts, disable the port
*/
UART_PUT_IEC(port, 0xff);
/* disable break condition and fifos */
UART_PUT_MCR(port, UART_GET_MCR(port) &~UART_MCR_BR_MSK);
/*
* Free the interrupt
*/
free_irq(port->irq, port);
}
static void ks8695uart_set_mctrl(struct uart_port *port, u_int mctrl)
{
unsigned int mcr;
mcr = UART_GET_MCR(port);
if (mctrl & TIOCM_RTS)
mcr |= URMC_URRTS;
else
mcr &= ~URMC_URRTS;
if (mctrl & TIOCM_DTR)
mcr |= URMC_URDTR;
else
mcr &= ~URMC_URDTR;
UART_PUT_MCR(port, mcr);
}
static void ambauart_set_mctrl(struct uart_port *port, u_int mctrl)
{
unsigned int mcr;
mcr = UART_GET_MCR(port);
if (mctrl & TIOCM_RTS)
mcr |= KS8695_UART_MODEMC_RTS;
else
mcr &= ~KS8695_UART_MODEMC_RTS;
if (mctrl & TIOCM_DTR)
mcr |= KS8695_UART_MODEMC_DTR;
else
mcr &= ~KS8695_UART_MODEMC_DTR;
UART_PUT_MCR(port, mcr);
}
static int bfin_serial_startup(struct uart_port *port)
{
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
#ifdef CONFIG_SERIAL_BFIN_DMA
dma_addr_t dma_handle;
if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
return -EBUSY;
}
if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
free_dma(uart->rx_dma_channel);
return -EBUSY;
}
set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
uart->rx_dma_buf.head = 0;
uart->rx_dma_buf.tail = 0;
uart->rx_dma_nrows = 0;
set_dma_config(uart->rx_dma_channel,
set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
INTR_ON_ROW, DIMENSION_2D,
DATA_SIZE_8,
DMA_SYNC_RESTART));
set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
set_dma_x_modify(uart->rx_dma_channel, 1);
set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
set_dma_y_modify(uart->rx_dma_channel, 1);
set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
enable_dma(uart->rx_dma_channel);
uart->rx_dma_timer.data = (unsigned long)(uart);
uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
add_timer(&(uart->rx_dma_timer));
#else
# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
kgdboc_break_enabled = 0;
else {
# endif
if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
"BFIN_UART_RX", uart)) {
printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
return -EBUSY;
}
if (request_irq
(uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
"BFIN_UART_TX", uart)) {
printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
free_irq(uart->port.irq, uart);
return -EBUSY;
}
# ifdef CONFIG_BF54x
{
/*
* UART2 and UART3 on BF548 share interrupt PINs and DMA
* controllers with SPORT2 and SPORT3. UART rx and tx
* interrupts are generated in PIO mode only when configure
* their peripheral mapping registers properly, which means
* request corresponding DMA channels in PIO mode as well.
*/
unsigned uart_dma_ch_rx, uart_dma_ch_tx;
switch (uart->port.irq) {
case IRQ_UART3_RX:
uart_dma_ch_rx = CH_UART3_RX;
uart_dma_ch_tx = CH_UART3_TX;
break;
case IRQ_UART2_RX:
uart_dma_ch_rx = CH_UART2_RX;
uart_dma_ch_tx = CH_UART2_TX;
break;
default:
uart_dma_ch_rx = uart_dma_ch_tx = 0;
break;
};
if (uart_dma_ch_rx &&
request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
printk(KERN_NOTICE"Fail to attach UART interrupt\n");
free_irq(uart->port.irq, uart);
free_irq(uart->port.irq + 1, uart);
return -EBUSY;
}
if (uart_dma_ch_tx &&
request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
printk(KERN_NOTICE "Fail to attach UART interrupt\n");
free_dma(uart_dma_ch_rx);
free_irq(uart->port.irq, uart);
free_irq(uart->port.irq + 1, uart);
return -EBUSY;
}
}
# endif
# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
}
# endif
#endif
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
if (uart->cts_pin >= 0) {
if (request_irq(gpio_to_irq(uart->cts_pin),
bfin_serial_mctrl_cts_int,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
uart->cts_pin = -1;
pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
}
}
if (uart->rts_pin >= 0) {
gpio_direction_output(uart->rts_pin, 0);
}
#endif
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
if (uart->cts_pin >= 0 && request_irq(uart->status_irq,
bfin_serial_mctrl_cts_int,
IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
uart->cts_pin = -1;
pr_info("Unable to attach BlackFin UART Modem Status interrupt.\n");
}
/* CTS RTS PINs are negative assertive. */
UART_PUT_MCR(uart, ACTS);
UART_SET_IER(uart, EDSSI);
#endif
UART_SET_IER(uart, ERBFI);
return 0;
}
