void usart_set_baudrate(u32 usart, u32 baud)
{
u32 clock = rcc_ppre1_frequency;
//#ifdef STM32F1
if (usart == USART1) {
clock = rcc_ppre2_frequency;
}
/* This has to be added for F2 when it get's support for USART6 */
/*
#else
if ((usart == USART1) ||
(usart == USART6)) {
clock = rcc_ppre2_frequency;
}
#endif
*/
/*
* Yes it is as simple as that. The reference manual is
* talking about fractional calculation but it seems to be only
* marketting babble to sound awesome. It is nothing else but a
* simple divider to generate the correct baudrate.
*
* Note: We round() the value rather than floor()ing it, for more
* accurate divisor selection.
*/
USART_BRR(usart) = ((2 * clock) + baud) / (2 * baud);
}
OPTL_NOINLINE
void init()
{
clk::enable();
rxpin::clock::enable();
txpin::clock::enable();
rxpin::init_alternate(afnum::af);
txpin::init_alternate(afnum::af);
rxpin::driver_pushpull();
txpin::driver_pushpull();
USART_BRR(base) = ((2 * cpuclock) + baudrate) / (2 * baudrate);
USART_CR1(base) &= ~USART_CR1_M; /* 8 data bits */
USART_CR1(base) = (USART_CR1(base) & ~USART_PARITY_MASK) |
USART_PARITY_NONE;
USART_CR2(base) = (USART_CR2(base) & ~USART_CR2_STOPBITS_MASK) |
USART_STOPBITS_1;
USART_CR3(base) = (USART_CR3(base) & ~USART_FLOWCONTROL_MASK) |
USART_FLOWCONTROL_NONE;
USART_CR1(base) = (USART_CR1(base) & ~USART_MODE_MASK) |
USART_MODE_TX_RX;
}
void usart_set_baudrate(uint32_t usart, uint32_t baud)
{
uint32_t clock = rcc_apb1_frequency;
#if defined STM32F2 || defined STM32F4
if ((usart == USART1) ||
(usart == USART6)) {
clock = rcc_apb2_frequency;
}
#else
if (usart == USART1) {
clock = rcc_apb2_frequency;
}
#endif
/*
* Yes it is as simple as that. The reference manual is
* talking about fractional calculation but it seems to be only
* marketing babble to sound awesome. It is nothing else but a
* simple divider to generate the correct baudrate.
*
* Note: We round() the value rather than floor()ing it, for more
* accurate divisor selection.
*/
USART_BRR(usart) = ((2 * clock) + baud) / (2 * baud);
}
void OW_UART_set9600()
{
IO_ALT_OPEN_DRAIN(OW);
IO_HIGH(OW);
OW_USART->BRR = USART_BRR(9600);
OW_USART->CR1 = USART_CR1_UE | USART_CR1_TE | USART_CR1_RE;
OW_USART->CR3 = USART_CR3_HDSEL;
uint8_t v = USART2->DR;
}
void usart_set_baudrate(uint32_t usart, uint32_t baud)
{
uint32_t clock = rcc_apb1_frequency;
if (usart == USART1) {
clock = rcc_apb1_frequency;
/* TODO selective PCLK, SYSCLK, HSI or LSE */
}
/* TODO check oversampling 16 */
USART_BRR(usart) = ((2 * clock) + baud) / (2 * baud);
}
static void usart_setup(void)
{
/* Setup GPIO pin GPIO_USART1_TX/GPIO9 on GPIO port A for transmit. */
gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX);
/* Setup UART parameters. */
// usart_set_baudrate(USART1, 38400);
/* TODO usart_set_baudrate() doesn't support 24MHz clock (yet). */
/* This is the equivalent: */
USART_BRR(USART1) = (u16)((24000000 << 4) / (38400 * 16));
usart_set_databits(USART1, 8);
usart_set_stopbits(USART1, USART_STOPBITS_1);
usart_set_mode(USART1, USART_MODE_TX);
usart_set_parity(USART1, USART_PARITY_NONE);
usart_set_flow_control(USART1, USART_FLOWCONTROL_NONE);
/* Finally enable the USART. */
usart_enable(USART1);
}
static void usart1_init(void)
{
/** USART1:
TX = PA9, RX = PA10
**/
/* Clock: */
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
/* GPIO: */
// TX = PA9 = AltFunc push/pull =
// mode = 11, CNF = 10.
GPIOA->CRH &= ~(GPIO_CRH_MODE9
| GPIO_CRH_CNF9);
GPIOA->CRH |= GPIO_CRH_MODE9_1
| GPIO_CRH_MODE9_0
| GPIO_CRH_CNF9_1;
// RX = PA10 = Floating input.
// mode = 00, CNF = 01
GPIOA->CRH &= ~(GPIO_CRH_MODE10
| GPIO_CRH_CNF10);
GPIOA->CRH |= GPIO_CRH_CNF10_0;
/* USART */
/* Transmit
* 1. Enable the USART by writing
* the UE bit in USART_CR1 register to 1.
* 2. Program the M bit in USART_CR1 to
* define the word length.
* 3. Program the number of stop bits
* in USART_CR2.
* 4. Select DMA enable (DMAT) in USART_CR3
* if Multi buffer Communication is
* to take place. Configure the DMA
* register as explained in multibuffer
* communication.
* 5. Select the desired baud rate using
* the USART_BRR register.
* 6. Set the TE bit in USART_CR1 to send
* an idle frame as first transmission.
* 7. Write the data to send in the USART_DR
* register (this clears the TXE bit).
* Repeat this for each data to be
* transmitted in case of single buffer.
* 8. After writing the last data into the
* USART_DR register, wait until TC=1.
* This indicates that the transmission
* of the last frame is complete. This
* is required for instance when the
* USART is disabled or enters the Halt
* mode to avoid corrupting the last
* transmission.
*/
/* Recieve
* 6. Set the RE bit USART_CR1. This enables
* the receiver which begins searching for a
* start bit.
*/
USART_InitTypeDef USART_param;
USART_param.USART_BaudRate = 115200; // 115200
USART_param.USART_WordLength = USART_WordLength_8b;
USART_param.USART_StopBits = USART_StopBits_1;
USART_param.USART_Parity = USART_Parity_No ;
USART_param.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_param.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART1, &USART_param);
USART_Cmd(USART1, ENABLE);
#if 0
// Enable USART
USART1->CR1 |= USART_CR1_UE;
// 8bit word len
USART1->CR1 &= ~USART_CR1_M;
// 1 stop bit = 0b00
USART1->CR2 &= ~USART_CR2_STOP;
// parity = no
USART1->CR1 &= ~USART_CR1_PCE;
// flow ctrl = none
USART1->CR3 &= ~(USART_CR3_CTSE
| USART_CR3_RTSE);
// Other things that need to be disabled.
USART1->CR2 &= ~(USART_CR2_LINEN
| USART_CR2_CLKEN);
// FIXME: Multitude of modes and interupts
// Baud rate, DIV = fclk / (16*baud)
// fclk = ABP2 clk = HCLK = 72Mhz =
// 115200 xx xx xx
USART1->BRR = USART_BRR(72000000,115200);
// enable transmiter. // not yet reciever.
USART1->CR1 |= USART_CR1_TE; // | USART_CR1_RE;
#endif
}
void main()
{
SCB->VTOR = 0x08000000;
// set clock source as HSI / 2 * (PLL) 4
RCC->CFGR |= RCC_CFGR_PLLMULL8 | RCC_CFGR_PLLXTPRE_HSE_Div2 /*| RCC_CFGR_PLLSRC*/;
RCC->CR |= RCC_CR_PLLON;
while (!(RCC->CR & RCC_CR_PLLRDY));
RCC->CFGR |= RCC_CFGR_SW_PLL;
while (!(RCC->CFGR & RCC_CFGR_SWS_PLL));
// enable peripherals
RCC->APB1ENR = RCC_APB1ENR_TIM2EN;
RCC->APB2ENR = RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_ADC1EN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_AFIOEN;
AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
// configure USART
IO_ALT_PUSH_PULL(UART_TX);
USART1->BRR = USART_BRR(230400);
USART1->CR1 = USART_CR1_UE | USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
ENABLE_INTERRUPT(USART1_IRQn);
// enable systick
SysTick->LOAD = SysTick->VAL = (F_CPU / 1000) / 8;
SysTick->CTRL = /*SysTick_CTRL_CLKSOURCE |*/ SysTick_CTRL_ENABLE | SysTick_CTRL_TICKINT;
_delay_init();
IO_PUSH_PULL(LED);
IO_HIGH(LED);
#ifndef ETHERNET_MODULE
OW_UART_init();
tempInit();
ioInit();
irInit();
#endif
#ifdef ETHERNET
ethInit();
#endif
uint8_t b;
uint32_t lastCheck = 0;
for (;;)
{
// if (IO_IS_LOW(IN1)) dodump = 1;
// else dodump = 0;
// dodump=1;
#ifndef ETHERNET_MODULE
ioProcess();
tempProcess();
irProcess();
#endif
provTmr();
#ifdef ETHERNET
ethProcess();
#endif
}
}
