int fmuk66_sdhc_initialize(void)
{
int ret;
struct fmuk66_sdhc_state_s *sdhc = &g_sdhc;
/* Configure GPIO pins */
VDD_3V3_SD_CARD_EN(true);
kinetis_pinconfig(GPIO_SD_CARDDETECT);
/* Attached the card detect interrupt (but don't enable it yet) */
kinetis_pinirqattach(GPIO_SD_CARDDETECT, fmuk66_cdinterrupt, sdhc);
/* Configure the write protect GPIO -- None */
/* Mount the SDHC-based MMC/SD block driver */
/* First, get an instance of the SDHC interface */
mcinfo("Initializing SDHC slot %d\n", CONFIG_NSH_MMCSDSLOTNO);
sdhc->sdhc = sdhc_initialize(CONFIG_NSH_MMCSDSLOTNO);
if (!sdhc->sdhc) {
mcerr("ERROR: Failed to initialize SDHC slot %d\n", CONFIG_NSH_MMCSDSLOTNO);
return -ENODEV;
}
// Testing done on SanDISK HC all failed sd_bench with Drive/Slew other than default and _PIN_OUTPUT_FAST|_PIN_OUTPUT_HIGHDRIVE
// _PIN_OUTPUT_FAST|_PIN_OUTPUT_HIGHDRIVE Square noisy, pass SanDISK HC
// _PIN_OUTPUT_FAST|_PIN_OUTPUT_LOWDRIVE Square noisy, pass SanDISK HC
// _PIN_OUTPUT_HIGHDRIVE|_PIN_OUTPUT_SLOW sinusoidal fail SanDISK HC pass SanDISK HC1
// _PIN_OUTPUT_LOWDRIVE|_PIN_OUTPUT_SLOW sinusoidal fail SanDISK HC pass SanDISK HC1
// _PIN_OUTPUT_SLOW sinusoidal fail SanDISK HC pass SanDISK HC1
// This up dating of the driver setting is for EMI issue with GPS and FCC
// With this setting the clock is sinusoidal N.B. sd_bench fails on SanDISK HC, but
// Passes SanDISK **HC1** - use HC1 or Kingston cards!
kinetis_pinconfig(PIN_SDHC0_DCLK | _PIN_OUTPUT_HIGHDRIVE | _PIN_OUTPUT_SLOW);
/* Now bind the SDHC interface to the MMC/SD driver */
mcinfo("Bind SDHC to the MMC/SD driver, minor=%d\n", CONFIG_NSH_MMCSDMINOR);
ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdhc->sdhc);
if (ret != OK) {
syslog(LOG_ERR, "ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret);
return ret;
}
syslog(LOG_ERR, "Successfully bound SDHC to the MMC/SD driver\n");
/* Handle the initial card state */
fmuk66_mediachange(sdhc);
/* Enable CD interrupts to handle subsequent media changes */
kinetis_pinirqenable(GPIO_SD_CARDDETECT);
return OK;
}
__EXPORT int board_app_initialize(uintptr_t arg)
{
/* Power on Interfaces */
VDD_3V3_SD_CARD_EN(true);
VDD_5V_PERIPH_EN(true);
VDD_5V_HIPOWER_EN(true);
VDD_3V3_SENSORS_EN(true);
VDD_3V3_SPEKTRUM_POWER_EN(true);
VDD_5V_RC_EN(true);
VDD_5V_WIFI_EN(true);
#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
/* run C++ ctors before we go any further */
up_cxxinitialize();
# if defined(CONFIG_EXAMPLES_NSH_CXXINITIALIZE)
# error CONFIG_EXAMPLES_NSH_CXXINITIALIZE Must not be defined! Use CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE.
# endif
#else
# error platform is dependent on c++ both CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE must be defined.
#endif
/* configure the high-resolution time/callout interface */
hrt_init();
if (OK == board_determine_hw_info()) {
PX4_INFO("Rev 0x%1x : Ver 0x%1x %s", board_get_hw_revision(), board_get_hw_version(), board_get_hw_type_name());
} else {
PX4_ERR("Failed to read HW revision and version");
}
param_init();
/* configure the DMA allocator */
if (board_dma_alloc_init() < 0) {
PX4_ERR("DMA alloc FAILED");
}
/* configure CPU load estimation */
#ifdef CONFIG_SCHED_INSTRUMENTATION
cpuload_initialize_once();
#endif
/* set up the serial DMA polling */
static struct hrt_call serial_dma_call;
struct timespec ts;
/*
* Poll at 1ms intervals for received bytes that have not triggered
* a DMA event.
*/
ts.tv_sec = 0;
ts.tv_nsec = 1000000;
hrt_call_every(&serial_dma_call,
ts_to_abstime(&ts),
ts_to_abstime(&ts),
(hrt_callout)stm32_serial_dma_poll,
NULL);
#if defined(CONFIG_STM32F7_BBSRAM)
/* NB. the use of the console requires the hrt running
* to poll the DMA
*/
/* Using Battery Backed Up SRAM */
int filesizes[CONFIG_STM32F7_BBSRAM_FILES + 1] = BSRAM_FILE_SIZES;
stm32_bbsraminitialize(BBSRAM_PATH, filesizes);
#if defined(CONFIG_STM32F7_SAVE_CRASHDUMP)
/* Panic Logging in Battery Backed Up Files */
/*
* In an ideal world, if a fault happens in flight the
* system save it to BBSRAM will then reboot. Upon
* rebooting, the system will log the fault to disk, recover
* the flight state and continue to fly. But if there is
* a fault on the bench or in the air that prohibit the recovery
* or committing the log to disk, the things are too broken to
* fly. So the question is:
*
* Did we have a hard fault and not make it far enough
* through the boot sequence to commit the fault data to
* the SD card?
*/
/* Do we have an uncommitted hard fault in BBSRAM?
* - this will be reset after a successful commit to SD
*/
int hadCrash = hardfault_check_status("boot");
if (hadCrash == OK) {
PX4_ERR("[boot] There is a hard fault logged. Hold down the SPACE BAR," \
" while booting to halt the system!\n");
/* Yes. So add one to the boot count - this will be reset after a successful
* commit to SD
*/
int reboots = hardfault_increment_reboot("boot", false);
/* Also end the misery for a user that holds for a key down on the console */
int bytesWaiting;
ioctl(fileno(stdin), FIONREAD, (unsigned long)((uintptr_t) &bytesWaiting));
if (reboots > 2 || bytesWaiting != 0) {
/* Since we can not commit the fault dump to disk. Display it
* to the console.
*/
hardfault_write("boot", fileno(stdout), HARDFAULT_DISPLAY_FORMAT, false);
PX4_ERR("[boot] There were %d reboots with Hard fault that were not committed to disk - System halted %s\n",
reboots,
(bytesWaiting == 0 ? "" : " Due to Key Press\n"));
/* For those of you with a debugger set a break point on up_assert and
* then set dbgContinue = 1 and go.
*/
/* Clear any key press that got us here */
static volatile bool dbgContinue = false;
int c = '>';
while (!dbgContinue) {
switch (c) {
case EOF:
case '\n':
case '\r':
case ' ':
continue;
default:
putchar(c);
putchar('\n');
switch (c) {
case 'D':
case 'd':
hardfault_write("boot", fileno(stdout), HARDFAULT_DISPLAY_FORMAT, false);
break;
case 'C':
case 'c':
hardfault_rearm("boot");
hardfault_increment_reboot("boot", true);
break;
case 'B':
case 'b':
dbgContinue = true;
break;
default:
break;
} // Inner Switch
PX4_ERR("\nEnter B - Continue booting\n" \
"Enter C - Clear the fault log\n" \
"Enter D - Dump fault log\n\n?>");
fflush(stdout);
if (!dbgContinue) {
c = getchar();
}
break;
} // outer switch
} // for
} // inner if
} // outer if
#endif // CONFIG_STM32F7_SAVE_CRASHDUMP
#endif // CONFIG_STM32F7_BBSRAM
/* initial LED state */
drv_led_start();
led_off(LED_RED);
led_off(LED_GREEN);
led_off(LED_BLUE);
#ifdef CONFIG_SPI
int ret = stm32_spi_bus_initialize();
if (ret != OK) {
board_autoled_on(LED_RED);
return ret;
}
#endif
#ifdef CONFIG_MMCSD
ret = stm32_sdio_initialize();
if (ret != OK) {
board_autoled_on(LED_RED);
return ret;
}
#endif
return OK;
}
