Exemplo n.º 1
0
Arquivo: mac.c Projeto: Abioy/kasan
/*
 * Description:
 *      Restore MAC registers from context buffer
 *
 * Parameters:
 *  In:
 *      dwIoBase    - Base Address for MAC
 *      pbyCxtBuf   - Context buffer
 *  Out:
 *      none
 *
 * Return Value: none
 *
 */
void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
{
	int         ii;

	MACvSelectPage1(dwIoBase);
	// restore page1
	for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
		VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));

	MACvSelectPage0(dwIoBase);

	// restore RCR,TCR,IMR...
	for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
		VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));

	// restore MAC Config.
	for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
		VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));

	VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));

	// restore PS Config.
	for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
		VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));

	// restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
	VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
	VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
	VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));

	VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));

	VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
}
Exemplo n.º 2
0
VOID GMACvSetPacketFilter(DWORD dwIoBase, WORD wFilterType)
{
	BYTE    byOldRCR;
	BYTE    byNewRCR = 0;
	BYTE    byOrgCAMCR, byData;


	/* modify CAMCR to select MAR regs */
	VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byOrgCAMCR);
	byData = (BYTE)(byOrgCAMCR & ~(CAMCR_PS1|CAMCR_PS0));
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byData);

	/* if only in DIRECTED mode, multicast-address will set to zero, */
	/* but if other mode exist (e.g. PROMISCUOUS), multicast-address */
	/* will be open */
	if (BITbIsBitOn(wFilterType, PKT_TYPE_DIRECTED)) {
		/* set multicast address to accept none */
		VNSvOutPortD(dwIoBase + MAC_REG_MAR, 0L);
		/* PCAvDelayByIO(1); */
		VNSvOutPortD(dwIoBase + MAC_REG_MAR + sizeof(DWORD), 0L);
		/* PCAvDelayByIO(1); */
	}

	if (BITbIsAnyBitsOn(wFilterType, PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) {
		/* set multicast address to accept all */
		VNSvOutPortD(dwIoBase + MAC_REG_MAR, 0xFFFFFFFFL);
		/* PCAvDelayByIO(1); */
		VNSvOutPortD(dwIoBase + MAC_REG_MAR + sizeof(DWORD), 0xFFFFFFFFL);
		/* PCAvDelayByIO(1); */
	}

	/* restore to original CAMCR */
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byOrgCAMCR);


	if (BITbIsBitOn(wFilterType, PKT_TYPE_PROMISCUOUS))
		byNewRCR |= (RCR_PROM | RCR_AM | RCR_AB);

	if (BITbIsAnyBitsOn(wFilterType, PKT_TYPE_MULTICAST | PKT_TYPE_ALL_MULTICAST))
		byNewRCR |= RCR_AM;

	if (BITbIsBitOn(wFilterType, PKT_TYPE_BROADCAST))
		byNewRCR |= RCR_AB;

	if (BITbIsBitOn(wFilterType, PKT_TYPE_RUNT))
		byNewRCR |= RCR_AR;

	if (BITbIsBitOn(wFilterType, PKT_TYPE_ERROR))
		byNewRCR |= RCR_SEP;

	VNSvInPortB(dwIoBase + MAC_REG_RCR,  &byOldRCR);
	if (byNewRCR != (byOldRCR & 0x1F)) {
		/* Modify the Receive Command Register */
		byNewRCR |= (BYTE)(byOldRCR & 0xE0);
		VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR);
	}
}
Exemplo n.º 3
0
void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl,
		     unsigned int uEntryIdx, unsigned int uKeyIdx,
		     unsigned char *pbyAddr, u32 *pdwKey,
		     unsigned char byLocalID)
{
	unsigned short wOffset;
	u32 dwData;
	int     ii;

	if (byLocalID <= 1)
		return;

	pr_debug("MACvSetKeyEntry\n");
	wOffset = MISCFIFO_KEYETRY0;
	wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);

	dwData = 0;
	dwData |= wKeyCtl;
	dwData <<= 16;
	dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
	pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
		 wOffset, dwData, wKeyCtl);

	VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
	VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
	VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
	wOffset++;

	dwData = 0;
	dwData |= *(pbyAddr+3);
	dwData <<= 8;
	dwData |= *(pbyAddr+2);
	dwData <<= 8;
	dwData |= *(pbyAddr+1);
	dwData <<= 8;
	dwData |= *(pbyAddr+0);
	pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);

	VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
	VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
	VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
	wOffset++;

	wOffset += (uKeyIdx * 4);
	for (ii = 0; ii < 4; ii++) {
		/* always push 128 bits */
		pr_debug("3.(%d) wOffset: %d, Data: %X\n",
			 ii, wOffset+ii, *pdwKey);
		VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
		VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
		VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
	}
}
Exemplo n.º 4
0
Arquivo: mac.c Projeto: Abioy/kasan
/*
 * Description:
 *      Turn Off MAC Tx
 *
 * Parameters:
 *  In:
 *      dwIoBase    - Base Address for MAC
 *  Out:
 *      none
 *
 * Return Value: true if success; otherwise false
 *
 */
bool MACbSafeTxOff(void __iomem *dwIoBase)
{
	unsigned short ww;
	unsigned long dwData;
	unsigned char byData;

	// Clear TX DMA
	//Tx0
	VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
	//AC0
	VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);

	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
		if (!(dwData & DMACTL_RUN))
			break;
	}
	if (ww == W_MAX_TIMEOUT) {
		DBG_PORT80(0x20);
		pr_debug(" DBG_PORT80(0x20)\n");
		return false;
	}
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
		if (!(dwData & DMACTL_RUN))
			break;
	}
	if (ww == W_MAX_TIMEOUT) {
		DBG_PORT80(0x21);
		pr_debug(" DBG_PORT80(0x21)\n");
		return false;
	}

	// try to safe shutdown TX
	MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);

	// W_MAX_TIMEOUT is the timeout period
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
		if (!(byData & HOSTCR_TXONST))
			break;
	}
	if (ww == W_MAX_TIMEOUT) {
		DBG_PORT80(0x24);
		pr_debug(" DBG_PORT80(0x24)\n");
		return false;
	}
	return true;
}
Exemplo n.º 5
0
VOID GMACvSetMCAM(DWORD dwIoBase, BYTE byAddress, PBYTE pbyData)
{
	BYTE    byOrgCAMCR, byData;
	/* DWORD   dwData; */

	/* modify CAMCR to select CAM DATA regs */
	VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byOrgCAMCR);
	byData = (BYTE)((byOrgCAMCR | CAMCR_PS1) & ~CAMCR_PS0);
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byData);

	/* enable/select MCAM */
	VNSvOutPortB(dwIoBase + MAC_REG_CAMADDR, (BYTE)(CAMADDR_CAMEN | byAddress));

	/* set MCAM Data */
	VNSvOutPortD(dwIoBase + MAC_REG_CAM, *(PDWORD)pbyData);
	/* VNSvInPortD(dwIoBase + MAC_REG_CAM, &dwData); */
	VNSvOutPortW(dwIoBase + MAC_REG_CAM + 4, *(PWORD)(pbyData + 4));
	/* VNSvInPortW(dwIoBase + MAC_REG_CAM + 4, (PWORD)(&dwData)); */

	/* issue write command */
	MACvRegBitsOn(dwIoBase, MAC_REG_CAMCR, CAMCR_CAMWR);

	/* Wait for CAMWR self clear */
	while (TRUE) {
		if (GMACbIsRegBitsOff(dwIoBase, MAC_REG_CAMCR, CAMCR_CAMWR))
			break;
	}

	/* disable CAMEN */
	VNSvOutPortB(dwIoBase + MAC_REG_CAMADDR, 0);

	/* restore to original CAMCR */
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byOrgCAMCR);
}
Exemplo n.º 6
0
Arquivo: mac.c Projeto: Abioy/kasan
/*
 * Description:
 *      Turn Off MAC Rx
 *
 * Parameters:
 *  In:
 *      dwIoBase    - Base Address for MAC
 *  Out:
 *      none
 *
 * Return Value: true if success; otherwise false
 *
 */
bool MACbSafeRxOff(void __iomem *dwIoBase)
{
	unsigned short ww;
	unsigned long dwData;
	unsigned char byData;

	// turn off wow temp for turn off Rx safely

	// Clear RX DMA0,1
	VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
	VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
		if (!(dwData & DMACTL_RUN))
			break;
	}
	if (ww == W_MAX_TIMEOUT) {
		DBG_PORT80(0x10);
		pr_debug(" DBG_PORT80(0x10)\n");
		return false;
	}
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
		if (!(dwData & DMACTL_RUN))
			break;
	}
	if (ww == W_MAX_TIMEOUT) {
		DBG_PORT80(0x11);
		pr_debug(" DBG_PORT80(0x11)\n");
		return false;
	}

	// try to safe shutdown RX
	MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
	// W_MAX_TIMEOUT is the timeout period
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
		if (!(byData & HOSTCR_RXONST))
			break;
	}
	if (ww == W_MAX_TIMEOUT) {
		DBG_PORT80(0x12);
		pr_debug(" DBG_PORT80(0x12)\n");
		return false;
	}
	return true;
}
Exemplo n.º 7
0
Arquivo: mac.c Projeto: Abioy/kasan
void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset, unsigned long dwData)
{
	if (wOffset > 273)
		return;
	VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
	VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
	VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
}
Exemplo n.º 8
0
VOID GMACvRestoreContext(DWORD dwIoBase, BYTE byRevId, PBYTE pbyCxtBuf)
{
	int         ii;

	/* restore RCR,TCR,CR,ISR,IMR... */
	for (ii = MAC_REG_PAR; ii < MAC_REG_DEC_BASE_HI; ii++) {
		if (ii >= MAC_REG_CR0_CLR && ii <= MAC_REG_CR3_CLR)
			continue;
		/* except CR0, because we don't want to start chip now */
		if (ii != MAC_REG_CR0_SET)
			VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
	}

	/* restore MAC_REG_DEC_BASE_HI... */
	for (ii = MAC_REG_DEC_BASE_HI; ii < MAC_REG_ISR_CTL; ii += 4) {
		VNSvOutPortD(dwIoBase + ii, *(PDWORD)(pbyCxtBuf + ii));
		/* PCAvDelayByIO(1); */
	}

	/* restore ISR_CTL,ISR,IMR,TDCSR,RDCSR.. */
	for (ii = MAC_REG_ISR_CTL; ii < MAC_REG_TDCSR_CLR; ii++)
		VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));

	/* restore MAC_REG_RDBASE_LO,MAC_REG_TDBASE_LO... */
	for (ii = MAC_REG_RDBASE_LO; ii < MAC_REG_FIFO_TEST0; ii += 4) {
		VNSvOutPortD(dwIoBase + ii, *(PDWORD)(pbyCxtBuf + ii));
		/* PCAvDelayByIO(1); */
	}

	/* restore MIICFG... */
	for (ii = MAC_REG_MIICFG; ii < MAC_REG_TBIST; ii++)
		VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));

	/* restore GHIPGSR, WOLCR, PWCFG, TestReg, WOLCG  ... */
	for (ii = MAC_REG_CHIPGSR; ii < MAC_REG_WOLCR0_CLR; ii++)
		VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));

	/* restore pattern, mask */
	for (ii = MAC_REG_PATRN_CRC0; ii < MAC_REG_BYTEMSK3_3 + 4; ii += 4) {
		VNSvOutPortD(dwIoBase + ii, *(PDWORD)(pbyCxtBuf + ii));
		/* PCAvDelayByIO(1); */
	}
}
Exemplo n.º 9
0
Arquivo: mac.c Projeto: Abioy/kasan
/*
 * Description:
 *      Disable the Key Entry by MISCFIFO
 *
 * Parameters:
 *  In:
 *      dwIoBase        - Base Address for MAC
 *
 *  Out:
 *      none
 *
 * Return Value: none
 *
 */
void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx)
{
	unsigned short wOffset;

	wOffset = MISCFIFO_KEYETRY0;
	wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);

	VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
	VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
	VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
}
Exemplo n.º 10
0
VOID GMACvSetMCAMMask(DWORD dwIoBase, PBYTE pbyMask)
{
	BYTE    byOrgCAMCR, byData;
	/* DWORD   dwData; */

	/* modify CAMCR to select CAM MASK regs */
	VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byOrgCAMCR);
	byData = (BYTE)((byOrgCAMCR & ~CAMCR_PS1) | CAMCR_PS0);
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byData);

	/* Select MCAM Mask */
	VNSvOutPortB(dwIoBase + MAC_REG_CAMADDR, 0);

	VNSvOutPortD(dwIoBase + MAC_REG_CAM, *(PDWORD)pbyMask);
	/* VNSvInPortD(dwIoBase + MAC_REG_CAM, &dwData); */
	VNSvOutPortD(dwIoBase + MAC_REG_CAM + 4, *((PDWORD)(pbyMask + 4)));
	/* VNSvInPortD(dwIoBase + MAC_REG_CAM + 4, &dwData); */

	/* restore to original CAMCR */
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byOrgCAMCR);
}
Exemplo n.º 11
0
/*
 * Description: Sync. TSF counter to BSS
 *              Get TSF offset and write to HW
 *
 * Parameters:
 *  In:
 *      priv         - The adapter to be sync.
 *      byRxRate        - data rate of receive beacon
 *      qwBSSTimestamp  - Rx BCN's TSF
 *      qwLocalTSF      - Local TSF
 *  Out:
 *      none
 *
 * Return Value: none
 */
bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate,
		    u64 qwBSSTimestamp)
{
	u64 local_tsf;
	u64 qwTSFOffset = 0;

	CARDbGetCurrentTSF(priv, &local_tsf);

	if (qwBSSTimestamp != local_tsf) {
		qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp,
						local_tsf);
		/* adjust TSF, HW's TSF add TSF Offset reg */
		VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST, (u32)qwTSFOffset);
		VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST + 4, (u32)(qwTSFOffset >> 32));
		MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN);
	}
Exemplo n.º 12
0
Arquivo: mac.c Projeto: Abioy/kasan
/*
 * Description:
 *      Micro Second Delay via MAC
 *
 * Parameters:
 *  In:
 *      dwIoBase    - Base Address for MAC
 *      uDelay      - Delay time (timer resolution is 4 us)
 *  Out:
 *      none
 *
 * Return Value: none
 *
 */
void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay)
{
	unsigned char byValue;
	unsigned int uu, ii;

	VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
	VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
	VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
	for (ii = 0; ii < 66; ii++) {  // assume max PCI clock is 66Mhz
		for (uu = 0; uu < uDelay; uu++) {
			VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
			if ((byValue == 0) ||
			    (byValue & TMCTL_TSUSP)) {
				VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
				return;
			}
		}
	}
	VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
}
Exemplo n.º 13
0
/*
 * Description: Write to IF/RF, by embeded programming
 *
 * Parameters:
 *  In:
 *      dwIoBase    - I/O base address
 *      dwData      - data to write
 *  Out:
 *      none
 *
 * Return Value: true if succeeded; false if failed.
 *
 */
bool IFRFbWriteEmbeded (unsigned long dwIoBase, unsigned long dwData)
{
    unsigned short ww;
    unsigned long dwValue;

    VNSvOutPortD(dwIoBase + MAC_REG_IFREGCTL, dwData);

    // W_MAX_TIMEOUT is the timeout period
    for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
        VNSvInPortD(dwIoBase + MAC_REG_IFREGCTL, &dwValue);
        if (dwValue & IFREGCTL_DONE)
            break;
    }

    if (ww == W_MAX_TIMEOUT) {
//        DBG_PORT80_ALWAYS(0x32);
        return false;
    }
    return true;
}
Exemplo n.º 14
0
/*
 * Description: Write to IF/RF, by embedded programming
 *
 * Parameters:
 *  In:
 *      iobase      - I/O base address
 *      dwData      - data to write
 *  Out:
 *      none
 *
 * Return Value: true if succeeded; false if failed.
 *
 */
bool IFRFbWriteEmbedded(struct vnt_private *priv, unsigned long dwData)
{
	void __iomem *iobase = priv->PortOffset;
	unsigned short ww;
	unsigned long dwValue;

	VNSvOutPortD(iobase + MAC_REG_IFREGCTL, dwData);

	/* W_MAX_TIMEOUT is the timeout period */
	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortD(iobase + MAC_REG_IFREGCTL, &dwValue);
		if (dwValue & IFREGCTL_DONE)
			break;
	}

	if (ww == W_MAX_TIMEOUT)
		return false;

	return true;
}
Exemplo n.º 15
0
Arquivo: mac.c Projeto: DenisLug/mptcp
/*
 * Description:
 *      Set the chip with current rx descriptor address
 *
 * Parameters:
 *  In:
 *      dwIoBase        - Base Address for MAC
 *      dwCurrDescAddr  - Descriptor Address
 *  Out:
 *      none
 *
 * Return Value: none
 *
 */
void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
{
	unsigned short ww;
	unsigned char byData;
	unsigned char byOrgDMACtl;

	VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
	if (byOrgDMACtl & DMACTL_RUN)
		VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);

	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
		if (!(byData & DMACTL_RUN))
			break;
	}

	VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
	if (byOrgDMACtl & DMACTL_RUN)
		VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
}
Exemplo n.º 16
0
/*
 * Description: Write to IF/RF, by embeded programming
 *
 * Parameters:
 *  In:
 *      dwIoBase    - I/O base address
 *      dwData      - data to write
 *  Out:
 *      none
 *
 * Return Value: TRUE if succeeded; FALSE if failed.
 *
 */
BOOL IFRFbWriteEmbeded (DWORD_PTR dwIoBase, DWORD dwData)
{
    WORD    ww;
    DWORD   dwValue;

    VNSvOutPortD(dwIoBase + MAC_REG_IFREGCTL, dwData);

    // W_MAX_TIMEOUT is the timeout period
    for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
        VNSvInPortD(dwIoBase + MAC_REG_IFREGCTL, &dwValue);
        if (dwValue & IFREGCTL_DONE)
            break;
    }

    if (ww == W_MAX_TIMEOUT) {
//        DBG_PORT80_ALWAYS(0x32);
        return FALSE;
    }
    return TRUE;
}
Exemplo n.º 17
0
Arquivo: mac.c Projeto: Abioy/kasan
//TxDMA1 = AC0DMA
void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
{
	unsigned short ww;
	unsigned char byData;
	unsigned char byOrgDMACtl;

	VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
	if (byOrgDMACtl & DMACTL_RUN)
		VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);

	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
		VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
		if (!(byData & DMACTL_RUN))
			break;
	}
	if (ww == W_MAX_TIMEOUT) {
		DBG_PORT80(0x26);
		pr_debug(" DBG_PORT80(0x26)\n");
	}
	VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
	if (byOrgDMACtl & DMACTL_RUN)
		VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
}
Exemplo n.º 18
0
VOID GMACvInitialize(PSAdapterInfo pAdapter, DWORD dwIoBase, BYTE byRevId)
{
	BYTE    byTemp;
	BYTE check;

	/* clear sticky bits */
	MACvClearStckDS(dwIoBase);

	/* disable force PME-enable */

	VNSvOutPortB(dwIoBase + MAC_REG_WOLCFG_CLR, WOLCFG_PMEOVR);
	/* disable power-event config bit */

	MACvPwrEvntDisable(dwIoBase);

	/* clear power status */
	VNSvOutPortW(dwIoBase + MAC_REG_WOLSR0_CLR, 0xFFFF);

	/* do reset */
	GMACbSoftwareReset(dwIoBase, byRevId);

	/* for AUTOLD be effect, safe delay time */
	PCAvDelayByIO(CB_DELAY_SOFT_RESET);

	VNSvInPortB(dwIoBase + MAC_REG_JMPSR1, &check);

	/* VNSvInPortB(pAdapter->dwIoBase+Gmac_Jumper_Strapping3, &check) */
	/* if (!(check & JMPSR1_J_VEESEL))
		GMACLoadVEE(dwIoBase);
	else { */
	if (check & JMPSR1_J_VEESEL) {
		/* issue RELOAD in EECSR to reload eeprom */
		MACvRegBitsOn(dwIoBase, MAC_REG_EECSR, EECSR_RELOAD);

		/* wait until EEPROM loading complete */
		while (TRUE) {
			if (GMACbIsRegBitsOff(dwIoBase, MAC_REG_EECSR, EECSR_RELOAD))
				break;
		}
	}

	/* EEPROM reloaded will cause bit 0 in MAC_REG_CFGA turned on. */
	/* it makes MAC receive magic packet automatically. So, driver turn it off. */
	MACvRegBitsOff(dwIoBase, MAC_REG_CFGA, CFGA_PACPI);

	/* set rx-FIFO/DMA threshold */
	/* set rx threshold, 128 bytes */
	/*GMACvSetRxThreshold(dwIoBase, 3);*/

	/* set DMA length, 16 DWORDs = 64 bytes */
	/*GMACvSetDmaLength(dwIoBase, 1);*/

	/* suspend-well accept broadcast, multicast */
	VNSvOutPortB(dwIoBase + MAC_REG_WOLCFG_SET, WOLCFG_SAM | WOLCFG_SAB);

	/* back off algorithm use original IEEE standard */
	MACvRegBitsOff(dwIoBase, MAC_REG_CFGB, CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT);

	/* set packet filter */
	/* receive directed and broadcast address */
	GMACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST);

	/* Eric */
#if defined(__USE_GMASK1__)
	VNSvOutPortD(dwIoBase + MAC_REG_IMR, IMR_MASK_VALUE);
#else
	/* Turn on GenIntMask1 */
	VNSvOutPortB(dwIoBase + MAC_REG_CR3_SET, CR3_GINTMSK1);
#endif
#if 0
	VNSvInPortB(dwIoBase, &byTemp);
	printf("address0 = %x\n ", byTemp);
	VNSvInPortB(dwIoBase + 1, &byTemp);
	printf("address1 = %x\n ", byTemp);
	VNSvInPortB(dwIoBase + 2, &byTemp);
	printf("address2 = %x\n ", byTemp);
	VNSvInPortB(dwIoBase + 3, &byTemp);
	printf("address3 = %x\n ", byTemp);
	VNSvInPortB(dwIoBase + 4, &byTemp);
	printf("address4 = %x\n ", byTemp);
	VNSvInPortB(dwIoBase + 5, &byTemp);
	printf("address6 = %x\n ", byTemp);
#endif
	/* Adaptive Interrupt: Init is disabled */

	/* Select page to interrupt hold timer */
	VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byTemp);
	byTemp &= ~(CAMCR_PS0 | CAMCR_PS1);
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byTemp);
	/* Set Interrupt hold timer = 0 */
	VNSvOutPortB(dwIoBase + MAC_REG_ISR_HOTMR, 0x00);

	/* Select Page to Tx-sup threshold */
	VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byTemp);
	byTemp = (BYTE)((byTemp | CAMCR_PS0) & ~CAMCR_PS1);
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byTemp);
	/* Set Tx interrupt suppression threshold = 0 */
	VNSvOutPortB(dwIoBase + MAC_REG_ISR_TSUPTHR, 0x00);

	/* Select Page to Rx-sup threshold */
	VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byTemp);
	byTemp = (BYTE)((byTemp | CAMCR_PS1) & ~CAMCR_PS0);
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byTemp);
	/* Set Rx interrupt suppression threshold = 0 */
	VNSvOutPortB(dwIoBase + MAC_REG_ISR_RSUPTHR, 0x00);

	/* Select page to interrupt hold timer */
	VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byTemp);
	byTemp &= ~(CAMCR_PS0 | CAMCR_PS1);
	VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byTemp);

	/* enable MIICR_MAUTO */
	GMACvEnableMiiAutoPoll(dwIoBase);
}
Exemplo n.º 19
0
Arquivo: mac.c Projeto: Abioy/kasan
/*
 * Description:
 *      Micro Second One shot timer via MAC
 *
 * Parameters:
 *  In:
 *      dwIoBase    - Base Address for MAC
 *      uDelay      - Delay time
 *  Out:
 *      none
 *
 * Return Value: none
 *
 */
void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
{
	VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
	VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
	VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
}
Exemplo n.º 20
0
bool BBbVT3253Init(struct vnt_private *priv)
{
	bool bResult = true;
	int        ii;
	void __iomem *dwIoBase = priv->PortOffset;
	unsigned char byRFType = priv->byRFType;
	unsigned char byLocalID = priv->byLocalID;

	if (byRFType == RF_RFMD2959) {
		if (byLocalID <= REV_ID_VT3253_A1) {
			for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++)
				bResult &= BBbWriteEmbedded(priv, byVT3253InitTab_RFMD[ii][0], byVT3253InitTab_RFMD[ii][1]);

		} else {
			for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++)
				bResult &= BBbWriteEmbedded(priv, byVT3253B0_RFMD[ii][0], byVT3253B0_RFMD[ii][1]);

			for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++)
				bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC4_RFMD2959[ii][0], byVT3253B0_AGC4_RFMD2959[ii][1]);

			VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
			MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0));
		}
		priv->abyBBVGA[0] = 0x18;
		priv->abyBBVGA[1] = 0x0A;
		priv->abyBBVGA[2] = 0x0;
		priv->abyBBVGA[3] = 0x0;
		priv->ldBmThreshold[0] = -70;
		priv->ldBmThreshold[1] = -50;
		priv->ldBmThreshold[2] = 0;
		priv->ldBmThreshold[3] = 0;
	} else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S)) {
		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);

		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);

		priv->abyBBVGA[0] = 0x1C;
		priv->abyBBVGA[1] = 0x10;
		priv->abyBBVGA[2] = 0x0;
		priv->abyBBVGA[3] = 0x0;
		priv->ldBmThreshold[0] = -70;
		priv->ldBmThreshold[1] = -48;
		priv->ldBmThreshold[2] = 0;
		priv->ldBmThreshold[3] = 0;
	} else if (byRFType == RF_UW2451) {
		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);

		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);

		VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
		MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0));

		priv->abyBBVGA[0] = 0x14;
		priv->abyBBVGA[1] = 0x0A;
		priv->abyBBVGA[2] = 0x0;
		priv->abyBBVGA[3] = 0x0;
		priv->ldBmThreshold[0] = -60;
		priv->ldBmThreshold[1] = -50;
		priv->ldBmThreshold[2] = 0;
		priv->ldBmThreshold[3] = 0;
	} else if (byRFType == RF_UW2452) {
		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);

		/* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
		/*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
		/* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
		/*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
		/* Select VC1/VC2, CR215 = 0x02->0x06 */
		bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06);

		/* {{RobertYu:20050125, request by Jack */
		bResult &= BBbWriteEmbedded(priv, 0x90, 0x20);
		bResult &= BBbWriteEmbedded(priv, 0x97, 0xeb);
		/* }} */

		/* {{RobertYu:20050221, request by Jack */
		bResult &= BBbWriteEmbedded(priv, 0xa6, 0x00);
		bResult &= BBbWriteEmbedded(priv, 0xa8, 0x30);
		/* }} */
		bResult &= BBbWriteEmbedded(priv, 0xb0, 0x58);

		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);

		priv->abyBBVGA[0] = 0x14;
		priv->abyBBVGA[1] = 0x0A;
		priv->abyBBVGA[2] = 0x0;
		priv->abyBBVGA[3] = 0x0;
		priv->ldBmThreshold[0] = -60;
		priv->ldBmThreshold[1] = -50;
		priv->ldBmThreshold[2] = 0;
		priv->ldBmThreshold[3] = 0;
		/* }} RobertYu */

	} else if (byRFType == RF_VT3226) {
		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);

		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);

		priv->abyBBVGA[0] = 0x1C;
		priv->abyBBVGA[1] = 0x10;
		priv->abyBBVGA[2] = 0x0;
		priv->abyBBVGA[3] = 0x0;
		priv->ldBmThreshold[0] = -70;
		priv->ldBmThreshold[1] = -48;
		priv->ldBmThreshold[2] = 0;
		priv->ldBmThreshold[3] = 0;
		/* Fix VT3226 DFC system timing issue */
		MACvSetRFLE_LatchBase(dwIoBase);
		/* {{ RobertYu: 20050104 */
	} else if (byRFType == RF_AIROHA7230) {
		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);


		/* {{ RobertYu:20050223, request by JerryChung */
		/* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
		/*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
		/* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
		/*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
		/* Select VC1/VC2, CR215 = 0x02->0x06 */
		bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06);
		/* }} */

		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
			bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);

		priv->abyBBVGA[0] = 0x1C;
		priv->abyBBVGA[1] = 0x10;
		priv->abyBBVGA[2] = 0x0;
		priv->abyBBVGA[3] = 0x0;
		priv->ldBmThreshold[0] = -70;
		priv->ldBmThreshold[1] = -48;
		priv->ldBmThreshold[2] = 0;
		priv->ldBmThreshold[3] = 0;
		/* }} RobertYu */
	} else {
		/* No VGA Table now */
		priv->bUpdateBBVGA = false;
		priv->abyBBVGA[0] = 0x1C;
	}

	if (byLocalID > REV_ID_VT3253_A1) {
		BBbWriteEmbedded(priv, 0x04, 0x7F);
		BBbWriteEmbedded(priv, 0x0D, 0x01);
	}

	return bResult;
}