BOOLEAN
ValidateMode(
PHW_DEVICE_EXTENSION HwDeviceExtension,
PVIDEO_MODE_INFORMATION ModeInformation
)
/*++
Routine Description:
Function to determine if the mode is valid based on the current
adapter. The factors that determine if the mode is valid are the
DAC and the size of video ram.
Argumentss:
HwDeviceExtension - Pointer to the miniport driver's device extension.
ModeInformation - Pointer to the resolution information.
Return Values:
TRUE == The resolution is valid,
FALSE == The resolution is invalid.
--*/
{
//
// Check to see if 24BPP mode is specified and if this DAC supports it...
//
if ( (ModeInformation->BitsPerPlane == 24) &&
(!HwDeviceExtension->Dac.bRamdac24BPP) )
return(FALSE); // 24Bpp not supported by this DAC...
//
// Check to see if we have enough video ram to support this resolution...
//
if ( ((ULONG) (ModeInformation->BitsPerPlane/8) *
ModeInformation->VisScreenWidth *
ModeInformation->VisScreenHeight) >
HwDeviceExtension->FrameLength )
{
VideoDebugPrint((2, "ValidateMode: VisScreenWidth = %d\n",
ModeInformation->VisScreenWidth));
VideoDebugPrint((2, "ValidateMode: VisScreenHeight = %d\n",
ModeInformation->VisScreenHeight));
VideoDebugPrint((2, "ValidateMode: BitsPerPlane = %d\n",
ModeInformation->BitsPerPlane));
VideoDebugPrint((2, "ValidateMode: Vram needed = %ld\n",
((ULONG) (ModeInformation->BitsPerPlane/8) *
ModeInformation->VisScreenWidth *
ModeInformation->VisScreenHeight) ));
return(FALSE); // Not enough video memory for this mode...
}
else
return(TRUE);
} // End of ValidateMode()
VOID
P91Bt489ClrClkDoubler(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
routine description:
Disable the DAC's internal clock doubler.
arguments:
hwdeviceextension - pointer to the miniport driver's device extension.
return value:
--*/
{
UCHAR ucCurState;
VideoDebugPrint((0, "P91Bt489ClrClkDoubler----------\n"));
RD_CMD_REG_3(ucCurState);
WR_CMD_REG_3(ucCurState & ~(DAC_CLK_2X | DAC_CLK_2X_489));
return;
}
/* Reset the adapter into a VGA-compatible state. */
BOOLEAN HwVidResetHw( PVOID HwDevExt, ULONG Columns, ULONG Rows )
{
PHW_DEV_EXT pExt = HwDevExt;
VideoDebugPrint( (1, "videomp: HwVidResetHw\n") );
BOXV_ext_disable( pExt );
/* Indicate that we didn't actually set the requested text mode. */
return( FALSE );
}
VOID
DevDisableDGX(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
Routine Description:
Disables the DGX and turns on VGA pass-thru.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
Return Value:
--*/
{
UCHAR cTemp, *pPort;
VideoDebugPrint((2, "DGX: DevDisableDGX\n"));
*HwDeviceExtension->pControlRegA = 0xb47370;
DacDelay();
pPort = (PCHAR)HwDeviceExtension->DGXControlPorts;
if (HwDeviceExtension->ModelNumber == 1) {
VideoPortWritePortUchar((PUCHAR)HwDeviceExtension->DGX1OutputPort,
0x6);
DacDelay();
pPort += 4;
VideoPortWritePortUchar(pPort, 0x1);
} else {
if (HwDeviceExtension->ModelNumber == 2) {
pPort += 8;
cTemp = VideoPortReadPortUchar(pPort);
cTemp &= 0xaf;
VideoPortWritePortUchar(pPort,
cTemp);
} else {
return;
}
}
}
BOOLEAN
DevSetPointerPos(
PHW_DEVICE_EXTENSION HwDeviceExtension,
ULONG ptlX,
ULONG ptlY
)
/*++
Routine Description:
Move Hardware Pointer.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
ptlX, ptlY - Requested X,Y position for the pointer.
Return Value:
--*/
{
ULONG ulTemp;
//
// Make sure that the cursor is on
//
VideoDebugPrint((2, "DGX: DevSetPointerPos\n"));
ulTemp = *HwDeviceExtension->pControlRegA;
DacDelay();
if (ulTemp & DAC_DISABLEPOINTER) {
ulTemp &= ~DAC_DISABLEPOINTER;
*HwDeviceExtension->pControlRegA = ulTemp;
DacDelay();
}
//
// Strip off invalid bits
//
ptlX &= 0xFFF;
ptlY &= 0xFFF;
ulTemp = ptlX << 12;
ulTemp += ptlY;
*HwDeviceExtension->pCursorPositionReg = ulTemp;
return(TRUE);
}
BOOLEAN
NTAPI
IsVesaBiosOk(IN PVIDEO_PORT_INT10_INTERFACE Interface,
IN ULONG OemRevision,
IN PCHAR Vendor,
IN PCHAR Product,
IN PCHAR Revision)
{
ULONG i;
CHAR Version[21];
/* If the broken VESA bios found, turn VESA off */
VideoDebugPrint((0, "Vendor: %s Product: %s Revision: %s (%lx)\n", Vendor, Product, Revision, OemRevision));
for (i = 0; i < (sizeof(BrokenVesaBiosList) / sizeof(PCHAR)); i++)
{
if (!strncmp(Product, BrokenVesaBiosList[i], strlen(BrokenVesaBiosList[i]))) return FALSE;
}
/* For Brookdale-G (Intel), special hack used */
g_bIntelBrookdaleBIOS = !strncmp(Product, IntelBrookdale, sizeof(IntelBrookdale) - 1);
/* For NVIDIA make sure */
if (!(strncmp(Vendor, Nv11Vendor, sizeof(Nv11Vendor) - 1)) &&
!(strncmp(Product, Nv11Board, sizeof(Nv11Board) - 1)) &&
!(strncmp(Revision, Nv11Chip, sizeof(Nv11Chip) - 1)) &&
(OemRevision == 0x311))
{
/* Read version */
if (Interface->Int10ReadMemory(Interface->Context,
0xC000,
345,
Version,
sizeof(Version))) return FALSE;
if (!strncmp(Version, "Version 3.11.01.24N16", sizeof(Version))) return FALSE;
}
/* VESA ok */
VideoDebugPrint((0, "Vesa ok\n"));
return TRUE;
}
VOID
DevSetPalette(
PHW_DEVICE_EXTENSION HwDeviceExtension,
ULONG *pPal,
ULONG StartIndex,
ULONG Count
)
/*++
Routine Description:
Sets the Inmos G332 palette
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
pPal - Pointer to the array of pallete entries.
StartIndex - Specifies the first pallete entry provided in pPal.
Count - Number of palette entries in pPal
Return Value:
None.
--*/
{
ULONG *pDac;
UCHAR red, green, blue, *pBytePal;
VideoDebugPrint((2, "DGX: DevSetPalette\n"));
if ((pDac = HwDeviceExtension->pPaletteRegs) == NULL)
return;
pDac += StartIndex;
pBytePal = (UCHAR *)pPal;
while (Count--) {
red = *pBytePal++;
green = *pBytePal++;
blue = *pBytePal++;
pBytePal++; // skip extra byte
*pDac++ = (ULONG)(blue | (green << 8) | (red <<16));
DacDelay();
}
}
/*++
** bRejectOnBiosVersion
*
* FILENAME: D:\nt351.nc\weitek\p9x\mini\viper.c
*
* PARAMETERS: PHW_DEVICE_EXTENSION HwDeviceExtension
* PUCHAR pjBios linear address of the BIOS
* ULONG ulBiosLength lengh of the BIOS
*
* DESCRIPTION: Scan the Bios,
*
* RETURNS: TRUE to reject supporting this card.
* FALSE to support this card.
*
*
--*/
BOOLEAN
bRejectOnBiosVersion(
PHW_DEVICE_EXTENSION HwDeviceExtension,
PUCHAR pjBiosAddr,
ULONG ulBiosLength)
{
// Add the strings you want to detect for rejection to this array
static PUCHAR aszBiosVersion[] = {
"VIPER VLB Vers. 1",
"VIPER VLB Vers. 2",
NULL
};
LONG i;
BOOLEAN bFound = FALSE;
for (i = 0; aszBiosVersion[i] != 0; i++)
{
if (VideoPortScanRom(HwDeviceExtension,
(PUCHAR) pjBiosAddr,
VGA_BIOS_LEN,
aszBiosVersion[i]))
{
bFound = TRUE;
break;
}
}
if (bFound == TRUE)
{
VideoPortLogError(HwDeviceExtension,
NULL,
P9_DOWN_LEVEL_BIOS,
i);
VideoDebugPrint((0, "P9X - Down Level Bios\n"));
}
// We will always boot, we'll just warn the user that bad things may happen
return (FALSE);
}
/* Return child device descriptors. In this case just a single monitor. */
VP_STATUS HwGetChildDesc( PVOID HwDevExt, PVIDEO_CHILD_ENUM_INFO ChildEnumInfo,
PVIDEO_CHILD_TYPE VideoChildType, PUCHAR pChildDescriptor,
PULONG UId, PULONG pUnused )
{
PHW_DEV_EXT pExt = HwDevExt;
VideoDebugPrint( (1, "videomp: HwGetChildDesc\n") );
if( ChildEnumInfo->ChildIndex > 0 ) {
if( (int)ChildEnumInfo->ChildIndex <= pExt->NumMonitors ) {
*VideoChildType = Monitor;
*UId = ChildEnumInfo->ChildIndex;
return( VIDEO_ENUM_MORE_DEVICES );
}
}
return( ERROR_NO_MORE_DEVICES );
}
VOID
DevSet16BppPalette(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
Routine Description:
Set up the palette for 16BPP mode.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
Return Value:
None.
--*/
{
ULONG palentry = 0;
ULONG *pPal;
int iCount = 256;
VideoDebugPrint((2, "DGX: DevSet16BppPalette\n"));
if ((pPal = HwDeviceExtension->pPaletteRegs) == 0)
return;
while (iCount--) {
*pPal++ = palentry;
palentry += 0x010101;
DacDelay();
}
}
VOID
DevPointerOff(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
Routine Description:
Turn the cursor off by turning on the "HW Pointer Disable" bit.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
Return Value:
None.
--*/
{
ULONG ulTemp;
VideoDebugPrint((2, "DGX: DevPointerOff\n"));
ulTemp = *HwDeviceExtension->pControlRegA;
DacDelay();
ulTemp |= DAC_DISABLEPOINTER;
*HwDeviceExtension->pControlRegA = ulTemp;
DacDelay();
return;
}
VOID
DevSetPanel(
PHW_DEVICE_EXTENSION HwDeviceExtension,
PUCHAR pMessage
)
/*++
Routine Description:
Writes out a four byte message to the Dell LCD display panel on
the front of the machine. This should probably exist as an IOCTL
(along with the set mode code from above).
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
PUCHAR - ASCII string (4 characters always used)
Return Value:
None.
--*/
{
PUCHAR pPanel;
VideoDebugPrint((2, "DGX: DevSetPanel\n"));
pPanel = (PUCHAR)HwDeviceExtension->FrontPanel;
pPanel += 3;
VideoPortWritePortUchar( pPanel--, *pMessage++ );
VideoPortWritePortUchar( pPanel--, *pMessage++ );
VideoPortWritePortUchar( pPanel--, *pMessage++ );
VideoPortWritePortUchar( pPanel, *pMessage++ );
}
VOID
P91Bt489SetClkDoubler(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
routine description:
Enable the DAC's internal clock doubler.
arguments:
hwdeviceextension - pointer to the miniport driver's device extension.
return value:
--*/
{
UCHAR ucCurState;
VideoDebugPrint((0, "P91Bt489SetClkDoubler----------\n"));
RD_CMD_REG_3(ucCurState);
// per os/2 driver, write undocumented bit too
if (HwDeviceExtension->usBitsPixel == 24 )
{
WR_CMD_REG_3(ucCurState | (DAC_CLK_2X | DAC_CLK_2X_489));
}
else
{
WR_CMD_REG_3(ucCurState | DAC_CLK_2X);
}
return;
}
/* Determine whether the supported adapter is present. Note that this
* function is not allowed to change the state of the adapter!
*/
VP_STATUS HwVidFindAdapter( PVOID HwDevExt, PVOID HwContext, PWSTR ArgumentString,
PVIDEO_PORT_CONFIG_INFO ConfigInfo, PUCHAR Again )
{
PHW_DEV_EXT pExt = HwDevExt;
PVOID *pVirtAddr;
ULONG i;
INT chip_id;
VP_STATUS status;
ULONG cbVramSize;
PWSTR pwszDesc;
ULONG cbDesc;
#ifdef USE_GETACCESSRANGES
VIDEO_ACCESS_RANGE pciAccessRanges[NUM_PCI_RANGES];
USHORT usVendorId = BOXV_PCI_VEN;
USHORT usDeviceId = BOXV_PCI_DEV;
ULONG ulSlot = 0;
#endif
//@todo: The framebuffer address should not be hardcoded for non-PCI access
#define NUM_ACCESS_RANGES 2
VIDEO_ACCESS_RANGE accessRanges[NUM_ACCESS_RANGES] = {
/* StartLo StartHi Len IO Vis Shr */
{ 0x000001CE, 0x00000000, 0x00000002, 1, 1, 0 }, /* I/O ports */
{ 0xE0000000, 0x00000000, 0x00400000, 0, 1, 0 } /* Framebuffer */
};
VideoDebugPrint( (1, "videomp: HwVidFindAdapter\n") );
/* Fail if the passed structure is smaller than the NT 3.1 version. */
if( ConfigInfo->Length < offsetof( VIDEO_PORT_CONFIG_INFO, DmaChannel ) ) {
return( ERROR_INVALID_PARAMETER );
}
/* Sadly, VideoPortGetAccessRanges was not present in NT 3.1. There is no
* reasonably simple way to dynamically import port driver routines on
* newer versions, so we'll just do without.
*/
#ifdef USE_GETACCESSRANGES
/* If PCI is supported, query the bus for resource mappings. */
if( ConfigInfo->AdapterInterfaceType == PCIBus ) {
/* Ask for bus specific access ranges. */
VideoPortZeroMemory( pciAccessRanges, sizeof( pciAccessRanges ) );
status = VideoPortGetAccessRanges( HwDevExt, 0, NULL,
NUM_PCI_RANGES, pciAccessRanges,
&usVendorId, &usDeviceId, &ulSlot );
if( status == NO_ERROR ) {
VideoDebugPrint( (1, "videomp: Found adapter in PCI slot %d\n", ulSlot) );
pExt->ulSlot = ulSlot;
/* The framebuffer is in the first slot of the PCI ranges. Copy
* the data into the access ranges we're going to request.
*/
accessRanges[1].RangeStart = pciAccessRanges[0].RangeStart;
accessRanges[1].RangeLength = pciAccessRanges[0].RangeLength;
} else {
/* On NT versions without PCI support, we won't even attempt this.
* So if we tried to query the PCI device and failed to find it,
* it really isn't there and we have to give up.
*/
VideoDebugPrint( (1, "videomp: PCI adapter not found\n") );
return( ERROR_DEV_NOT_EXIST );
}
}
#endif
/* Some versions of vga.sys trap accesses to ports 0x1CE-0x1CF used on
* old ATI cards. On Windows 2000 and later we can report legacy
* resources to resolve this conflict. On NT 4 and older, we use a hack
* and claim other, non-conflicting ports.
*/
if( PortVersion < VP_VER_W2K )
accessRanges[0].RangeStart = RtlConvertUlongToLargeInteger( 0x1CC );
/* Check for a conflict in case someone else claimed our resources. */
status = VideoPortVerifyAccessRanges( HwDevExt, NUM_ACCESS_RANGES, accessRanges );
if( status != NO_ERROR ) {
return( status );
}
/* Indicate no emulator support. */
ConfigInfo->NumEmulatorAccessEntries = 0;
ConfigInfo->EmulatorAccessEntries = NULL;
ConfigInfo->EmulatorAccessEntriesContext = 0;
ConfigInfo->HardwareStateSize = 0;
ConfigInfo->VdmPhysicalVideoMemoryAddress.LowPart = 0;
ConfigInfo->VdmPhysicalVideoMemoryAddress.HighPart = 0;
ConfigInfo->VdmPhysicalVideoMemoryLength = 0;
/* Describe the framebuffer. We claimed the range already. */
pExt->PhysicalFrameAddress = accessRanges[1].RangeStart;
/*
* Map all memory and I/O ranges into system virtual address space.
* NB: The virtual addresses in the HwDevExt must match the number
* and type of AccessRange entries.
*/
pVirtAddr = &pExt->IoPorts;
/* Attempt to claim and map the memory and I/O address ranges. */
for( i = 0; i < NUM_ACCESS_RANGES; ++i, ++pVirtAddr ) {
*pVirtAddr = VideoPortGetDeviceBase( pExt,
accessRanges[i].RangeStart,
accessRanges[i].RangeLength,
accessRanges[i].RangeInIoSpace );
if( *pVirtAddr == NULL ) {
return( ERROR_INVALID_PARAMETER );
}
}
/* Verify that supported hardware is present. */
chip_id = BOXV_detect( pExt, &pExt->FramebufLen );
if( !chip_id ) {
/* If supported hardware was not found, free allocated resources. */
pVirtAddr = &pExt->IoPorts;
for( i = 0; i < NUM_ACCESS_RANGES; ++i, ++pVirtAddr )
VideoPortFreeDeviceBase( pExt, *pVirtAddr );
return( ERROR_DEV_NOT_EXIST );
}
/* We need to access VGA and other I/O ports. Fortunately the HAL doesn't
* care at all how the I/O ports are or aren't mapped on x86 platforms.
*/
pExt->IOAddrVGA = NULL;
/* Only support one attached monitor. */
pExt->NumMonitors = 1;
/* Set up mode information. */
pExt->CurrentModeNumber = 0;
pExt->NumValidModes = 0;
for( i = 0; i < ulAllModes; ++i ) {
vmpValidateMode( &VideoModes[i], pExt->FramebufLen );
if( VideoModes[i].bValid )
++pExt->NumValidModes;
}
/* Only one adapter supported, no need to call us again. */
*Again = 0;
/* Report the hardware names via registry. */
#define TEMP_CHIP_NAME L"bochs Mk II"
pwszDesc = TEMP_CHIP_NAME;
cbDesc = sizeof( TEMP_CHIP_NAME );
VideoPortSetRegistryParameters( pExt, L"HardwareInformation.ChipType",
pwszDesc, cbDesc );
#define TEMP_DAC_NAME L"Integrated DAC"
pwszDesc = TEMP_DAC_NAME;
cbDesc = sizeof( TEMP_DAC_NAME );
VideoPortSetRegistryParameters( pExt, L"HardwareInformation.DacType",
pwszDesc, cbDesc );
#define TEMP_ADAPTER_NAME L"VirtualBox/bochs"
pwszDesc = TEMP_ADAPTER_NAME;
cbDesc = sizeof( TEMP_ADAPTER_NAME );
VideoPortSetRegistryParameters( pExt, L"HardwareInformation.AdapterString",
pwszDesc, cbDesc );
cbVramSize = pExt->FramebufLen;
VideoPortSetRegistryParameters( pExt, L"HardwareInformation.MemorySize",
&cbVramSize, sizeof( ULONG ) );
/* All is well. */
return( NO_ERROR );
}
VOID
P91SizeVideoMemory(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
Routine Description:
Routine to determine the amount of memory and what memory configuration
bits to set.
This routine assumes that the board is already initialized.
It also sets (...)
Argumentss:
HwDeviceExtension - Pointer to the miniport driver's device extension.
Return Values:
None.
Modifies:
HwDeviceExtension->p91State.usNumVramBanks = 1,2 or 4;
HwDeviceExtension->p91State.ulFrameBufferSize = 0x0100000,
0x0200000 or 0x0400000;
--*/
{
ULONG ulMemConfig;
VideoDebugPrint((2, "P91SizeVideoMemory - Entry\n"));
ulMemConfig = P9_RD_REG(P91_MEM_CONFIG);
if (HwDeviceExtension->p91State.bVram256)
{
//
// Assume 4 banks and test assertion...
//
HwDeviceExtension->p91State.usMemConfNum = 7;
HwDeviceExtension->p91State.usNumVramBanks = 4;
HwDeviceExtension->p91State.ulFrameBufferSize = 0x0400000;
P9_WR_REG(P91_MEM_CONFIG, 0x00000007);
if (!P91TestVideoMemory(HwDeviceExtension, 32))
{
//
// Assertion failed, so assume 2 banks and test assertion...
//
HwDeviceExtension->p91State.usMemConfNum = 5;
HwDeviceExtension->p91State.usNumVramBanks = 2;
HwDeviceExtension->p91State.ulFrameBufferSize = 0x0200000L;
P9_WR_REG(P91_MEM_CONFIG, 0x00000005);
if (!P91TestVideoMemory(HwDeviceExtension, 32))
{
//
// If second assertion fails, assume 1 bank
//
HwDeviceExtension->p91State.usMemConfNum = 4;
HwDeviceExtension->p91State.usNumVramBanks = 1;
HwDeviceExtension->p91State.ulFrameBufferSize = 0x0100000;
}
}
}
else
{
//
// Assume 4 banks and test assertion...
//
HwDeviceExtension->p91State.usMemConfNum = 3;
HwDeviceExtension->p91State.usNumVramBanks = 4;
HwDeviceExtension->p91State.ulFrameBufferSize = 0x0200000;
P9_WR_REG(P91_MEM_CONFIG, 0x00000003);
if (!P91TestVideoMemory(HwDeviceExtension, 32))
{
//
// Assertion failed, so assume 2 banks
//
HwDeviceExtension->p91State.usMemConfNum = 1;
HwDeviceExtension->p91State.usNumVramBanks = 2;
HwDeviceExtension->p91State.ulFrameBufferSize = 0x0100000L;
}
}
VideoDebugPrint((3, "P91SizeVideoMemory: usNumVramBanks = %d\n",
HwDeviceExtension->p91State.usNumVramBanks));
VideoDebugPrint((3, "P91SizeVideoMemory: usFrameBufferSize = %lx\n",
HwDeviceExtension->p91State.ulFrameBufferSize));
VideoDebugPrint((2, "P91SizeVideoMemory - Exit\n"));
P9_WR_REG(P91_MEM_CONFIG, ulMemConfig);
} // End of P91SizeVideoMemory()
VOID
CalcP9100MemConfig (
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
Routine Description:
Calculate the value to be stored in the Power 9100 memory configuration
field as well as the srtctl field.
Argumentss:
PHW_DEVICE_EXTENSION HwDeviceExtension.
Return Values:
FALSE - If the operation is not successful.
TRUE - If the operation is successful.
--*/
{
BOOLEAN fDacDividesClock;
USHORT usShiftClockIndex;
USHORT usSrtctlSrcIncIndex;
USHORT usLoadClock;
USHORT usDivisionFactor;
USHORT usClkFreqIndex;
USHORT usBlankDlyIndex;
USHORT usSamIndex;
USHORT usDacWidthIndex;
USHORT usNumBanksIndex;
USHORT usEffectiveBackendBanks;
USHORT usDepthOfOneSAM;
USHORT usEffectiveSAMDepth;
USHORT usEffectiveRowDepth;
USHORT usMemClkInUse;
ULONG ulMemConfig;
ULONG ulSrtCtl;
//
// Define the positive (rising edge) blank delay index table for when the
// Power 9100 is dividing the clock.
//
USHORT usPositiveBlnkDly[2][2][3] =
{
//
// Define blank delay for 128K deep VRAM
// 1Bnk 2Bnk 4Bnk
//
{
{0xFF, 0x00, 0x00}, // 32-Bit RAMDAC
{0xFF, 0x00, 0x00} // 64-Bit RAMDAC
},
//
// Define blank delay for 256K deep VRAM
// 1Bnk 2Bnk 4Bnk
//
{
{0x01, 0x02, 0x00}, // 32-Bit RAMDAC
{0xFF, 0x01, 0x02} // 64-Bit RAMDAC
}
};
//
// Define the negative (falling edge) blank delay index table for when the
// Power 9100 is dividing the clock.
//
USHORT usNegativeBlnkDly[2][2][3] =
{
//
// Define blank delay for 128K deep VRAM
// 1Bnk 2Bnk 4Bnk
//
{
{0xFF, 0x02, 0x03}, // 32-Bit RAMDAC
{0xFF, 0x01, 0x02} // 64-Bit RAMDAC
},
//
// Define blank delay for 256K deep VRAM
// 1Bnk 2Bnk 4Bnk
//
{
{0x01, 0x02, 0x03}, // 32-Bit RAMDAC
{0xFF, 0x01, 0x02} // 64-Bit RAMDAC
}
};
//
// Define the VRAM configuration mem_config.config lookup table.
//
ULONG ulMemConfTable[] =
{
0,
P91_MC_CNFG_1,
0,
P91_MC_CNFG_3,
P91_MC_CNFG_4,
P91_MC_CNFG_5,
0,
P91_MC_CNFG_7,
0,
0,
0,
P91_MC_CNFG_11,
0,
0,
P91_MC_CNFG_14,
P91_MC_CNFG_15
};
//
// Define the mem_config.shiftclk_mode and mem_config.soe_mode lookup table.
//
ULONG ulShiftClockMode[] =
{
P91_MC_SHFT_CLK_1_BANK | P91_MC_SERIAL_OUT_1_BANK,
P91_MC_SHFT_CLK_2_BANK | P91_MC_SERIAL_OUT_2_BANK,
P91_MC_SHFT_CLK_4_BANK | P91_MC_SERIAL_OUT_4_BANK
};
//
// Define the mem_config.shiftclk_freq and mem_config.crtc_freq lookup table.
//
ULONG ulClockFreq[] =
{
P91_MC_SHFT_CLK_DIV_1 | P91_MC_CRTC_CLK_DIV_1,
P91_MC_SHFT_CLK_DIV_2 | P91_MC_CRTC_CLK_DIV_2,
P91_MC_SHFT_CLK_DIV_4 | P91_MC_CRTC_CLK_DIV_4,
P91_MC_SHFT_CLK_DIV_8 | P91_MC_CRTC_CLK_DIV_8,
P91_MC_SHFT_CLK_DIV_16 | P91_MC_CRTC_CLK_DIV_16
};
//
// Define the mem_config.blank_dly field lookup table.
//
ULONG ulBlankDly[] =
{
P91_MC_BLNKDLY_0_CLK,
P91_MC_BLNKDLY_1_CLK,
P91_MC_BLNKDLY_2_CLK,
P91_MC_BLNKDLY_3_CLK
};
//
// Define the srtctl.src_incs field lookup table.
//
ULONG ulSrtctlSrcInc[] =
{
P91_SRTCTL_SRC_INC_256,
P91_SRTCTL_SRC_INC_512,
P91_SRTCTL_SRC_INC_1024
};
//
// A1/A2 silicon SPLIT SHIFT TRANSFER BUG FIX
//
// First initialize the memory clock that is being used. This value may
// need to be changed if it is determined that the conditions are right
// for the split shift transfer bug to occur.
//
// First choose the default value for the clock being used just in case
// there was not a value passed in.
//
usMemClkInUse = (HwDeviceExtension->p91State.usRevisionID ==
WTK_9100_REV1) ? DEF_P9100_REV1_MEMCLK :
DEF_P9100_MEMCLK;
//
// A1/A2 silicon SPLIT SHIFT TRANSFER BUG FIX
//
// Now select either the default memory clock or the value passed in.
//
// usMemClkInUse = (*pusMemClock) ? *pusMemClock : usMemClkInUse;
//
// Initialize the constant fields of the Screen Repaint Timing Control
// register value.
//
ulSrtCtl = P91_SRTCTL_DISP_BUFF_0 | // display_buffer (3)
P91_SRTCTL_HR_NORMAL | // hblnk_relaod (4)
P91_SRTCTL_ENABLE_VIDEO | // enable_video (5)
P91_SRTCTL_HSYNC_INT | // internal_hsync (7)
P91_SRTCTL_VSYNC_INT; // internal_vsync (8)
//
// Initialize the memory configuration fields to start things off.
//
ulMemConfig = ulMemConfTable[HwDeviceExtension->p91State.usMemConfNum];
//
// Initialize all of the constant fields.
//
ulMemConfig |= P91_MC_MISS_ADJ_1 | // vram_miss_adj (3)
P91_MC_READ_ADJ_1 | // vram_read_adj (4)
P91_MC_WRITE_ADJ_1 | // vram_write_adj (5)
P91_MC_VCP_PRIORITY_HI | // priority_select (6)
P91_MC_DAC_ACCESS_ADJ_0 | // dac_access_adj (7)
P91_MC_DAC_MODE_0 | // dac_mode (8)
P91_MC_MEM_VID_NORMAL | // hold_reset (9)
P91_MC_MUXSEL_NORMAL | // reserved (16-17)
P91_MC_SLOW_HOST_ADJ_1 | // slow_host_hifc (30)
P91_MC_READ_SMPL_ADJ_1; // vram_read_sample (31)
//
// Calculate the number of effective back-end banks in the current configuration. This
// value is used to calculate several fields in the memory configuration register.
//
usEffectiveBackendBanks = (32*HwDeviceExtension->p91State.usNumVramBanks)
/ HwDeviceExtension->Dac.usRamdacWidth;
//
// Determine the depth of one shift register as follows:
// 128k deep VRAM has a row size of 256 => depth of one shift register is 256
// 256k deep VRAM has a row size of 512 => depth of one shift register is 512
//
usDepthOfOneSAM = (HwDeviceExtension->p91State.ulPuConfig &
P91_PUC_128K_VRAMS) ? 256 : 512;
//
// Calculate the effective SAM and Row depths. These values are used to calculate the
// initial value for the SRTCTL register.
//
usEffectiveSAMDepth = usDepthOfOneSAM * usEffectiveBackendBanks;
usEffectiveRowDepth = usDepthOfOneSAM *
HwDeviceExtension->p91State.usNumVramBanks;
//
// Calculate the index into the Shift Clock Mode lookup table. The index is calculated
// as Logbase2(usEffectiveBakendBanks) should give either a 0, 1 or 2.
//
usShiftClockIndex = usEffectiveBackendBanks >> 1;
VideoDebugPrint((2, "CalcP9100MemConfig: usEffectiveBackendBanks = %d\n",
usEffectiveBackendBanks));
VideoDebugPrint((2, "CalcP9100MemConfig: usShiftClockIndex = %d\n",
usShiftClockIndex));
VideoDebugPrint((2, "CalcP9100MemConfig: usShiftClockMode[] = %lx\n",
ulShiftClockMode[usShiftClockIndex]));
//
// Now, using the Shift Clock Mode lookup table index, set both the shiftclk_mode (22-23)
// and soe_mode (24-25) fields.
//
ulMemConfig |= ulShiftClockMode[usShiftClockIndex];
switch (HwDeviceExtension->p91State.ulPuConfig & P91_PUC_VRAM_SAM_SIZE)
{
case P91_PUC_FULL_SIZE_SHIFT:
{
//
// Calculate the initial value for the SRTCTL register.
//
// First set srtctl.src_incs...
//
usSrtctlSrcIncIndex = (USHORT) (Logbase2 ((ULONG) usEffectiveRowDepth) - 9);
ulSrtCtl |= ulSrtctlSrcInc[usSrtctlSrcIncIndex];
//
// And then srtctl.qsfselect
//
ulSrtCtl |= Logbase2((ULONG) usEffectiveSAMDepth) - 5;
//
// Set the vad_shft field for full size SAMs.
//
ulMemConfig |= P91_MC_VAD_DIV_1;
break;
}
case P91_PUC_HALF_SIZE_SHIFT:
{
//
// Calculate the initial value for the SRTCTL register.
//
// First set srtctl.src_incs...
//
usSrtctlSrcIncIndex = (USHORT) (Logbase2 ((ULONG) usEffectiveRowDepth) - 9);
if (usSrtctlSrcIncIndex)
{
//
// For half size SAMs, if src_incs is not already equal to 0 then it will get
// decremented by one...
//
--usSrtctlSrcIncIndex;
ulSrtCtl |= ulSrtctlSrcInc[usSrtctlSrcIncIndex];
//
// And vad_shft will be set to 0.
//
ulMemConfig |= P91_MC_VAD_DIV_1;
}
else
{
//
// If src_incs is already equal to 0, then it will be left as is...
//
ulSrtCtl |= ulSrtctlSrcInc[usSrtctlSrcIncIndex];
//
// And vad_shft will be set to 1.
//
ulMemConfig |= P91_MC_VAD_DIV_2;
}
//
// Now set srtctl.qsfselect for half size SAMs.
//
ulSrtCtl |= Logbase2 ((ULONG) usEffectiveSAMDepth) - 6;
break;
}
}
//
// Determine if the RAMDAC should divide the clock.
//
usLoadClock = (USHORT) ((HwDeviceExtension->VideoData.dotfreq1 /
HwDeviceExtension->Dac.usRamdacWidth) *
HwDeviceExtension->usBitsPixel);
// start of non-JEDEC memory bug fix
if (
(HwDeviceExtension->p91State.usRevisionID < WTK_9100_REV3) &&
(HwDeviceExtension->usBitsPixel <= 16) &&
( ( (HwDeviceExtension->p91State.usNumVramBanks == 2) &&
(HwDeviceExtension->Dac.usRamdacWidth == 64) &&
((HwDeviceExtension->p91State.ulPuConfig &
P91_PUC_FREQ_SYNTH_TYPE) != P91_PUC_FIXED_MEMCLK) &&
(usLoadClock < 1200)
) ||
( usLoadClock < 800 )
)
#ifdef _MIPS_
&& !( HwDeviceExtension->MachineType == SIEMENS_P9100_VLB
|| HwDeviceExtension->MachineType == SIEMENS_P9100_PCi)
// SNI-Od: 22-1-96:
// hum!! (HwDeviceExtension->Dac.usRamdacID != DAC_ID_IBM525) ??
#endif
)
{
if (HwDeviceExtension->VideoData.dotfreq1 <= 6750 )
{
ulMemConfig |= ((2 - (HwDeviceExtension->usBitsPixel/8) +
(HwDeviceExtension->Dac.usRamdacWidth/32)) << 10) // shiftclk_freq (10-12)
|
((2 - (HwDeviceExtension->usBitsPixel/8) +
(HwDeviceExtension->Dac.usRamdacWidth/32)) << 13); // crtc_freq (13-15)
}
else
{
ulMemConfig |= ((1 - (HwDeviceExtension->usBitsPixel/8) +
(HwDeviceExtension->Dac.usRamdacWidth/32)) << 10) // shiftclk_freq (10-12)
|
((1 - (HwDeviceExtension->usBitsPixel/8) +
(HwDeviceExtension->Dac.usRamdacWidth/32)) << 13); // crtc_freq (13-15)
}
fDacDividesClock = FALSE;
}
else
{
//
// A1/A2 silicon SPLIT SHIFT TRANSFER BUG FIX
//
// This is the main logic for the split shift transfer bug software work
// around. The current assumption is that the RAMDAC will always be doing
// the dividing of the clock.
//
fDacDividesClock = TRUE;
//
// A1/A2 silicon SPLIT SHIFT TRANSFER BUG FIX
//
// Special attention is required for A1/A2 silicon for low resolution modes
// such as 640x480x8, 640x480x15, 640x480x16 and 800x600x8. Furthormore,
// the problem only occurs on boards with 2 megabytes of VRAM, a 64-bit
// RAMDAC and when the following condition is met.
//
// (SCLK * 7) < MEMCLK
//
// Note: The value calculated for LCLK can also be used in place of SCLK
// in the computations.
//
if ((HwDeviceExtension->p91State.usRevisionID < WTK_9100_REV3) &&
(HwDeviceExtension->usBitsPixel != 24) &&
((HwDeviceExtension->p91State.ulPuConfig &
P91_PUC_MEMORY_DEPTH) == P91_PUC_256K_VRAMS) &&
(HwDeviceExtension->p91State.usNumVramBanks == 2) &&
(HwDeviceExtension->Dac.usRamdacWidth == 64) &&
((HwDeviceExtension->p91State.ulPuConfig &
P91_PUC_FREQ_SYNTH_TYPE) != P91_PUC_FIXED_MEMCLK) &&
((usLoadClock * 7) < usMemClkInUse))
{
//
// All the conditions are right for the split shift transfer bug to occur.
// The software fix for this bug requires that the memory clock is adjusted
// so that the (SCLK * 7) < MEMCLK equation is no longer satisfied. This is
// done easily enough by setting MEMCLK = SCLK * 7. By doing this, MEMCLK is
// not reduced any more than neccessary.
//
usMemClkInUse = (usLoadClock * 7);
}
//
// Reprogram MEMCLK...
//
ProgramClockSynth(HwDeviceExtension, usMemClkInUse, TRUE, FALSE);
//
// A1/A2 silicon SPLIT SHIFT TRANSFER BUG FIX
//
// Because of the current work around, the RAMDAC always does the dividing of
// of the clock and the DDOTCLK is always used, so set those bit here.
//
// Set the shiftclk_freq (10-12), crtc_freq (13-15) and video_clk_sel (20) fields for
// when the RAMDAC is dividing the clock.
//
ulMemConfig |= P91_MC_SHFT_CLK_DIV_1 | // shiftclk_freq (10-12)
P91_MC_CRTC_CLK_DIV_1 | // crtc_freq (13-15)
P91_MC_VCLK_SRC_DDOTCLK; // video_clk_sel (20)
}
VideoDebugPrint((2, "CalcP9100MemConfig: usLoadClock = %d\n",
usLoadClock));
VideoDebugPrint((2, "CalcP9100MemConfig: fDacDividesClock = %d\n",
fDacDividesClock));
#if 0
if (fDacDividesClock)
{
//
// Set the shiftclk_freq (10-12), crtc_freq (13-15) and video_clk_sel (20) fields for
// when the RAMDAC is dividing the clock.
//
ulMemConfig |= P91_MC_SHFT_CLK_DIV_1 | // shiftclk_freq (10-12)
P91_MC_CRTC_CLK_DIV_1 | // crtc_freq (13-15)
P91_MC_VCLK_SRC_DDOTCLK; // video_clk_sel (20)
}
else
{
//
// Set the shiftclk_freq (10-12), crtc_freq (13-15) and video_clk_sel (20) fields for
// when the Power 9100 is dividing the clock.
//
usDivisionFactor = (USHORT) (HwDeviceExtension->Dac.usRamdacWidth /
HwDeviceExtension->usBitsPixel);
usClkFreqIndex = (USHORT) Logbase2 ((ULONG) usDivisionFactor);
VideoDebugPrint((2, "CalcP9100MemConfig: usClkFreqIndex#1 = %d\n",
usClkFreqIndex));
if (HwDeviceExtension->VideoData.dotfreq1 >
HwDeviceExtension->Dac.ulMaxClkFreq) // was if (usFreqRatio == 2)
{
--usClkFreqIndex;
VideoDebugPrint((2, "CalcP9100MemConfig: usClkFreqIndex#2 = %d\n",
usClkFreqIndex));
}
VideoDebugPrint((2, "CalcP9100MemConfig: usClkFreqIndex = %d\n",
usClkFreqIndex));
VideoDebugPrint((2, "CalcP9100MemConfig: ulClockFreq[] = %lx\n",
ulClockFreq[usClkFreqIndex]));
ulMemConfig |= ulClockFreq[usClkFreqIndex];
//
// video_clk_sel is always PIXCLK when the 9100 is dividing the clock.
//
ulMemConfig |= P91_MC_VCLK_SRC_PIXCLK;
}
#endif
//
// Determine the setting for the blank_edge (19) field
//
if ((usLoadClock <= 3300) ||
(HwDeviceExtension->p91State.usRevisionID >= WTK_9100_REV3))
{
ulMemConfig |= P91_MC_SYNC_FALL_EDGE;
}
else
{
ulMemConfig |= P91_MC_SYNC_RISE_EDGE;
}
//
// Do the magic for the blank_dly (27-28) field.
//
if (HwDeviceExtension->p91State.usRevisionID >= WTK_9100_REV3)
{
//
// For A3 silicon, this is simply a 1.
//
usBlankDlyIndex = 1;
//
// Now special case for the number of banks and the DAC width.
//
if ((HwDeviceExtension->p91State.usNumVramBanks == 4) &&
(HwDeviceExtension->Dac.usRamdacWidth == 32))
{
++usBlankDlyIndex;
}
}
else if (fDacDividesClock)
{
//
// When not on A3 and the DAC is dividing the clock, there's a little
// more to this field.
//
if ((ulMemConfig & P91_MC_BLANK_EDGE_MSK) == P91_MC_SYNC_RISE_EDGE)
{
usBlankDlyIndex = 1;
}
else
{
usBlankDlyIndex = 2;
}
//
// Now special case for the number of banks and the DAC width.
//
if ((HwDeviceExtension->p91State.usNumVramBanks == 4) &&
(HwDeviceExtension->Dac.usRamdacWidth == 32))
{
++usBlankDlyIndex;
}
}
else
{
//
// When the Power 9100 is dividing the clock this gets really messy.
//
usSamIndex = ((HwDeviceExtension->p91State.ulPuConfig &
P91_PUC_VRAM_SAM_SIZE) == P91_PUC_FULL_SIZE_SHIFT) ? 1 : 0;
usDacWidthIndex = (HwDeviceExtension->Dac.usRamdacWidth / 32) - 1;
usNumBanksIndex = HwDeviceExtension->p91State.usNumVramBanks >> 1;
if ((ulMemConfig & P91_MC_BLANK_EDGE_MSK) == P91_MC_SYNC_RISE_EDGE)
{
usBlankDlyIndex = usPositiveBlnkDly[usSamIndex]
[usDacWidthIndex]
[usNumBanksIndex];
}
else
{
usBlankDlyIndex = usNegativeBlnkDly[usSamIndex]
[usDacWidthIndex]
[usNumBanksIndex];
}
//
// Now special case for the number of banks, the DAC width, the SAM size and
// the pixel depth.
//
if ((HwDeviceExtension->usBitsPixel == 32) &&
(HwDeviceExtension->p91State.usNumVramBanks == 1) &&
(usSamIndex == 1) &&
(HwDeviceExtension->Dac.usRamdacWidth == 32))
{
usBlankDlyIndex = 2;
}
if ((HwDeviceExtension->usBitsPixel == 32) &&
(HwDeviceExtension->p91State.usNumVramBanks == 2) &&
(usSamIndex == 1) &&
(HwDeviceExtension->Dac.usRamdacWidth == 32))
{
usBlankDlyIndex = 1;
}
}
//
// Now use the blank delay index to set the blank_dly (27-38) field in the
// memory configuration regsiter.
//
ulMemConfig |= ulBlankDly[usBlankDlyIndex];
//
// Now calculate the blank delay adjustment used when calculating the timing
// values.
//
HwDeviceExtension->p91State.ulBlnkDlyAdj = (ULONG) usBlankDlyIndex;
//
// As if everything wasn't bad enough!!! One more special case.
//
if ((HwDeviceExtension->p91State.usRevisionID >= WTK_9100_REV3) &&
(HwDeviceExtension->p91State.usNumVramBanks == 2) &&
((HwDeviceExtension->p91State.ulPuConfig & P91_PUC_VRAM_SAM_SIZE)
== P91_PUC_HALF_SIZE_SHIFT) &&
(HwDeviceExtension->Dac.usRamdacWidth == 64) &&
(HwDeviceExtension->usBitsPixel == 8) &&
(HwDeviceExtension->VideoData.XSize == 640) &&
(HwDeviceExtension->VideoData.YSize == 480))
{
//
// Fix up for A3 silicon.
//
HwDeviceExtension->p91State.ulBlnkDlyAdj++;
}
//
// Set the return values.
//
HwDeviceExtension->p91State.ulMemConfVal = ulMemConfig;
HwDeviceExtension->p91State.ulSrctlVal = ulSrtCtl;
HwDeviceExtension->Dac.bRamdacDivides = fDacDividesClock;
return;
} // End CalcP9100MemConfig ()
VP_STATUS
VgaInterpretCmdStream(
PHW_DEVICE_EXTENSION HwDeviceExtension,
PUSHORT pusCmdStream
)
/*++
Routine Description:
Interprets the appropriate command array to set up VGA registers for the
requested mode. Typically used to set the VGA into a particular mode by
programming all of the registers
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
pusCmdStream - array of commands to be interpreted.
Return Value:
The status of the operation (can only fail on a bad command); TRUE for
success, FALSE for failure.
--*/
{
ULONG ulCmd;
ULONG ulPort;
UCHAR jValue;
USHORT usValue;
ULONG culCount;
ULONG ulIndex;
ULONG ulBase;
if (pusCmdStream == NULL) {
VideoDebugPrint((1, "VgaInterpretCmdStream - Invalid pusCmdStream\n"));
return TRUE;
}
ulBase = (ULONG)HwDeviceExtension->IOAddress;
//
// Now set the adapter to the desired mode.
//
while ((ulCmd = *pusCmdStream++) != EOD) {
//
// Determine major command type
//
switch (ulCmd & 0xF0) {
//
// Basic input/output command
//
case INOUT:
//
// Determine type of inout instruction
//
if (!(ulCmd & IO)) {
//
// Out instruction. Single or multiple outs?
//
if (!(ulCmd & MULTI)) {
//
// Single out. Byte or word out?
//
if (!(ulCmd & BW)) {
//
// Single byte out
//
ulPort = *pusCmdStream++;
jValue = (UCHAR) *pusCmdStream++;
VideoPortWritePortUchar((PUCHAR)(ulBase+ulPort),
jValue);
} else {
//
// Single word out
//
ulPort = *pusCmdStream++;
usValue = *pusCmdStream++;
VideoPortWritePortUshort((PUSHORT)(ulBase+ulPort),
usValue);
}
} else {
//
// Output a string of values
// Byte or word outs?
//
if (!(ulCmd & BW)) {
//
// String byte outs. Do in a loop; can't use
// VideoPortWritePortBufferUchar because the data
// is in USHORT form
//
ulPort = ulBase + *pusCmdStream++;
culCount = *pusCmdStream++;
while (culCount--) {
jValue = (UCHAR) *pusCmdStream++;
VideoPortWritePortUchar((PUCHAR)ulPort,
jValue);
}
} else {
//
// String word outs
//
ulPort = *pusCmdStream++;
culCount = *pusCmdStream++;
VideoPortWritePortBufferUshort((PUSHORT)
(ulBase + ulPort), pusCmdStream, culCount);
pusCmdStream += culCount;
}
}
} else {
// In instruction
//
// Currently, string in instructions aren't supported; all
// in instructions are handled as single-byte ins
//
// Byte or word in?
//
if (!(ulCmd & BW)) {
//
// Single byte in
//
ulPort = *pusCmdStream++;
jValue = VideoPortReadPortUchar((PUCHAR)ulBase+ulPort);
} else {
//
// Single word in
//
ulPort = *pusCmdStream++;
usValue = VideoPortReadPortUshort((PUSHORT)
(ulBase+ulPort));
}
}
break;
//
// Higher-level input/output commands
//
case METAOUT:
//
// Determine type of metaout command, based on minor
// command field
//
switch (ulCmd & 0x0F) {
//
// Indexed outs
//
case INDXOUT:
ulPort = ulBase + *pusCmdStream++;
culCount = *pusCmdStream++;
ulIndex = *pusCmdStream++;
while (culCount--) {
usValue = (USHORT) (ulIndex +
(((ULONG)(*pusCmdStream++)) << 8));
VideoPortWritePortUshort((PUSHORT)ulPort, usValue);
ulIndex++;
}
break;
//
// Masked out (read, AND, XOR, write)
//
case MASKOUT:
ulPort = *pusCmdStream++;
jValue = VideoPortReadPortUchar((PUCHAR)ulBase+ulPort);
jValue &= *pusCmdStream++;
jValue ^= *pusCmdStream++;
VideoPortWritePortUchar((PUCHAR)ulBase + ulPort,
jValue);
break;
//
// Attribute Controller out
//
case ATCOUT:
ulPort = ulBase + *pusCmdStream++;
culCount = *pusCmdStream++;
ulIndex = *pusCmdStream++;
while (culCount--) {
// Write Attribute Controller index
VideoPortWritePortUchar((PUCHAR)ulPort,
(UCHAR)ulIndex);
// Write Attribute Controller data
jValue = (UCHAR) *pusCmdStream++;
VideoPortWritePortUchar((PUCHAR)ulPort, jValue);
ulIndex++;
}
break;
//
// None of the above; error
//
default:
return FALSE;
}
break;
//
// NOP
//
case NCMD:
break;
//
// Unknown command; error
//
default:
return FALSE;
}
}
return TRUE;
} // end VgaInterpretCmdStream()
VP_STATUS
VgaSetMode(
PHW_DEVICE_EXTENSION HwDeviceExtension,
PVIDEO_MODE Mode,
ULONG ModeSize,
// eVb: 2.2 [SET MODE] - Add new output parameter for framebuffer update functionality
PULONG PhysPtrChange
// eVb: 2.2 [END]
)
/*++
Routine Description:
This routine sets the vga into the requested mode.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
Mode - Pointer to the structure containing the information about the
font to be set.
ModeSize - Length of the input buffer supplied by the user.
Return Value:
ERROR_INSUFFICIENT_BUFFER if the input buffer was not large enough
for the input data.
ERROR_INVALID_PARAMETER if the mode number is invalid.
NO_ERROR if the operation completed successfully.
--*/
{
PVIDEOMODE pRequestedMode;
VP_STATUS status;
ULONG RequestedModeNum;
// eVb: 2.3 [SET MODE] - Add new output parameter for framebuffer update functionality
*PhysPtrChange = FALSE;
// eVb: 2.3 [END]
//
// Check if the size of the data in the input buffer is large enough.
//
if (ModeSize < sizeof(VIDEO_MODE))
{
return ERROR_INSUFFICIENT_BUFFER;
}
//
// Extract the clear memory, and map linear bits.
//
RequestedModeNum = Mode->RequestedMode &
~(VIDEO_MODE_NO_ZERO_MEMORY | VIDEO_MODE_MAP_MEM_LINEAR);
if (!(Mode->RequestedMode & VIDEO_MODE_NO_ZERO_MEMORY))
{
#if defined(_X86_)
VgaZeroVideoMemory(HwDeviceExtension);
#endif
}
//
// Check to see if we are requesting a valid mode
//
// eVb: 2.4 [CIRRUS] - Remove Cirrus-specific check for valid mode
if ( (RequestedModeNum >= NumVideoModes) )
// eVb: 2.4 [END]
{
VideoDebugPrint((0, "Invalide Mode Number = %d!\n", RequestedModeNum));
return ERROR_INVALID_PARAMETER;
}
VideoDebugPrint((2, "Attempting to set mode %d\n",
RequestedModeNum));
// eVb: 2.5 [VBE] - Use dynamic VBE mode list instead of hard-coded VGA list
pRequestedMode = &VgaModeList[RequestedModeNum];
// eVb: 2.5 [END]
VideoDebugPrint((2, "Info on Requested Mode:\n"
"\tResolution: %dx%d\n",
pRequestedMode->hres,
pRequestedMode->vres ));
//
// VESA BIOS mode switch
//
// eVb: 2.6 [VBE] - VBE Mode Switch Support
status = VbeSetMode(HwDeviceExtension, pRequestedMode, PhysPtrChange);
if (status == ERROR_INVALID_FUNCTION)
{
//
// VGA mode switch
//
if (!pRequestedMode->CmdStream) return ERROR_INVALID_FUNCTION;
if (!VgaInterpretCmdStream(HwDeviceExtension, pRequestedMode->CmdStream)) return ERROR_INVALID_FUNCTION;
goto Cleanup;
}
else if (status != NO_ERROR) return status;
// eVb: 2.6 [END]
// eVb: 2.7 [MODE-X] - Windows VGA Miniport Supports Mode-X, we should too
//
// ModeX check
//
if (pRequestedMode->hres == 320)
{
VideoPortDebugPrint(0, "ModeX not support!!!\n");
return ERROR_INVALID_PARAMETER;
}
// eVb: 2.7 [END]
//
// Text mode check
//
if (!(pRequestedMode->fbType & VIDEO_MODE_GRAPHICS))
{
// eVb: 2.8 [TODO] - This code path is not implemented yet
VideoPortDebugPrint(0, "Text-mode not support!!!\n");
return ERROR_INVALID_PARAMETER;
// eVb: 2.8 [END]
}
Cleanup:
//
// Update the location of the physical frame buffer within video memory.
//
// eVb: 2.9 [VBE] - Linear and banked support is unified in VGA, unlike Cirrus
HwDeviceExtension->PhysicalVideoMemoryBase.LowPart = pRequestedMode->PhysBase;
HwDeviceExtension->PhysicalVideoMemoryLength = pRequestedMode->PhysSize;
HwDeviceExtension->PhysicalFrameLength =
pRequestedMode->FrameBufferSize;
HwDeviceExtension->PhysicalFrameOffset.LowPart =
pRequestedMode->FrameBufferBase;
// eVb: 2.9 [END]
//
// Store the new mode value.
//
HwDeviceExtension->CurrentMode = pRequestedMode;
HwDeviceExtension->ModeIndex = Mode->RequestedMode;
return NO_ERROR;
} //end VgaSetMode()
BOOLEAN
DGXStartIO(
PVOID HwDeviceExtension,
PVIDEO_REQUEST_PACKET RequestPacket
)
/*++
Routine Description:
This routine is the main execution routine for the miniport driver. It
acceptss a Video Request Packet, performs the request, and then returns
with the appropriate status.
Arguments:
HwDeviceExtension - Supplies a pointer to the miniport's device extension.
RequestPacket - Pointer to the video request packet. This structure
contains all the parameters passed to the VideoIoControl function.
Return Value:
--*/
{
PHW_DEVICE_EXTENSION hwDeviceExtension = HwDeviceExtension;
VP_STATUS status;
PVIDEO_MODE_INFORMATION modeInformation;
PVIDEO_MEMORY_INFORMATION memoryInformation;
ULONG inIoSpace, ulTemp;
PVIDEO_CLUT clutBuffer;
ULONG modeNumber;
PVIDEO_SHARE_MEMORY pShareMemory;
PVIDEO_SHARE_MEMORY_INFORMATION pShareMemoryInformation;
PHYSICAL_ADDRESS shareAddress;
PVOID virtualAddress;
ULONG sharedViewSize;
//
// Switch on the IoContolCode in the RequestPacket. It indicates which
// function must be performed by the driver.
//
switch (RequestPacket->IoControlCode) {
case IOCTL_VIDEO_SHARE_VIDEO_MEMORY:
VideoDebugPrint((2, "DGXStartIO - ShareVideoMemory\n"));
if ( (RequestPacket->OutputBufferLength < sizeof(VIDEO_SHARE_MEMORY_INFORMATION)) ||
(RequestPacket->InputBufferLength < sizeof(VIDEO_MEMORY)) ) {
status = ERROR_INSUFFICIENT_BUFFER;
break;
}
pShareMemory = RequestPacket->InputBuffer;
if ( (pShareMemory->ViewOffset > hwDeviceExtension->FrameLength) ||
((pShareMemory->ViewOffset + pShareMemory->ViewSize) >
hwDeviceExtension->FrameLength) ) {
status = ERROR_INVALID_PARAMETER;
break;
}
RequestPacket->StatusBlock->Information =
sizeof(VIDEO_SHARE_MEMORY_INFORMATION);
//
// Beware: the input buffer and the output buffer are the same
// buffer, and therefore data should not be copied from one to the
// other
//
virtualAddress = pShareMemory->ProcessHandle;
sharedViewSize = pShareMemory->ViewSize;
inIoSpace = 0;
//
// NOTE: we are ignoring ViewOffset
//
shareAddress.QuadPart =
hwDeviceExtension->PhysicalFrameAddress.QuadPart;
status = VideoPortMapMemory(hwDeviceExtension,
shareAddress,
&sharedViewSize,
&inIoSpace,
&virtualAddress);
pShareMemoryInformation = RequestPacket->OutputBuffer;
pShareMemoryInformation->SharedViewOffset = pShareMemory->ViewOffset;
pShareMemoryInformation->VirtualAddress = virtualAddress;
pShareMemoryInformation->SharedViewSize = sharedViewSize;
break;
case IOCTL_VIDEO_UNSHARE_VIDEO_MEMORY:
VideoDebugPrint((2, "DGXStartIO - UnshareVideoMemory\n"));
if (RequestPacket->InputBufferLength < sizeof(VIDEO_SHARE_MEMORY)) {
status = ERROR_INSUFFICIENT_BUFFER;
break;
}
pShareMemory = RequestPacket->InputBuffer;
status = VideoPortUnmapMemory(hwDeviceExtension,
pShareMemory->RequestedVirtualAddress,
pShareMemory->ProcessHandle);
break;
case IOCTL_VIDEO_MAP_VIDEO_MEMORY:
VideoDebugPrint((2, "DGXStartIO - MapVideoMemory\n"));
if ( (RequestPacket->OutputBufferLength < sizeof(VIDEO_MEMORY_INFORMATION)) ||
(RequestPacket->InputBufferLength < sizeof(VIDEO_MEMORY)) ) {
status = ERROR_INSUFFICIENT_BUFFER;
break;
}
RequestPacket->StatusBlock->Information = sizeof(VIDEO_MEMORY_INFORMATION);
memoryInformation = RequestPacket->OutputBuffer;
memoryInformation->VideoRamBase = ((PVIDEO_MEMORY)
(RequestPacket->InputBuffer))->RequestedVirtualAddress;
memoryInformation->VideoRamLength = hwDeviceExtension->FrameLength;
inIoSpace = 0;
status = VideoPortMapMemory(hwDeviceExtension,
hwDeviceExtension->PhysicalFrameAddress,
&(memoryInformation->VideoRamLength),
&inIoSpace,
&(memoryInformation->VideoRamBase));
//
// The frame buffer and virtual memory and equivalent in this
// case.
//
memoryInformation->FrameBufferBase = memoryInformation->VideoRamBase;
memoryInformation->FrameBufferLength = memoryInformation->VideoRamLength;
break;
case IOCTL_VIDEO_UNMAP_VIDEO_MEMORY:
VideoDebugPrint((2, "DGXStartIO - UnMapVideoMemory\n"));
if (RequestPacket->InputBufferLength < sizeof(VIDEO_MEMORY)) {
status = ERROR_INSUFFICIENT_BUFFER;
} else {
status = VideoPortUnmapMemory(hwDeviceExtension,
((PVIDEO_MEMORY)
(RequestPacket->InputBuffer))->
RequestedVirtualAddress,
0);
}
break;
case IOCTL_VIDEO_QUERY_CURRENT_MODE:
VideoDebugPrint((2, "DGXStartIO - QueryCurrentModes\n"));
modeInformation = RequestPacket->OutputBuffer;
if (RequestPacket->OutputBufferLength < sizeof(VIDEO_MODE_INFORMATION)) {
status = ERROR_INSUFFICIENT_BUFFER;
} else {
RequestPacket->StatusBlock->Information = sizeof(VIDEO_MODE_INFORMATION);
*((PVIDEO_MODE_INFORMATION)RequestPacket->OutputBuffer) =
DGXModes[hwDeviceExtension->CurrentModeNumber].modeInformation;
status = NO_ERROR;
}
break;
case IOCTL_VIDEO_QUERY_AVAIL_MODES:
{
UCHAR i;
VideoDebugPrint((2, "DGXStartIO - QueryAvailableModes\n"));
if (RequestPacket->OutputBufferLength <
hwDeviceExtension->NumValidModes * sizeof(VIDEO_MODE_INFORMATION)) {
status = ERROR_INSUFFICIENT_BUFFER;
} else {
RequestPacket->StatusBlock->Information =
hwDeviceExtension->NumValidModes * sizeof(VIDEO_MODE_INFORMATION);
modeInformation = RequestPacket->OutputBuffer;
for (i = 0; i < NumDGXModes; i++) {
if (DGXModes[i].bValid) {
*modeInformation = DGXModes[i].modeInformation;
modeInformation++;
}
}
status = NO_ERROR;
}
break;
}
case IOCTL_VIDEO_QUERY_NUM_AVAIL_MODES:
VideoDebugPrint((2, "DGXStartIO - QueryNumAvailableModes\n"));
//
// Find out the size of the data to be put in the the buffer and
// return that in the status information (whether or not the
// information is there). If the buffer passed in is not large
// enough return an appropriate error code.
//
// WARNING: This must be changed to take into account which monitor
// is present on the machine.
//
if (RequestPacket->OutputBufferLength < sizeof(VIDEO_NUM_MODES)) {
status = ERROR_INSUFFICIENT_BUFFER;
} else {
RequestPacket->StatusBlock->Information = sizeof(VIDEO_NUM_MODES);
((PVIDEO_NUM_MODES)RequestPacket->OutputBuffer)->NumModes =
hwDeviceExtension->NumValidModes;
((PVIDEO_NUM_MODES)RequestPacket->OutputBuffer)->ModeInformationLength =
sizeof(VIDEO_MODE_INFORMATION);
status = NO_ERROR;
}
break;
case IOCTL_VIDEO_SET_CURRENT_MODE:
VideoDebugPrint((2, "DGXStartIO - SetCurrentMode\n"));
//
// verify data
// WARNING: Make sure it is one of the valid modes on the list
// calculated using the monitor information.
//
modeNumber = ((PVIDEO_MODE)(RequestPacket->InputBuffer))->RequestedMode;
if ( (modeNumber >= hwDeviceExtension->NumValidModes) ||
(!DGXModes[modeNumber].bValid) ) {
status = ERROR_INVALID_PARAMETER;
break;
}
DevInitDGX(hwDeviceExtension,
(PULONG)DGXModes[modeNumber].pVData,
DGXModes[modeNumber].Count);
if (DGXModes[modeNumber].modeInformation.BitsPerPlane == 16) {
DevSet16BppPalette(hwDeviceExtension);
}
hwDeviceExtension->CurrentModeNumber = modeNumber;
status = NO_ERROR;
break;
case IOCTL_VIDEO_SET_COLOR_REGISTERS:
VideoDebugPrint((2, "DGXStartIO - SetColorRegs\n"));
clutBuffer = RequestPacket->InputBuffer;
//
// Check if the size of the data in the input buffer is large enough.
//
if ( (RequestPacket->InputBufferLength < sizeof(VIDEO_CLUT) -
sizeof(ULONG)) ||
(RequestPacket->InputBufferLength < sizeof(VIDEO_CLUT) +
(sizeof(ULONG) * (clutBuffer->NumEntries - 1)) ) ) {
status = ERROR_INSUFFICIENT_BUFFER;
break;
}
if (DGXModes[hwDeviceExtension->CurrentModeNumber].
modeInformation.BitsPerPlane == 8) {
DevSetPalette(hwDeviceExtension,
(PULONG)clutBuffer->LookupTable,
clutBuffer->FirstEntry,
clutBuffer->NumEntries);
status = NO_ERROR;
}
break;
case IOCTL_VIDEO_ENABLE_POINTER:
VideoDebugPrint((2, "DGXStartIO - EnablePointer\n"));
ulTemp = *hwDeviceExtension->pControlRegA;
ulTemp &= ~DAC_DISABLEPOINTER;
DacDelay();
*hwDeviceExtension->pControlRegA = ulTemp;
status = NO_ERROR;
break;
case IOCTL_VIDEO_DISABLE_POINTER:
VideoDebugPrint((2, "DGXStartIO - DisablePointer\n"));
DevPointerOff(hwDeviceExtension);
status = NO_ERROR;
break;
case IOCTL_VIDEO_SET_POINTER_POSITION:
{
PVIDEO_POINTER_POSITION pointerPosition;
VideoDebugPrint((2, "DGXStartIO - SetpointerPostion\n"));
pointerPosition = RequestPacket->InputBuffer;
//
// Check if the size of the data in the input buffer is large enough.
//
if (RequestPacket->InputBufferLength < sizeof(VIDEO_POINTER_POSITION)) {
status = ERROR_INSUFFICIENT_BUFFER;
} else {
hwDeviceExtension->ulPointerX = (ULONG)pointerPosition->Row;
hwDeviceExtension->ulPointerY = (ULONG)pointerPosition->Column;
DevSetPointerPos(hwDeviceExtension,
(ULONG)pointerPosition->Column,
(ULONG)pointerPosition->Row);
status = NO_ERROR;
}
break;
}
case IOCTL_VIDEO_QUERY_POINTER_POSITION:
{
PVIDEO_POINTER_POSITION pPointerPosition = RequestPacket->OutputBuffer;
VideoDebugPrint((2, "DGXStartIO - QuerypointerPostion\n"));
//
// Make sure the output buffer is big enough.
//
if (RequestPacket->OutputBufferLength < sizeof(VIDEO_POINTER_POSITION)) {
RequestPacket->StatusBlock->Information = 0;
return ERROR_INSUFFICIENT_BUFFER;
}
//
// Return the pointer position
//
RequestPacket->StatusBlock->Information = sizeof(VIDEO_POINTER_POSITION);
pPointerPosition->Row = (SHORT)hwDeviceExtension->ulPointerX;
pPointerPosition->Column = (SHORT)hwDeviceExtension->ulPointerY;
status = NO_ERROR;
break;
}
case IOCTL_VIDEO_SET_POINTER_ATTR:
{
PVIDEO_POINTER_ATTRIBUTES pointerAttributes;
USHORT *pHWCursorShape; // Temp Buffer
USHORT *pHWCursorAddr; // DAC buffer
ULONG iCount = 512;
VideoDebugPrint((2, "DGXStartIO - SetPointerAttributes\n"));
pointerAttributes = RequestPacket->InputBuffer;
//
// Check if the size of the data in the input buffer is large enough.
//
if (RequestPacket->InputBufferLength <
(sizeof(VIDEO_POINTER_ATTRIBUTES) + ((sizeof(UCHAR) *
(CURSOR_WIDTH/8) * CURSOR_HEIGHT) * 2))) {
status = ERROR_INSUFFICIENT_BUFFER;
break;
}
//
// If the specified cursor width or height is not valid, then
// return an invalid parameter error.
//
if ((pointerAttributes->Width > CURSOR_WIDTH) ||
(pointerAttributes->Height > CURSOR_HEIGHT)) {
status = ERROR_INVALID_PARAMETER;
break;
}
//
// Try to copy the pointer to our buffer. When we copy it
// we convert it to our 2bpp format. If sucessfull, then
// copy it to the DAC and set the position.
//
if (!(pointerAttributes->Flags & VIDEO_MODE_ANIMATE_UPDATE)) {
DevPointerOff(hwDeviceExtension);
}
if (pointerAttributes->Flags & VIDEO_MODE_MONO_POINTER) {
if (CopyMonoCursor(hwDeviceExtension,
(PUCHAR)&pointerAttributes->Pixels[0])) {
pHWCursorAddr = (USHORT *)hwDeviceExtension->pHardWareCursorAddr;
pHWCursorShape = (USHORT *)&hwDeviceExtension->HardwareCursorShape[0];
while (iCount--) {
*pHWCursorAddr++ = *pHWCursorShape++;
pHWCursorAddr++;
DacDelay();
}
DevSetPointerPos(hwDeviceExtension,
(ULONG)pointerAttributes->Column,
(ULONG)pointerAttributes->Row);
status = NO_ERROR;
break;
}
}
//
// Something failed. Remove the current HW Cursor.
//
DevPointerOff(hwDeviceExtension);
status = ERROR_INVALID_PARAMETER;
break;
}
case IOCTL_VIDEO_QUERY_POINTER_CAPABILITIES:
{
PVIDEO_POINTER_CAPABILITIES pointerCaps = RequestPacket->OutputBuffer;
VideoDebugPrint((2, "DGXStartIO - QueryPointerCapabilities\n"));
if (RequestPacket->OutputBufferLength < sizeof(VIDEO_POINTER_CAPABILITIES)) {
RequestPacket->StatusBlock->Information = 0;
status = ERROR_INSUFFICIENT_BUFFER;
}
pointerCaps->Flags = VIDEO_MODE_ASYNC_POINTER | VIDEO_MODE_MONO_POINTER;
pointerCaps->MaxWidth = CURSOR_WIDTH;
pointerCaps->MaxHeight = CURSOR_HEIGHT;
pointerCaps->HWPtrBitmapStart = 0; // No VRAM storage for pointer
pointerCaps->HWPtrBitmapEnd = 0;
//
// Number of bytes we're returning.
//
RequestPacket->StatusBlock->Information = sizeof(VIDEO_POINTER_CAPABILITIES);
status = NO_ERROR;
break;
}
case IOCTL_VIDEO_RESET_DEVICE:
VideoDebugPrint((2, "DGXStartIO - RESET_DEVICE\n"));
DevDisableDGX(hwDeviceExtension);
status = NO_ERROR;
break;
//
// if we get here, an invalid IoControlCode was specified.
//
default:
VideoDebugPrint((1, "Fell through DGX startIO routine - invalid command\n"));
status = ERROR_INVALID_FUNCTION;
break;
}
RequestPacket->StatusBlock->Status = status;
return TRUE;
} // end DGXStartIO() z
VP_STATUS ShareVideoMemory_m(PVIDEO_REQUEST_PACKET RequestPacket, struct query_structure *QueryPtr)
{
PVIDEO_SHARE_MEMORY InputPtr; /* Pointer to input structure */
PVIDEO_SHARE_MEMORY_INFORMATION OutputPtr; /* Pointer to output structure */
PHYSICAL_ADDRESS ShareAddress; /* Physical address of video memory */
PVOID VirtualAddress; /* Virtual address to map video memory at */
ULONG SharedViewSize; /* Size of block to share */
ULONG SpaceType; /* Sparse or dense space? */
VP_STATUS Status; /* Status to return */
/*
* We can only share the aperture with application programs if there
* is an aperture available. If both the LFB and the on-board VGA
* and therefore the VGA aperture) are disabled, report that we
* can't share the aperture.
*/
if ((QueryPtr->q_aperture_cfg == 0) && (QueryPtr->q_VGA_type == 0))
return ERROR_INVALID_FUNCTION;
InputPtr = RequestPacket->InputBuffer;
if ((InputPtr->ViewOffset > phwDeviceExtension->VideoRamSize) ||
((InputPtr->ViewOffset + InputPtr->ViewSize) > phwDeviceExtension->VideoRamSize))
{
VideoDebugPrint((DEBUG_ERROR, "ShareVideoMemory_m() - access beyond video memory\n"));
return ERROR_INVALID_PARAMETER;
}
RequestPacket->StatusBlock->Information = sizeof(VIDEO_SHARE_MEMORY_INFORMATION);
/*
* Beware: the input buffer and the output buffer are the same buffer,
* and therefore data should not be copied from one to the other.
*/
VirtualAddress = InputPtr->ProcessHandle;
SharedViewSize = InputPtr->ViewSize;
SpaceType = 0;
#if defined(_ALPHA_)
/*
* Use dense space mapping whenever we can, because that will
* allow us to support DCI and direct GDI access.
*
* Dense space is extremely slow with ISA cards on the newer Alphas,
* because any byte- or word-write requires a read/modify/write
* operation, and the ALpha can only ever do 64-bit reads when in
* dense mode. As a result, these operations would always require
* 4 reads and 2 writes on the ISA bus. Also, some older Alphas
* don't support dense space mapping.
*
* Any Alpha that supports PCI can support dense space mapping, and
* because the bus is wider and faster, the read/modify/write has
* less of an impact on performance.
*/
if (QueryPtr->q_bus_type == BUS_PCI)
SpaceType = 4;
#endif
/*
* NOTE: we are ignoring ViewOffset
*/
ShareAddress.QuadPart = phwDeviceExtension->PhysicalFrameAddress.QuadPart;
/*
* If the LFB is enabled, use ordinary mapping. If we have only
* the paged aperture, we must map to banked memory. Since the
* LFB is always aligned on a 1M boundary (4M boundary for 4M
* aperture), this check for the paged aperture will never falsely
* detect a LFB as paged.
*/
if (phwDeviceExtension->PhysicalFrameAddress.LowPart == 0x0A0000)
{
/*
* On some versions of the DDK, VideoPortMapBankedMemory() is
* not available. If this is the case, force an error.
* This routine should be available in all versions of
* the DDK which support DCI, since it is used for DCI
* support on cards with banked apertures.
*/
#if defined(IOCTL_VIDEO_SHARE_VIDEO_MEMORY)
Status = VideoPortMapBankedMemory(
phwDeviceExtension,
ShareAddress,
&SharedViewSize,
&SpaceType,
&VirtualAddress,
0x10000, /* 64k VGA aperture */
FALSE, /* No separate read/write banks */
BankMap_m, /* Our bank-mapping routine */
(PVOID) phwDeviceExtension);
#else
Status = ERROR_INVALID_FUNCTION;
#endif
}
else /* LFB */
{
Status = VideoPortMapMemory(phwDeviceExtension,
ShareAddress,
&SharedViewSize,
&SpaceType,
&VirtualAddress);
}
OutputPtr = RequestPacket->OutputBuffer;
OutputPtr->SharedViewOffset = InputPtr->ViewOffset;
OutputPtr->VirtualAddress = VirtualAddress;
OutputPtr->SharedViewSize = SharedViewSize;
return Status;
} /* ShareVideoMemory_m() */
BOOLEAN
P91Bt489SetMode(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
Routine Description:
Initializes the DAC for the current mode.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
Return Value:
None.
--*/
{
USHORT usLoadClock;
UCHAR ucCurState;
VideoDebugPrint((0, "P91Bt489SetMode----------\n"));
// Added per code received from R. Embry
WriteDAC(HwDeviceExtension, PIXEL_MSK_REG, 0xff);
//
// Enable 8bit dacs, allow access to Command Register 3.
//
//
// Enable accesses to CMD_REG_3. For the Power 9100, to access command
// register 3, you must have CR07 TRUE and you must load a one into
// the address register.
//
if (IS_DEV_P9100)
P9_WR_REG(P9100_RAMWRITE, 0x01);
WriteDAC(HwDeviceExtension, CMD_REG_0, ENB_CMD_REG_3 | MODE_8_BIT);
//
// Set the DAC Pixel port value for the current bit depth.
// Note: The BT485 does not support 24bpp mode.
//
switch (HwDeviceExtension->usBitsPixel)
{
case 8:
WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_8);
WR_CMD_REG_4( CR4_MUX_81 );
break;
case 16: // This is really 555, not 565...
WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_15);
WR_CMD_REG_4( CR4_MUX_41 );
break;
case 24:
WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_32);
WR_CMD_REG_4(CR4_MUX_24BPP);
break;
case 32:
WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_32);
WR_CMD_REG_4( CR4_MUX_21 );
break;
default:
//
// Oops..invalid BPP value. Use 8BPP value for now.
//
WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_8);
WR_CMD_REG_4( CR4_MUX_81 );
break;
};
// This code added per R. Embry from ECR 2/95
usLoadClock = (USHORT) ((HwDeviceExtension->VideoData.dotfreq1 /
HwDeviceExtension->Dac.usRamdacWidth) *
HwDeviceExtension->usBitsPixel);
if ( usLoadClock > 4850 )
{
ucCurState = SCLK_INV; // Bt489 - invert SCLK if in forbidden region
}
else
{
ucCurState = 0;
}
//
// Select P9x00 video clock, disable cursor
//
WriteDAC( HwDeviceExtension, CMD_REG_2,
(UCHAR)(ucCurState | ((PORTSEL_MSKD | PCLK1_SEL) & DIS_CURS)) );
//
// Select 32x32x2 cursor mode, and clock doubler mode if neccessary.
//
RD_CMD_REG_3(ucCurState);
if (HwDeviceExtension->VideoData.dotfreq1 >
HwDeviceExtension->Dac.ulMaxClkFreq)
{
//
// Enable the DAC clock doubler mode.
//
HwDeviceExtension->Dac.DACSetClkDblMode(HwDeviceExtension);
}
else
{
//
// Disable the DAC clock doubler mode.
//
HwDeviceExtension->Dac.DACClrClkDblMode(HwDeviceExtension);
}
//
// Set the pixel read mask.
//
WriteDAC(HwDeviceExtension, PIXEL_MSK_REG, 0xff);
//
// Set cursor colors 1 and 2.
//
WriteDAC(HwDeviceExtension, CURS_CLR_ADDR, 1);
WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0x00);
WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0x00);
WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0x00);
WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0xFF);
WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0xFF);
WriteDAC(HwDeviceExtension, CURS_CLR_DATA, 0xFF);
return(TRUE);
}
/* Set the device power state. */
VP_STATUS HwSetPowerState( PVOID HwDevExt, ULONG HwId,
PVIDEO_POWER_MANAGEMENT VideoPowerControl )
{
VideoDebugPrint( (1, "videomp: HwSetPowerState\n") );
return( NO_ERROR );
}
VP_STATUS
VgaSetMode(
PHW_DEVICE_EXTENSION HwDeviceExtension,
PVIDEO_MODE Mode,
ULONG ModeSize
)
/*++
Routine Description:
This routine sets the VGA into the requested mode.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
Mode - Pointer to the structure containing the information about the
font to be set.
ModeSize - Length of the input buffer supplied by the user.
Return Value:
ERROR_INSUFFICIENT_BUFFER if the input buffer was not large enough
for the input data.
ERROR_INVALID_PARAMETER if the mode number is invalid.
NO_ERROR if the operation completed successfully.
--*/
{
PVIDEOMODE pRequestedMode;
VP_STATUS status;
//
// Check if the size of the data in the input buffer is large enough.
//
if (ModeSize < sizeof(VIDEO_MODE)) {
return ERROR_INSUFFICIENT_BUFFER;
}
//
// Extract the clear memory bit.
//
if (Mode->RequestedMode & VIDEO_MODE_NO_ZERO_MEMORY) {
Mode->RequestedMode &= ~VIDEO_MODE_NO_ZERO_MEMORY;
} else {
VgaZeroVideoMemory(HwDeviceExtension);
}
//
// Check to see if we are requesting a valid mode
//
if ((Mode->RequestedMode >= NUM_VIDEO_MODES) ||
(!ModesVGA[Mode->RequestedMode].ValidMode)) {
VideoDebugPrint((0,"AVGA.sys: VGASetMode - ERROR_INVALID_PARAMETER.\n"));
return ERROR_INVALID_PARAMETER;
}
pRequestedMode = &ModesVGA[Mode->RequestedMode];
HwDeviceExtension->ModeIndex = Mode->RequestedMode;
//
// Store the new mode value.
//
HwDeviceExtension->CurrentMode = pRequestedMode;
#ifdef INT10_MODE_SET
{
VIDEO_X86_BIOS_ARGUMENTS biosArguments;
UCHAR temp;
UCHAR dummy;
UCHAR bIsColor;
/***********************************************************************
*** There appears to be a problem with some application ***
*** which reset the first 16 palette registers. ***
*** Since the palette is not reset when going to and ***
*** from text modes by doing a set mode (instead of ***
*** the hardware save restore), some colors might not ***
*** appear as expected in the text modes. The bios ***
*** calls seem to reload the palette so Andre Vachon ***
*** suggested that we implement an Int10 mode set for the ***
*** text modes. ***
*** To accomplish this, we need to hard code the first ***
*** three modes in modeset.h in the following switch. ***
*** If more text modes are added to modeset.h, their ***
*** index must be added to this switch statement. ***
***********************************************************************/
VideoPortZeroMemory(&biosArguments, sizeof(VIDEO_X86_BIOS_ARGUMENTS));
switch (Mode->RequestedMode) {
case 0: // 720x400
/***********************************************************************
*** Prepare the card for the VGA mode 3+ instead of the CGA mode 3 ***
***********************************************************************/
biosArguments.Eax = 0x1202; // Select Scan line number
biosArguments.Ebx = 0x0030; // to be 400 scan lines
status = VideoPortInt10(HwDeviceExtension, &biosArguments);
/***********************************************************************
*** Set the video mode to BIOS mode 3. ***
***********************************************************************/
VideoPortZeroMemory(&biosArguments, sizeof(VIDEO_X86_BIOS_ARGUMENTS));
biosArguments.Eax = 0x03; // bios mode 0x03
status = VideoPortInt10(HwDeviceExtension, &biosArguments);
break;
case 1: // 640x350
/***********************************************************************
*** Prepare the card for the EGA mode 3* instead of the CGA mode 3 ***
***********************************************************************/
biosArguments.Eax = 0x1201; // Select Scan line number
biosArguments.Ebx = 0x0030; // to be 350 scan lines
status = VideoPortInt10(HwDeviceExtension, &biosArguments);
/***********************************************************************
*** Set the video mode to BIOS mode 3. ***
***********************************************************************/
VideoPortZeroMemory(&biosArguments, sizeof(VIDEO_X86_BIOS_ARGUMENTS));
biosArguments.Eax = 0x03; // bios mode 0x03
status = VideoPortInt10(HwDeviceExtension, &biosArguments);
break;
default: // all graphics modes are
// handled by the default case
biosArguments.Eax = pRequestedMode->Int10ModeNumber;
status = VideoPortInt10(HwDeviceExtension, &biosArguments);
break;
}
if (status != NO_ERROR) {
return status;
}
//
// Fix to get 640x350 text mode
//
if (!(pRequestedMode->fbType & VIDEO_MODE_GRAPHICS)) {
// if ((pRequestedMode->hres == 640) &&
// (pRequestedMode->vres == 350)) {
//
// VgaInterpretCmdStream(HwDeviceExtension, VGA_TEXT_1);
//
// } else {
//
// Fix to make sure we always set the colors in text mode to be
// intensity, and not flashing
// For this zero out the Mode Control Regsiter bit 3 (index 0x10
// of the Attribute controller).
//
if (VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
MISC_OUTPUT_REG_READ_PORT) & 0x01) {
bIsColor = TRUE;
} else {
bIsColor = FALSE;
}
if (bIsColor) {
dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
INPUT_STATUS_1_COLOR);
} else {
dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
INPUT_STATUS_1_MONO);
}
VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
ATT_ADDRESS_PORT, (0x10 | VIDEO_ENABLE));
temp = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
ATT_DATA_READ_PORT);
temp &= 0xF7;
if (bIsColor) {
dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
INPUT_STATUS_1_COLOR);
} else {
dummy = VideoPortReadPortUchar(HwDeviceExtension->IOAddress +
INPUT_STATUS_1_MONO);
}
VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
ATT_ADDRESS_PORT, (0x10 | VIDEO_ENABLE));
VideoPortWritePortUchar(HwDeviceExtension->IOAddress +
ATT_DATA_WRITE_PORT, temp);
// }
}
}
#else
VgaInterpretCmdStream(HwDeviceExtension, pRequestedMode->CmdStrings);
#endif
//
// Update the location of the physical frame buffer within video memory.
//
HwDeviceExtension->PhysicalFrameLength =
MemoryMaps[pRequestedMode->MemMap].MaxSize;
HwDeviceExtension->PhysicalFrameBase.LowPart =
MemoryMaps[pRequestedMode->MemMap].Start;
return NO_ERROR;
} // end VgaSetMode()
BOOLEAN
A8514StartIO(
PVOID HwDeviceExtension,
PVIDEO_REQUEST_PACKET RequestPacket
)
/*++
Routine Description:
This routine is the main execution routine for the miniport driver. It
accepts a Video Request Packet, performs the request, and then returns
with the appropriate status.
Arguments:
HwDeviceExtension - Supplies a pointer to the miniport's device extension.
RequestPacket - Pointer to the video request packet. This structure
contains all the parameters passed to the VideoIoControl function.
Return Value:
--*/
{
PHW_DEVICE_EXTENSION hwDeviceExtension = HwDeviceExtension;
VP_STATUS status;
PVIDEO_MODE_INFORMATION modeInformation;
PVIDEO_MEMORY_INFORMATION memoryInformation;
PVIDEO_CLUT clutBuffer;
ULONG modeNumber;
VIDEO_MODE_INFORMATION A8514ModeInformation =
{
sizeof(VIDEO_MODE_INFORMATION), // Size of the mode informtion structure
0, // Mode index used in setting the mode
1024, // X Resolution, in pixels
768, // Y Resolution, in pixels
1024, // Screen stride, in bytes (distance
// between the start point of two
// consecutive scan lines, in bytes)
1, // Number of video memory planes
8, // Number of bits per plane
1, // Screen Frequency, in Hertz
320, // Horizontal size of screen in millimeters
240, // Vertical size of screen in millimeters
6, // Number Red pixels in DAC
6, // Number Green pixels in DAC
6, // Number Blue pixels in DAC
0x00000000, // Mask for Red Pixels in non-palette modes
0x00000000, // Mask for Green Pixels in non-palette modes
0x00000000, // Mask for Blue Pixels in non-palette modes
VIDEO_MODE_COLOR | VIDEO_MODE_GRAPHICS | VIDEO_MODE_PALETTE_DRIVEN |
VIDEO_MODE_MANAGED_PALETTE, // Mode description flags.
1024, // Video Memory Bitmap Width
1024 // Video Memory Bitmap Height
};
//
// Assume we'll succeed.
//
status = NO_ERROR;
//
// Switch on the IoContolCode in the RequestPacket. It indicates which
// function must be performed by the driver.
//
switch (RequestPacket->IoControlCode) {
case IOCTL_VIDEO_MAP_VIDEO_MEMORY:
VideoDebugPrint((2, "A8514tartIO - MapVideoMemory\n"));
if ( (RequestPacket->OutputBufferLength <
(RequestPacket->StatusBlock->Information =
sizeof(VIDEO_MEMORY_INFORMATION))) ||
(RequestPacket->InputBufferLength < sizeof(VIDEO_MEMORY)) ) {
status = ERROR_INSUFFICIENT_BUFFER;
break;
}
memoryInformation = RequestPacket->OutputBuffer;
//
// The only field we need to fill is VideoRamLength. With this
// miniport, we support only one meg 8514/A's:
//
memoryInformation->VideoRamLength = 0x100000;
memoryInformation->FrameBufferBase = NULL;
memoryInformation->FrameBufferLength = 0;
break;
case IOCTL_VIDEO_UNMAP_VIDEO_MEMORY:
break;
case IOCTL_VIDEO_QUERY_AVAIL_MODES:
VideoDebugPrint((2, "A8514StartIO - QueryAvailableModes\n"));
if (RequestPacket->OutputBufferLength <
(RequestPacket->StatusBlock->Information =
sizeof(VIDEO_MODE_INFORMATION)) ) {
status = ERROR_INSUFFICIENT_BUFFER;
} else {
modeInformation = RequestPacket->OutputBuffer;
*modeInformation = A8514ModeInformation;
}
break;
case IOCTL_VIDEO_QUERY_CURRENT_MODE:
VideoDebugPrint((2, "A8514StartIO - QueryCurrentModes\n"));
if (RequestPacket->OutputBufferLength <
(RequestPacket->StatusBlock->Information =
sizeof(VIDEO_MODE_INFORMATION)) ) {
status = ERROR_INSUFFICIENT_BUFFER;
} else {
*((PVIDEO_MODE_INFORMATION)RequestPacket->OutputBuffer) =
A8514ModeInformation;
}
break;
case IOCTL_VIDEO_QUERY_NUM_AVAIL_MODES:
VideoDebugPrint((2, "A8514StartIO - QueryNumAvailableModes\n"));
//
// Find out the size of the data to be put in the the buffer and
// return that in the status information (whether or not the
// information is there). If the buffer passed in is not large
// enough return an appropriate error code.
//
if (RequestPacket->OutputBufferLength <
(RequestPacket->StatusBlock->Information =
sizeof(VIDEO_NUM_MODES)) ) {
status = ERROR_INSUFFICIENT_BUFFER;
} else {
((PVIDEO_NUM_MODES)RequestPacket->OutputBuffer)->NumModes = 1;
((PVIDEO_NUM_MODES)RequestPacket->OutputBuffer)->ModeInformationLength =
sizeof(VIDEO_MODE_INFORMATION);
}
break;
case IOCTL_VIDEO_SET_CURRENT_MODE:
VideoDebugPrint((2, "A8514StartIO - SetCurrentMode\n"));
//
// Check if the size of the data in the input buffer is large enough.
//
if (RequestPacket->InputBufferLength < sizeof(VIDEO_MODE)) {
status = ERROR_INSUFFICIENT_BUFFER;
break;
}
//
// Check to see if we are requesting a valid mode
//
modeNumber = ((PVIDEO_MODE) RequestPacket->InputBuffer)->RequestedMode;
if (modeNumber >= 1) {
status = ERROR_INVALID_PARAMETER;
break;
}
//
// Reset the draw engine.
//
OUTPW(hwDeviceExtension, INDEX_SUBSYS_CNTL, 0x9000);
OUTPW(hwDeviceExtension, INDEX_SUBSYS_CNTL, 0x5000);
//
// Mode setting courtesy of p. 2-2, "Programmer's Guide to the
// Mach-8 Extended Registers Supplement, Technical Reference
// Manuals," ATI Technologies Inc., 1992 and pp 276-278, "Graphics
// Programming for the 8514/A," Jake Richter and Bud Smith, M & T
// Publishing, 1990.
//
OUTPW(hwDeviceExtension, INDEX_DISP_CNTL, 0x0053);
OUTPW(hwDeviceExtension, INDEX_H_TOTAL, 0x009d);
OUTPW(hwDeviceExtension, INDEX_H_DISP, 0x007f);
OUTPW(hwDeviceExtension, INDEX_H_SYNC_STRT, 0x0081);
OUTPW(hwDeviceExtension, INDEX_H_SYNC_WID, 0x0016);
OUTPW(hwDeviceExtension, INDEX_V_TOTAL, 0x0660);
OUTPW(hwDeviceExtension, INDEX_V_DISP, 0x05fb);
OUTPW(hwDeviceExtension, INDEX_V_SYNC_STRT, 0x0600);
OUTPW(hwDeviceExtension, INDEX_V_SYNC_WID, 0x0008);
OUTPW(hwDeviceExtension, INDEX_ADVFUNC_CNTL, 0x0007);
OUTPW(hwDeviceExtension, INDEX_DISP_CNTL, 0x0033);
OUTPW(hwDeviceExtension, INDEX_MEM_CNTL, 0x500c);
OUTP(hwDeviceExtension, INDEX_DAC_MASK, 0xff);
//
// Initialize some drawing registers.
//
while (INPW(hwDeviceExtension, INDEX_GE_STAT) & FIFO_6_EMPTY)
;
OUTPW(hwDeviceExtension, INDEX_PIX_CNTL, 0x5006);
OUTPW(hwDeviceExtension, INDEX_SCISSORS_T, 0x1000);
OUTPW(hwDeviceExtension, INDEX_SCISSORS_L, 0x2000);
OUTPW(hwDeviceExtension, INDEX_SCISSORS_B, 0x35ff);
OUTPW(hwDeviceExtension, INDEX_SCISSORS_R, 0x45ff);
OUTPW(hwDeviceExtension, INDEX_WRT_MASK, 0xff);
//
// Black out the screen so that we don't display garbage until the
// display driver has a chance to clear everything.
//
while (INPW(hwDeviceExtension, INDEX_GE_STAT) & FIFO_7_EMPTY)
;
OUTPW(hwDeviceExtension, INDEX_PIX_CNTL, 0xa000); // ALL_ONES
OUTPW(hwDeviceExtension, INDEX_FRGD_MIX, 0x0001); // LOGICAL_0
OUTPW(hwDeviceExtension, INDEX_CUR_X, 0);
OUTPW(hwDeviceExtension, INDEX_CUR_Y, 0);
OUTPW(hwDeviceExtension, INDEX_MAJ_AXIS_PCNT, 0x05ff);
OUTPW(hwDeviceExtension, INDEX_MIN_AXIS_PCNT, 0x05ff);
OUTPW(hwDeviceExtension, INDEX_CMD, 0x40b3);
// ( RECTANGLE_FILL | DRAWING_DIR_TBLRXM | DRAW |
// MULTIPLE_PIXELS | WRITE )
break;
case IOCTL_VIDEO_SET_COLOR_REGISTERS:
VideoDebugPrint((2, "A8514StartIO - SetColorRegs\n"));
clutBuffer = RequestPacket->InputBuffer;
status = A8514SetColorLookup(HwDeviceExtension,
(PVIDEO_CLUT) RequestPacket->InputBuffer,
RequestPacket->InputBufferLength);
break;
case IOCTL_VIDEO_RESET_DEVICE:
VideoDebugPrint((2, "A8514StartIO - RESET_DEVICE\n"));
//
// Wait for the 8514/A graphics engine to become idle.
//
while (INPW(hwDeviceExtension, INDEX_GE_STAT) & 0x0200);
//
// Enable VGA pass-through.
//
OUTPW(hwDeviceExtension, INDEX_ADVFUNC_CNTL, 0x0006);
break;
//
// if we get here, an invalid IoControlCode was specified.
//
default:
VideoDebugPrint((1, "Fell through A8514 startIO routine - invalid command\n"));
status = ERROR_INVALID_FUNCTION;
break;
}
VideoDebugPrint((2, "Leaving A8514 startIO routine\n"));
RequestPacket->StatusBlock->Status = status;
return TRUE;
} // end A8514StartIO()
VP_STATUS
A8514FindAdapter(
PVOID HwDeviceExtension,
PVOID HwContext,
PWSTR ArgumentString,
PVIDEO_PORT_CONFIG_INFO ConfigInfo,
PUCHAR Again
)
/*++
Routine Description:
This routine is called to determine if the adapter for this driver
is present in the system.
If it is present, the function fills out some information describing
the adapter.
Arguments:
HwDeviceExtension - Supplies the miniport driver's adapter storage. This
storage is initialized to zero before this call.
HwContext - Supplies the context value which was passed to
VideoPortInitialize().
ArgumentString - Suuplies a NULL terminated ASCII string. This string
originates from the user.
ConfigInfo - Returns the configuration information structure which is
filled by the miniport driver. This structure is initialized with
any knwon configuration information (such as SystemIoBusNumber) by
the port driver. Where possible, drivers should have one set of
defaults which do not require any supplied configuration information.
Again - Indicates if the miniport driver wants the port driver to call
its VIDEO_HW_FIND_ADAPTER function again with a new device extension
and the same config info. This is used by the miniport drivers which
can search for several adapters on a bus.
Return Value:
This routine must return:
NO_ERROR - Indicates a host adapter was found and the
configuration information was successfully determined.
ERROR_INVALID_PARAMETER - Indicates an adapter was found but there was an
error obtaining the configuration information. If possible an error
should be logged.
ERROR_DEV_NOT_EXIST - Indicates no host adapter was found for the
supplied configuration information.
--*/
{
PHW_DEVICE_EXTENSION hwDeviceExtension = HwDeviceExtension;
ULONG i;
VP_STATUS status;
USHORT SubSysCntlRegisterValue;
USHORT ErrTermRegisterValue;
USHORT SubSysStat;
USHORT ErrTerm5555;
USHORT ErrTermAAAA;
VIDEO_ACCESS_RANGE accessRange[] = {
{ PORT_H_TOTAL, 0, 2, 1, 1, 0}, // INDEX_H_TOTAL
{ PORT_H_DISP, 0, 2, 1, 1, 0}, // INDEX_H_DISP
{ PORT_H_SYNC_STRT, 0, 2, 1, 1, 0}, // INDEX_H_SYNC_STRT
{ PORT_H_SYNC_WID, 0, 2, 1, 1, 0}, // INDEX_H_SYNC_WID
{ PORT_V_TOTAL, 0, 2, 1, 1, 0}, // INDEX_V_TOTAL
{ PORT_V_DISP, 0, 2, 1, 1, 0}, // INDEX_V_DISP
{ PORT_V_SYNC_STRT, 0, 2, 1, 1, 0}, // INDEX_V_SYNC_STRT
{ PORT_V_SYNC_WID, 0, 2, 1, 1, 0}, // INDEX_V_SYNC_WID
{ PORT_ADVFUNC_CNTL, 0, 2, 1, 1, 0}, // INDEX_ADVFUNC_CNTL
{ PORT_MEM_CNTL, 0, 2, 1, 1, 0}, // INDEX_MEM_CNTL
{ PORT_DAC_MASK, 0, 2, 1, 1, 0}, // INDEX_DAC_MASK
{ PORT_SUBSYS_CNTL, 0, 2, 1, 1, 0}, // INDEX_SUBSYS_CNTL
{ PORT_DISP_CNTL, 0, 2, 1, 1, 0}, // INDEX_DISP_CNTL
{ PORT_SUBSYS_STATUS, 0, 2, 1, 1, 0}, // INDEX_SUBSYS_STATUS
{ PORT_GE_STAT, 0, 2, 1, 1, 0}, // INDEX_GE_STAT
{ PORT_DAC_W_INDEX, 0, 2, 1, 1, 0}, // INDEX_DAC_W_INDEX
{ PORT_DAC_DATA, 0, 2, 1, 1, 0}, // INDEX_DAC_DATA
{ PORT_CUR_Y, 0, 2, 1, 1, 0}, // INDEX_CUR_Y
{ PORT_CUR_X, 0, 2, 1, 1, 0}, // INDEX_CUR_X
{ PORT_DEST_Y, 0, 2, 1, 1, 0}, // INDEX_DEST_Y
{ PORT_DEST_X, 0, 2, 1, 1, 0}, // INDEX_DEST_X
{ PORT_AXSTP, 0, 2, 1, 1, 0}, // INDEX_AXSTP
{ PORT_DIASTP, 0, 2, 1, 1, 0}, // INDEX_DIASTP
{ PORT_ERR_TERM, 0, 2, 1, 1, 0}, // INDEX_ERR_TERM
{ PORT_MAJ_AXIS_PCNT, 0, 2, 1, 1, 0}, // INDEX_MAJ_AXIS_PCNT
{ PORT_CMD, 0, 2, 1, 1, 0}, // INDEX_CMD
{ PORT_SHORT_STROKE, 0, 2, 1, 1, 0}, // INDEX_SHORT_STROKE
{ PORT_BKGD_COLOR, 0, 2, 1, 1, 0}, // INDEX_BKGD_COLOR
{ PORT_FRGD_COLOR, 0, 2, 1, 1, 0}, // INDEX_FRGD_COLOR
{ PORT_WRT_MASK, 0, 2, 1, 1, 0}, // INDEX_WRT_MASK
{ PORT_RD_MASK, 0, 2, 1, 1, 0}, // INDEX_RD_MASK
{ PORT_COLOR_CMP, 0, 2, 1, 1, 0}, // INDEX_COLOR_CMP
{ PORT_BKGD_MIX, 0, 2, 1, 1, 0}, // INDEX_BKGD_MIX
{ PORT_FRGD_MIX, 0, 2, 1, 1, 0}, // INDEX_FRGD_MIX
{ PORT_MULTIFUNC_CNTL, 0, 2, 1, 1, 0}, // INDEX_MULTIFUNC_CNTL
{ PORT_MIN_AXIS_PCNT, 0, 2, 1, 1, 0}, // INDEX_MIN_AXIS_PCNT
{ PORT_SCISSORS_T, 0, 2, 1, 1, 0}, // INDEX_SCISSORS_T
{ PORT_SCISSORS_L, 0, 2, 1, 1, 0}, // INDEX_SCISSORS_L
{ PORT_SCISSORS_B, 0, 2, 1, 1, 0}, // INDEX_SCISSORS_B
{ PORT_SCISSORS_R, 0, 2, 1, 1, 0}, // INDEX_SCISSORS_R
{ PORT_PIX_CNTL, 0, 2, 1, 1, 0}, // INDEX_PIX_CNTL
{ PORT_PIX_TRANS, 0, 2, 1, 1, 0} // INDEX_PIX_TRANS
};
VideoDebugPrint((2, "8514/A: Running A8514FindAdapter\n"));
//
// Make sure the size of the structure is at least as large as what we
// are expecting (check version of the config info structure).
//
if (ConfigInfo->Length < sizeof(VIDEO_PORT_CONFIG_INFO)) {
return (ERROR_INVALID_PARAMETER);
}
//
// Check to see if there is a hardware resource conflict.
//
status = VideoPortVerifyAccessRanges(hwDeviceExtension,
NUM_A8514_ACCESS_RANGES,
accessRange);
if (status != NO_ERROR) {
VideoDebugPrint((1, "8514/A: Access Range conflict\n"));
return status;
}
//
// Get the mapped addresses for all the registers.
//
for (i = 0; i < NUM_A8514_ACCESS_RANGES; i++) {
if ( (hwDeviceExtension->MappedAddress[i] =
VideoPortGetDeviceBase(hwDeviceExtension,
accessRange[i].RangeStart,
accessRange[i].RangeLength,
accessRange[i].RangeInIoSpace)) == NULL) {
VideoDebugPrint((1, "8514/A: DeviceBase mapping failed\n"));
return ERROR_INVALID_PARAMETER;
}
}
//
// Remember the original value of any registers we'll muck with.
//
SubSysCntlRegisterValue = INPW(hwDeviceExtension, INDEX_SUBSYS_CNTL);
ErrTermRegisterValue = INPW(hwDeviceExtension, INDEX_ERR_TERM);
//
// Reset the draw engine.
//
OUTPW(hwDeviceExtension, INDEX_SUBSYS_CNTL, 0x9000);
OUTPW(hwDeviceExtension, INDEX_SUBSYS_CNTL, 0x5000);
//
// We detect an 8514/A by writing a value to the error term register,
// and reading it back to see if it's the same value we wrote.
//
OUTPW(hwDeviceExtension, INDEX_ERR_TERM, 0x5555);
ErrTerm5555 = INPW(hwDeviceExtension, INDEX_ERR_TERM);
OUTPW(hwDeviceExtension, INDEX_ERR_TERM, 0xAAAA);
ErrTermAAAA = INPW(hwDeviceExtension, INDEX_ERR_TERM);
if ((ErrTerm5555 != 0x5555) || (ErrTermAAAA != 0xAAAA))
{
//
// It's not an 8514/A, so we'd better try to restore the registers'
// original values.
//
OUTPW(hwDeviceExtension, INDEX_ERR_TERM, ErrTermRegisterValue);
OUTPW(hwDeviceExtension, INDEX_SUBSYS_CNTL, SubSysCntlRegisterValue);
VideoDebugPrint((2, "8514/A: No 8514/A was detected\n"));
return ERROR_DEV_NOT_EXIST;
}
VideoDebugPrint((2, "8514/A: An 8514/A was detected\n"));
SubSysStat = INPW(hwDeviceExtension, INDEX_SUBSYS_STATUS);
//
// Now that we're done mucking with the hardware state, we have to
// restore everything to the way it was.
//
OUTPW(hwDeviceExtension, INDEX_ERR_TERM, ErrTermRegisterValue);
OUTPW(hwDeviceExtension, INDEX_SUBSYS_CNTL, SubSysCntlRegisterValue);
//
// Okay, we're probably running on an 8514/A. See if there's one
// meg of memory, because that's all we support.
//
if ((SubSysStat & 0x80) == 0)
{
VideoPortLogError(hwDeviceExtension,
NULL,
A8514_NOT_ENOUGH_VRAM,
__LINE__);
VideoDebugPrint((2, "8514/A: Not enough memory\n"));
return ERROR_INVALID_PARAMETER;
}
//
// We have this so that the int10 will also work on the VGA also if we
// use it in this driver.
//
ConfigInfo->VdmPhysicalVideoMemoryAddress.LowPart = 0x000A0000;
ConfigInfo->VdmPhysicalVideoMemoryAddress.HighPart = 0x00000000;
ConfigInfo->VdmPhysicalVideoMemoryLength = 0x00020000;
//
// Clear out the Emulator entries and the state size since this driver
// does not support them.
//
ConfigInfo->NumEmulatorAccessEntries = 0;
ConfigInfo->EmulatorAccessEntries = NULL;
ConfigInfo->EmulatorAccessEntriesContext = 0;
//
// This driver does not do SAVE/RESTORE of hardware state.
//
ConfigInfo->HardwareStateSize = 0;
//
// Indicate we do not wish to be called over
//
*Again = 0;
//
// Indicate a successful completion status.
//
return NO_ERROR;
} // end A8514FindAdapter()
VOID
VgaValidateModes(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
Routine Description:
Determines which modes are valid and which are not.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
Return Value:
None.
--*/
{
ULONG i;
VIDEO_X86_BIOS_ARGUMENTS biosArguments;
ULONG ulAvailMemory; // Available memory on the card.
/***********************************************************************
*** On the AVGA cards, the amount of memory is hardcoded ***
*** in the BIOS. To determine the amount of memory available ***
*** on the card, we need to perform an INT 10 bios call. ***
***********************************************************************/
VideoPortZeroMemory(&biosArguments, sizeof(VIDEO_X86_BIOS_ARGUMENTS));
/***********************************************************************
*** To find out if we only have 256Kb of RAM on the board we need ***
*** to determine if 640x480x256 color modes are supported. ***
*** If the mode is supported, we have at least 512kb of RAM. ***
*** To determine if this mode is supported we need to perform ***
*** An INT 10 call to get the video environment. ***
*** AH = BFh ; AL = 03h ; BX = 00h ***
*** Then we need to test bit 6. If it is set, the mode is ***
*** supported and we have at least 512Kb on the board. ***
***********************************************************************/
biosArguments.Eax = 0xBF03;
VideoPortInt10(HwDeviceExtension, &biosArguments);
VideoDebugPrint((2,"AVGA.SYS: biosArguments.Ecx = %x\n",biosArguments.Ecx));
VideoDebugPrint((2,"AVGA.SYS: VgaValidateModes - "));
if (biosArguments.Ecx & 0x40) {
VideoDebugPrint((2,"512Kb RAM on the board.\n"));
ulAvailMemory = 0x80000;
} else {
VideoDebugPrint((2,"256Kb RAM on the board.\n"));
ulAvailMemory = 0x40000;
}
//
// Store the number of modes into the buffer.
//
HwDeviceExtension->NumAvailableModes = 0;
for (i = 0; i < NUM_VIDEO_MODES; i++) {
if (ModesVGA[i].sbytes > ulAvailMemory) { // Does the card have
ModesVGA[i].ValidMode = FALSE; // enough memory to support
continue; // this mode ?
}
if ((HwDeviceExtension->DisplayType == PANEL) &&
(ModesVGA[i].hres == 800)) {
VideoDebugPrint((2,"AVGA.sys: VgaValidateModes - 800x600 mode with PANEL = %x\n",i));
ModesVGA[i].ValidMode = FALSE;
} else {
VideoDebugPrint((2,"AVGA.sys: VgaValidateModes - Valid Mode %x\n",i));
ModesVGA[i].ValidMode = TRUE;
HwDeviceExtension->NumAvailableModes ++;
}
}
VideoDebugPrint((2,"AVGA.sys: VgaValidateModes - NumMode = %x.\n",
HwDeviceExtension->NumAvailableModes));
}
VOID
P91Bt489RestoreMode(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
/*++
routine description:
Restore the DAC to its pristine state.
arguments:
hwdeviceextension - pointer to the miniport driver's device extension.
return value:
--*/
{
UCHAR ucCurState;
VideoDebugPrint((0, "P91Bt489RestoreMode----------\n"));
//
// Enable accesses to CMD_REG_3. For the Power 9100, to access command
// register 3, you must have CR07 TRUE and you must load a one into
// the address register.
//
if (IS_DEV_P9100)
{
// Added per code received from R. Embry
WriteDAC(HwDeviceExtension, CMD_REG_0, ENB_CMD_REG_3);
P9_WR_REG(P9100_RAMWRITE, 0x02);
WR_CMD_REG_3(0x00);
// end added code
P9_WR_REG(P9100_RAMWRITE, 0x01);
WriteDAC(HwDeviceExtension, CMD_REG_0, ENB_CMD_REG_3);
// ucCurState = ReadDAC(HwDeviceExtension, CMD_REG_1);
// ucCurState = ReadDAC(HwDeviceExtension, CMD_REG_2);
// RD_CMD_REG_3(ucCurState);
// RD_CMD_REG_4(ucCurState);
WR_CMD_REG_4(0x00); // zero out cmd reg 4 on Bt489
WriteDAC(HwDeviceExtension, CMD_REG_0, 0x00);
WriteDAC(HwDeviceExtension, CMD_REG_1, 0x00);
WriteDAC(HwDeviceExtension, CMD_REG_2, 0x00);
return;
}
WriteDAC(HwDeviceExtension, CMD_REG_0, ENB_CMD_REG_3);
//
// Set pixel port for 8bit pixels.
//
WriteDAC(HwDeviceExtension, CMD_REG_1, PIX_PORT_8);
//
// Select VGA video clock, disable cursor.
//
WriteDAC(HwDeviceExtension, (ULONG) CMD_REG_2,
(UCHAR)(ReadDAC(HwDeviceExtension, (ULONG) CMD_REG_2) & DIS_CURS));
//
// Select 32x32 cursor, clear clock doubler bit.
//
RD_CMD_REG_3(ucCurState);
WR_CMD_REG_3(ucCurState & (~(DAC_CLK_2X | DAC_CLK_2X_489) & CUR_MODE_32));
//
// Set pixel read mask.
//
WriteDAC(HwDeviceExtension, PIXEL_MSK_REG, 0xff);
return;
}
/* Standard NT driver initialization entry point. */
ULONG DriverEntry( PVOID Context1, PVOID Context2 )
{
VIDEO_HW_INITIALIZATION_DATA hwInitData;
ULONG status;
VideoDebugPrint( (1, "videomp: DriverEntry\n") );
/* Prepare the initialization structure. */
VideoPortZeroMemory( &hwInitData, sizeof( VIDEO_HW_INITIALIZATION_DATA ) );
hwInitData.HwInitDataSize = sizeof( VIDEO_HW_INITIALIZATION_DATA );
/* Set up driver callbacks. */
hwInitData.HwFindAdapter = HwVidFindAdapter;
hwInitData.HwInitialize = HwVidInitialize;
hwInitData.HwStartIO = HwVidStartIO;
/* There's no interrupt or timer callback. */
hwInitData.HwInterrupt = NULL;
hwInitData.HwTimer = NULL;
hwInitData.HwResetHw = HwVidResetHw;
/* Power and child device management callbacks were added in NT 5.0. */
hwInitData.HwGetPowerState = HwGetPowerState;
hwInitData.HwSetPowerState = HwSetPowerState;
hwInitData.HwGetVideoChildDescriptor = HwGetChildDesc;
/* Report legacy resources. */
hwInitData.HwLegacyResourceList = LegacyRanges;
hwInitData.HwLegacyResourceCount = ulNumLegacyRanges;
/* Report the device extension size. */
hwInitData.HwDeviceExtensionSize = sizeof( HW_DEV_EXT );
/* Refer to the CurrentControlSet\Services\xxx\Device0 registry key. */
hwInitData.StartingDeviceNumber = 0;
/* Later NT versions support PCI; recent versions ignore this entirely */
hwInitData.AdapterInterfaceType = PCIBus;
/* The PsGetVersion function was not available in NT 3.x. We therefore
* implement a poor man's version detection by successively reducing the
* HwInitDataSize until the video miniport (we hope) accepts it.
*/
do {
/* First try with NT 5.1 (Windows XP) structure size. */
VideoDebugPrint( (1, "videomp: Trying DDI 5.1 HwInitDataSize\n") );
hwInitData.HwInitDataSize = SIZE_OF_WXP_VIDEO_HW_INITIALIZATION_DATA;
PortVersion = VP_VER_XP;
status = VideoPortInitialize( Context1, Context2, &hwInitData, NULL );
if( status != STATUS_REVISION_MISMATCH ) {
/* If status is anything other than a version mismatch, don't
* try calling VideoPortInitialize again. The call may have
* succeeded, or it failed for some reason whe can't easily fix.
*/
break;
}
/* Try the NT 5.0 (Windows 2000) structure size. */
VideoDebugPrint( (1, "videomp: Trying DDI 5.0 HwInitDataSize\n") );
hwInitData.HwInitDataSize = SIZE_OF_W2K_VIDEO_HW_INITIALIZATION_DATA;
PortVersion = VP_VER_W2K;
status = VideoPortInitialize( Context1, Context2, &hwInitData, NULL );
if( status != STATUS_REVISION_MISMATCH ) {
break;
}
/* Try the NT 4.0 (and also NT 3.51) structure size. */
VideoDebugPrint( (1, "videomp: Trying DDI 4.0 HwInitDataSize\n") );
hwInitData.HwInitDataSize = SIZE_OF_NT4_VIDEO_HW_INITIALIZATION_DATA;
PortVersion = VP_VER_NT4;
status = VideoPortInitialize( Context1, Context2, &hwInitData, NULL );
if( status != STATUS_REVISION_MISMATCH ) {
break;
}
/* Try the original NT 3.1/3.5 HwInitDataSize. No PCI support. */
VideoDebugPrint( (1, "videomp: Trying DDI 3.1 HwInitDataSize\n") );
hwInitData.HwInitDataSize = offsetof( VIDEO_HW_INITIALIZATION_DATA, HwResetHw );
hwInitData.AdapterInterfaceType = Isa;
PortVersion = VP_VER_NT31;
status = VideoPortInitialize( Context1, Context2, &hwInitData, NULL );
} while( 0 );
VideoDebugPrint( (1, "videomp: VideoPortInitialize rc=%08x\n", status ) );
return( status );
}
VOID
DevInitDGX(
PHW_DEVICE_EXTENSION HwDeviceExtension,
PULONG pData,
ULONG ulCount
)
/*++
Routine Description:
Initializes the modes and vars for the mode.
Arguments:
HwDeviceExtension - Pointer to the miniport driver's device extension.
pData - Mode set data
ulCount - size of mode set data.
Return Value:
--*/
{
PUCHAR pScreen, pReg;
PULONG pSetMode;
pScreen = (PUCHAR)(HwDeviceExtension->FrameAddress);
//
// Setup pointers to the interesting parts of the DAC
//
HwDeviceExtension->pCursorPositionReg = (PULONG)(pScreen + DAC_OFFSET
+ DAC_HWCURSORPOS);
HwDeviceExtension->pControlRegA = (PULONG)(pScreen + DAC_OFFSET
+ DAC_CONTROLREGA);
HwDeviceExtension->pPaletteRegs = (PULONG)(pScreen + DAC_OFFSET
+ DAC_PALETTE);
HwDeviceExtension->pHardWareCursorAddr = (PULONG)(pScreen + DAC_OFFSET
+ DAC_HWCURSORSHAPE);
//
// reset the jaws adapter
//
if (HwDeviceExtension->ModelNumber == 1) {
VideoPortWritePortUchar((PUCHAR)(HwDeviceExtension->DGX1Misc),
(UCHAR)0x24);
DacDelay();
pReg = (PUCHAR)(HwDeviceExtension->DGXControlPorts);
pReg += 4;
VideoPortWritePortUchar(pReg,(UCHAR)4);
DacDelay();
VideoPortWritePortUchar((PUCHAR)(HwDeviceExtension->DGX1OutputPort),
(UCHAR)4);
DacDelay();
VideoPortWritePortUchar(pReg, (UCHAR)1);
DacDelay();
} else {
pReg = (PUCHAR)(HwDeviceExtension->DGXControlPorts);
pReg += 8;
VideoPortWritePortUchar(pReg, (UCHAR)0x15);
DacDelay();
VideoPortWritePortUchar(pReg, (UCHAR)5);
DacDelay();
VideoPortWritePortUchar(pReg, (UCHAR)0x45);
DacDelay();
}
//
// Set the mode
//
while (ulCount--) {
pSetMode = (PULONG)(pScreen + DAC_OFFSET + *pData++);
if (*pData == 0xFFFFFFFF) {
DacDelay();
pData++;
} else {
VideoDebugPrint((3,"%lx <- %lx\n",pSetMode, *pData));
*pSetMode = *pData++;
}
DacDelay();
}
//
// set HW cursor colors;
//
pSetMode = (PULONG)(pScreen + DAC_OFFSET + DAC_HWCURSORCOLOR);
*pSetMode++ = 0; // Black
DacDelay();
*pSetMode++ = 0xffffffff; // White
DacDelay();
*pSetMode = 0xffffffff; // White (Not Used)
DacDelay();
DevPointerOff(HwDeviceExtension);
VideoDebugPrint((2, "DGX: DevInitDGXComplete\n"));
}
/******************************************************************************
** bIntergraphBoard
*
* PARAMETERS: HwDeviceExtension
*
* DESCRIPTION: Determine if we're trying to init an Intergraph Board
*
* RETURNS: TRUE - if this is an Intergraph Board
* FALSE - if this is not an Intergraph Board
*
* CREATED: 02/20/95 13:33:23
*
* BY: c-jeffn
*
* copyright (c) 1995, Newman Consulting
*
******************************************************************************/
BOOLEAN
bIntergraphBoard(
PHW_DEVICE_EXTENSION HwDeviceExtension
)
{
ULONG ulRet;
UCHAR jConfig66, jOEMId, *pjOEMId;
VP_STATUS vpStatus;
VIDEO_ACCESS_RANGE AccessRange;
BOOLEAN bRet;
VideoDebugPrint((2, "P9!bIntergraphBoard - Entry\n"));
// Note that the P9100 must be in native mode before this function
// is called.
bRet = FALSE;
// Test to see if the P9100 indicates external io device is there
// If not, can't be Intergraph board
if ( (HwDeviceExtension->p91State.ulPuConfig & P91_PUC_EXT_IO) == 0 )
goto exit;
// Set Bit 4 of Config 66. This will allow access to the Intergraph
// Specific registers.
jConfig66 = 0x10;
ulRet = VideoPortSetBusData(HwDeviceExtension,
PCIConfiguration,
HwDeviceExtension->PciSlotNum,
&jConfig66,
0x42,
sizeof (UCHAR));
if (ulRet != 1)
{
VideoDebugPrint((2, "P9!bIntergraphBoard - failed VideoPortSetBusData\n"));
VideoDebugPrint((2, "\tulRet: %x\n", ulRet));
goto exit;
}
// Check P9100 register 0x208 for ID in native mode
ulRet = P9_RD_REG(P91_EXT_IO_ID); // Get the external io id value
jOEMId = (UCHAR)(ulRet >> 16); // per Weitek programmer's manual
if (jOEMId == 0xFE) // This is the id assigned to Intergraph
bRet = TRUE;
// Need to reset Config register 66 bit 4.
jConfig66 = 0x00;
ulRet = VideoPortSetBusData(HwDeviceExtension,
PCIConfiguration,
HwDeviceExtension->PciSlotNum,
&jConfig66,
0x42,
sizeof (UCHAR));
exit:
VideoDebugPrint((2, "P9!bIntergraphBoard - Exit: %x\n", bRet));
return (bRet);
}
