void Lingo::processIf(int elselabel, int endlabel) {
inst ielse1, iend;
int else1 = elselabel;
WRITE_UINT32(&iend, endlabel);
while (true) {
if (_labelstack.empty()) {
warning("Label stack underflow");
break;
}
int label = _labelstack.back();
_labelstack.pop_back();
// This is beginning of our if()
if (!label)
break;
WRITE_UINT32(&ielse1, else1);
(*_currentScript)[label + 2] = ielse1; /* elsepart */
(*_currentScript)[label + 3] = iend; /* end, if cond fails */
else1 = label;
}
}
os_status hwTimer32PreloadSet(soc_timer32_num_t timer_num, uint32_t preload_value)
{
unsigned int module = timer32_module(timer_num);
unsigned int timer = timer32_in_module(timer_num);
hw_timer32_t *timers = &g_os_hw_timers32;
#ifdef HW_TIMER_ERROR_CHECKING
if (timer_num >= NUM_OF_HW_TIMERS_32b)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_INVALID);
}
#endif /* HW_TIMER_ERROR_CHECKING */
if (timers->array[timer_num]->timer_config & HW_TIMER32_CONFIG_COUNT_DOWN)
{
WRITE_UINT32(soc_timer32_module[module].tmr[timer].tmr_cmpld2, preload_value);
}
else
{
WRITE_UINT32(soc_timer32_module[module].tmr[timer].tmr_cmpld1, preload_value);
}
#ifdef B4860_FAMILY
DBAR_SCFG();
#endif //B4860_FAMILY
return OS_SUCCESS;
}
void dw_setPixel(SDL_Surface *s, Uint32 color, Uint16 x, Uint16 y) {
assert(s);
assert(x < s->w && y < s->h);
Uint32 bpp = s->format->BytesPerPixel;
Uint8 *p = (Uint8 *)s->pixels + (y * s->pitch) + (x * bpp);
Uint32 pix;
switch (bpp) {
case 1: // b/w
*p = color & 0xFF;
break;
case 2: // 16 bit per pixel
WRITE_UINT16(p, color & 0xFFFF);
break;
case 3:
WRITE_UINT32(&pix, color);
p[0] = ((Uint8*)(&pix))[0];
p[1] = ((Uint8*)(&pix))[1];
p[2] = ((Uint8*)(&pix))[2];
break;
case 4:
WRITE_UINT32(p, color);
break;
default: // !?!?
return;
}
}
FOR_BLOCKS(length, dst, src, CAST128_BLOCK_SIZE)
{
uint32_t t, l, r;
/* Get inblock into l,r */
l = READ_UINT32(src);
r = READ_UINT32(src+4);
/* Do the work */
F1(l, r, 0);
F2(r, l, 1);
F3(l, r, 2);
F1(r, l, 3);
F2(l, r, 4);
F3(r, l, 5);
F1(l, r, 6);
F2(r, l, 7);
F3(l, r, 8);
F1(r, l, 9);
F2(l, r, 10);
F3(r, l, 11);
/* Only do full 16 rounds if key length > 80 bits */
if (ctx->rounds > 12) {
F1(l, r, 12);
F2(r, l, 13);
F3(l, r, 14);
F1(r, l, 15);
}
/* Put l,r into outblock */
WRITE_UINT32(dst, r);
WRITE_UINT32(dst + 4, l);
/* Wipe clean */
t = l = r = 0;
}
t_Error FM_PCD_PrsLoadSw(t_Handle h_FmPcd, t_FmPcdPrsSwParams *p_SwPrs)
{
t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
uint32_t *p_LoadTarget, tmpReg;
int i, j;
SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPrs, E_INVALID_STATE);
SANITY_CHECK_RETURN_ERROR(p_SwPrs, E_INVALID_HANDLE);
SANITY_CHECK_RETURN_ERROR(!p_FmPcd->enabled, E_INVALID_HANDLE);
if(p_FmPcd->guestId != NCSW_MASTER_ID)
RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_PrsLoadSw - guest mode!"));
if(!p_SwPrs->override)
{
if(p_FmPcd->p_FmPcdPrs->p_CurrSwPrs > p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4)
RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("SW parser base must be larger than current loaded code"));
}
if(p_SwPrs->size > FM_PCD_SW_PRS_SIZE - FM_PCD_PRS_SW_TAIL_SIZE - p_SwPrs->base*2)
RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("p_SwPrs->size may not be larger than MAX_SW_PRS_CODE_SIZE"));
if(p_SwPrs->size % 4)
RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("p_SwPrs->size must be divisible by 4"));
/* save sw parser labels */
if(p_SwPrs->override)
p_FmPcd->p_FmPcdPrs->currLabel = 0;
if(p_FmPcd->p_FmPcdPrs->currLabel+ p_SwPrs->numOfLabels > FM_PCD_PRS_NUM_OF_LABELS)
RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceeded number of labels allowed "));
memcpy(&p_FmPcd->p_FmPcdPrs->labelsTable[p_FmPcd->p_FmPcdPrs->currLabel], p_SwPrs->labelsTable, p_SwPrs->numOfLabels*sizeof(t_FmPcdPrsLabelParams));
p_FmPcd->p_FmPcdPrs->currLabel += p_SwPrs->numOfLabels;
/* load sw parser code */
p_LoadTarget = p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4;
for(i=0;i<p_SwPrs->size/4;i++)
{
tmpReg = 0;
for(j =0;j<4;j++)
{
tmpReg <<= 8;
tmpReg |= *(p_SwPrs->p_Code+i*4+j);
}
WRITE_UINT32(*(p_LoadTarget + i), tmpReg);
}
p_FmPcd->p_FmPcdPrs->p_CurrSwPrs = p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4 + p_SwPrs->size/4;
/* copy data parameters */
for(i=0;i<FM_PCD_PRS_NUM_OF_HDRS;i++)
WRITE_UINT32(*(p_FmPcd->p_FmPcdPrs->p_SwPrsCode+PRS_SW_DATA/4+i), p_SwPrs->swPrsDataParams[i]);
/* Clear last 4 bytes */
WRITE_UINT32(*(p_FmPcd->p_FmPcdPrs->p_SwPrsCode+(PRS_SW_DATA-FM_PCD_PRS_SW_TAIL_SIZE)/4), 0);
return E_OK;
}
os_status hwTimer32SetInterval(soc_timer32_num_t timer_num, os_timer_interval interval)
{
os_status status = OS_SUCCESS;
unsigned int module = timer32_module(timer_num);
unsigned int timer = timer32_in_module(timer_num);
hw_timer32_t *timers = NULL;
timers = &g_os_hw_timers32;
#ifdef HW_TIMER_ERROR_CHECKING
if ((timer_num >= NUM_OF_HW_TIMERS_32b))
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_INVALID);
}
if (timers->array[timer_num]->status < OS_RESOURCE_USED)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_NOT_CREATED);
}
else if (timers->array[timer_num]->status == OS_RESOURCE_ACTIVE)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_OS_ERR_BUSY);
}
#endif /* HW_TIMER_ERROR_CHECKING */
if (timers->array[timer_num]->timer_config & HW_TIMER32_CONFIG_COUNT_DOWN)
{
WRITE_UINT32(soc_timer32_module[module].tmr[timer].tmr_cmp2, interval);
}
else
{
WRITE_UINT32(soc_timer32_module[module].tmr[timer].tmr_cmp1, interval);
}
timers->array[timer_num]->reload_value = (uint32_t)interval;
#ifdef B4860_FAMILY
DBAR_SCFG();
#endif //B4860_FAMILY
return status;
}
int
sftp_write_packet(struct sftp_output *o)
{
int j;
int written = 0;
uint32_t length = o->i + 5;
uint8_t buf[9];
WRITE_UINT32(buf, length);
buf[4] = o->msg;
WRITE_UINT32(buf + 5, o->first);
/* Write 9 bytes from buf */
while (written<9)
{
j = write(o->fd, buf+written, 9-written);
while (-1==j && errno==EINTR) /* Loop over EINTR */
j = write(o->fd, buf+written, 9-written);;
if (-1==j) /* Error, and not EINTR */
return -1; /* Error */
written += j; /* Move counters accordingly */
}
/* Write o->i bytes from data */
written = 0; /* Reset counter */
while (written<o->i)
{
j = write(o->fd, o->data+written, o->i-written);
while (-1==j && errno==EINTR) /* Loop over EINTR */
j = write(o->fd, o->data+written, o->i-written);;
if (-1==j) /* Error, and not EINTR */
return -1; /* Error */
written += j; /* Move counters accordingly */
}
o->i = 0;
return 1;
}
os_status hwTimer32Start(soc_timer32_num_t timer_num)
{
unsigned int module = timer32_module(timer_num);
unsigned int timer = timer32_in_module(timer_num);
uint16_t *timers_ctrl = NULL;
hw_timer32_t *timers = NULL;
timers_ctrl = timers_control_32b;
timers = &g_os_hw_timers32;
#ifdef HW_TIMER_ERROR_CHECKING
if (timer_num >= NUM_OF_HW_TIMERS_32b)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_INVALID);
}
if (timers->array[timer_num]->status < OS_RESOURCE_USED)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_NOT_CREATED);
}
if (timers->array[timer_num]->status == OS_RESOURCE_ACTIVE)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_ALREADY_ACTIVE);
}
#endif /* HW_TIMER_ERROR_CHECKING */
timers->array[timer_num]->status = OS_RESOURCE_ACTIVE;
/* enable the timer */
// Only 32b timers in system
WRITE_UINT32(soc_timer32_module[module].tmr[timer].tmr_cntr, 0);
WRITE_UINT32(soc_timer32_module[module].tmr[timer].tmr_ctrl, timers_ctrl[timer_num]);
#ifdef B4860_FAMILY
DBAR_SCFG();
#endif //B4860_FAMILY
return OS_SUCCESS;
}
static void
yarrow_iterate(quint8 *digest)
{
quint8 v0[SHA256_DIGEST_SIZE];
unsigned i;
memcpy(v0, digest, SHA256_DIGEST_SIZE);
/* When hashed inside the loop, i should run from 1 to
* YARROW_RESEED_ITERATIONS */
for (i = 0; ++i < YARROW_RESEED_ITERATIONS; )
{
quint8 count[4];
sha256_context hash;
sha256_starts(&hash);
/* Hash v_i | v_0 | i */
WRITE_UINT32(count, i);
sha256_update(&hash, digest, SHA256_DIGEST_SIZE);
sha256_update(&hash, v0, sizeof(v0));
sha256_update(&hash, count, sizeof(count));
sha256_finish(&hash,digest);
}
}
/* FIXME: Should we abort or return error if the length and the field
* size don't match? */
void
pgp_put_header_length(struct nettle_buffer *buffer,
/* start of the header */
unsigned start,
unsigned field_size)
{
unsigned length;
switch (field_size)
{
case 1:
length = buffer->size - (start + 2);
assert(length < PGP_LENGTH_TWO_OCTETS);
buffer->contents[start + 1] = length;
break;
case 2:
length = buffer->size - (start + 3);
assert(length < PGP_LENGTH_FOUR_OCTETS
&& length >= PGP_LENGTH_TWO_OCTETS);
WRITE_UINT16(buffer->contents + start + 1, length + LENGTH_TWO_OFFSET);
break;
case 4:
length = buffer->size - (start + 5);
WRITE_UINT32(buffer->contents + start + 2, length);
break;
default:
abort();
}
}
void Surface::scaleTransparentCopy(const Common::Rect &srcRect, const Common::Rect &dstRect) const {
// I'm doing simple linear scaling here
// dstRect(x, y) = srcRect(x * srcW / dstW, y * srcH / dstH);
Graphics::Surface *screen = ((PegasusEngine *)g_engine)->_gfx->getCurSurface();
int srcW = srcRect.width();
int srcH = srcRect.height();
int dstW = dstRect.width();
int dstH = dstRect.height();
for (int y = 0; y < dstH; y++) {
for (int x = 0; x < dstW; x++) {
if (g_system->getScreenFormat().bytesPerPixel == 2) {
uint16 color = READ_UINT16((byte *)_surface->getBasePtr(
x * srcW / dstW + srcRect.left,
y * srcH / dstH + srcRect.top));
if (!isTransparent(color))
WRITE_UINT16((byte *)screen->getBasePtr(x + dstRect.left, y + dstRect.top), color);
} else if (g_system->getScreenFormat().bytesPerPixel == 4) {
uint32 color = READ_UINT32((byte *)_surface->getBasePtr(
x * srcW / dstW + srcRect.left,
y * srcH / dstH + srcRect.top));
if (!isTransparent(color))
WRITE_UINT32((byte *)screen->getBasePtr(x + dstRect.left, y + dstRect.top), color);
}
}
}
}
/* in the ENDISx register, FALSE to disable the interrupt */
static os_status setInterruptEnable(os_hwi_handle hwi_num,
bool enable_interrupt)
{
uint16_t index;
uint32_t endis_reg = 0;
uint32_t *endis_reg_ptr;
os_hwi_handle epic_hwi_num = 0;
uint32_t interrupt_bit = 0;
/* Don't handle Non-EPIC interrupts don't require any more handling */
if (hwi_num < EPIC_INTERRUPTS_OFFSET)
RETURN_ERROR(OS_ERR_HWI_INVALID);
else /* get the EPIC interrupt zero-based index */
epic_hwi_num = (os_hwi_handle)(hwi_num - EPIC_INTERRUPTS_OFFSET);
/* handle the Enable/Disable Interrupts register ENDISx */
index = (os_hwi_handle)(epic_hwi_num >> 5); /* /32 , there are 8 ENDISx registers*/
endis_reg_ptr = (uint32_t *)((g_dsp_plat_map->epic).p_endis);
endis_reg_ptr += index;
/* we need to set or clear the corresponding interrupt bit */
interrupt_bit = (uint32_t)(0x00000001 << (epic_hwi_num & 0x001F));
READ_UINT32(endis_reg, *endis_reg_ptr);
if (enable_interrupt)
endis_reg |= interrupt_bit;
else
endis_reg &= ~interrupt_bit;
WRITE_UINT32(*endis_reg_ptr, endis_reg);
return OS_SUCCESS;
}
/* Caution: call only when interrupts are disabled */
static void prioritySet(os_hwi_handle hwi_num,
os_hwi_priority priority)
{
uint16_t index;
uint32_t priority_mask;
uint32_t *priority_reg_ptr;
uint32_t current_reg;
/* EPIC interrupt:
Figure out which IPL register it is in. There are four interrupts
per IPL register. */
index = (uint16_t)(hwi_num >> 2); /* /4 */
priority_reg_ptr = (uint32_t *)((g_dsp_plat_map->epic).p_ipl);
priority_reg_ptr += index;
/* Figure out what the priority mask looks like */
priority_mask = 0x000000FFUL << ((hwi_num & 0x0003) * 8);
/* For NMI priority, the IPL bits do not matter in the p_ipl */
/* register, only need to set the INC bit to NMI. */
if (priority == OS_HWI_PRIORITY_NMI)
priority = 0x80;
/* Set priority */
READ_UINT32(current_reg, *priority_reg_ptr);
current_reg &= (priority_mask ^ 0xFFFFFFFF);
/* Set priority to zeroed bits in IPL */
current_reg |= ((uint32_t)priority) << ((hwi_num & 0x0003) * 8);
WRITE_UINT32(*priority_reg_ptr,current_reg);
}
void Surface::scaleTransparentCopyGlow(const Common::Rect &srcRect, const Common::Rect &dstRect) const {
// This is the same as scaleTransparentCopy(), but turns the red value of each
// pixel all the way up.
Graphics::Surface *screen = ((PegasusEngine *)g_engine)->_gfx->getCurSurface();
int srcW = srcRect.width();
int srcH = srcRect.height();
int dstW = dstRect.width();
int dstH = dstRect.height();
for (int y = 0; y < dstH; y++) {
for (int x = 0; x < dstW; x++) {
if (g_system->getScreenFormat().bytesPerPixel == 2) {
uint16 color = READ_UINT16((byte *)_surface->getBasePtr(
x * srcW / dstW + srcRect.left,
y * srcH / dstH + srcRect.top));
if (!isTransparent(color))
WRITE_UINT16((byte *)screen->getBasePtr(x + dstRect.left, y + dstRect.top), getGlowColor(color));
} else if (g_system->getScreenFormat().bytesPerPixel == 4) {
uint32 color = READ_UINT32((byte *)_surface->getBasePtr(
x * srcW / dstW + srcRect.left,
y * srcH / dstH + srcRect.top));
if (!isTransparent(color))
WRITE_UINT32((byte *)screen->getBasePtr(x + dstRect.left, y + dstRect.top), getGlowColor(color));
}
}
}
}
static void
yarrow_iterate(uint8_t *digest)
{
uint8_t v0[SHA256_DIGEST_SIZE];
unsigned i;
memcpy(v0, digest, SHA256_DIGEST_SIZE);
/* When hashed inside the loop, i should run from 1 to
* YARROW_RESEED_ITERATIONS */
for (i = 0; ++i < YARROW_RESEED_ITERATIONS; )
{
uint8_t count[4];
struct sha256_ctx hash;
sha256_init(&hash);
/* Hash v_i | v_0 | i */
WRITE_UINT32(count, i);
sha256_update(&hash, SHA256_DIGEST_SIZE, digest);
sha256_update(&hash, sizeof(v0), v0);
sha256_update(&hash, sizeof(count), count);
sha256_digest(&hash, SHA256_DIGEST_SIZE, digest);
}
}
void PrsDisable(t_FmPcd *p_FmPcd )
{
t_FmPcdPrsRegs *p_Regs = p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
WRITE_UINT32(p_Regs->rpimac, GET_UINT32(p_Regs->rpimac) & ~FM_PCD_PRS_RPIMAC_EN);
}
void Surface::copyToCurrentPortTransparentGlow(const Common::Rect &srcRect, const Common::Rect &dstRect) const {
// This is the same as copyToCurrentPortTransparent(), but turns the red value of each
// pixel all the way up.
Graphics::Surface *screen = ((PegasusEngine *)g_engine)->_gfx->getCurSurface();
byte *src = (byte *)_surface->getBasePtr(srcRect.left, srcRect.top);
byte *dst = (byte *)screen->getBasePtr(dstRect.left, dstRect.top);
int lineSize = srcRect.width() * _surface->format.bytesPerPixel;
for (int y = 0; y < srcRect.height(); y++) {
for (int x = 0; x < srcRect.width(); x++) {
if (g_system->getScreenFormat().bytesPerPixel == 2) {
uint16 color = READ_UINT16(src);
if (!isTransparent(color))
WRITE_UINT16(dst, getGlowColor(color));
} else if (g_system->getScreenFormat().bytesPerPixel == 4) {
uint32 color = READ_UINT32(src);
if (!isTransparent(color))
WRITE_UINT32(dst, getGlowColor(color));
}
src += g_system->getScreenFormat().bytesPerPixel;
dst += g_system->getScreenFormat().bytesPerPixel;
}
src += _surface->pitch - lineSize;
dst += screen->pitch - lineSize;
}
}
void osMpicSetInterruptMask(uint16_t grp, uint16_t idx, bool intr_enable)
{
uint32_t *p_vpr;
uint32_t vpr;
osMpicGetIntrConfigRegs(grp, idx, &p_vpr, NULL, NULL);
OS_ASSERT_COND(p_vpr);
vpr = GET_UINT32(*p_vpr);
if (intr_enable)
WRITE_UINT32(*p_vpr, (volatile uint32_t)(vpr & ~(VPR_MSK)));
else
WRITE_UINT32(*p_vpr, (volatile uint32_t)(vpr | VPR_MSK));
}
static int
write_uint32(FILE *f, uint32_t n)
{
uint8_t buffer[4];
WRITE_UINT32(buffer, n);
return write_string(f, sizeof(buffer), buffer);
}
void
sftp_put_length(struct sftp_output *o,
uint32_t index,
uint32_t length)
{
assert( (index + 4) < o->i);
WRITE_UINT32(o->data + index, length);
}
int Lingo::codeConst(int val) {
int res = g_lingo->code1(g_lingo->c_constpush);
inst i = 0;
WRITE_UINT32(&i, val);
g_lingo->code1(i);
return res;
}
void
sftp_put_uint32(struct sftp_output *o, uint32_t value)
{
uint8_t buf[4];
WRITE_UINT32(buf, value);
PUT_DATA(o, buf);
}
os_status hwTimer32CompareSet(soc_timer32_num_t timer_num, uint32_t compare)
{
unsigned int module = timer32_module(timer_num);
unsigned int timer = timer32_in_module(timer_num);
hw_timer32_t *timers = &g_os_hw_timers32;
#ifdef HW_TIMER_ERROR_CHECKING
if (timer_num >= NUM_OF_HW_TIMERS_32b)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_INVALID);
}
if (timers->array[timer_num]->status < OS_RESOURCE_USED)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_NOT_CREATED);
}
else if (timers->array[timer_num]->status == OS_RESOURCE_ACTIVE)
{
#ifdef HW_TIMER_ERROR_ASSERT
OS_ASSERT;
#endif /* HW_TIMER_ERROR_ASSERT */
RETURN_ERROR(OS_ERR_HW_TM_OS_ERR_BUSY);
}
#endif /* HW_TIMER_ERROR_CHECKING */
if (timers->array[timer_num]->timer_config & HW_TIMER32_CONFIG_COUNT_DOWN)
{
WRITE_UINT32(soc_timer32_module[module].tmr[timer].tmr_cmp2, compare);
}
else
{
WRITE_UINT32(soc_timer32_module[module].tmr[timer].tmr_cmp1, compare);
}
#ifdef B4860_FAMILY
DBAR_SCFG();
#endif //B4860_FAMILY
return OS_SUCCESS;
}
void FM_PCD_SetPrsStatistics(t_Handle h_FmPcd, bool enable)
{
t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
SANITY_CHECK_RETURN(p_FmPcd, E_INVALID_HANDLE);
SANITY_CHECK_RETURN(p_FmPcd->p_FmPcdPrs, E_INVALID_HANDLE);
if(p_FmPcd->guestId != NCSW_MASTER_ID)
{
REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_SetPrsStatistics - guest mode!"));
return;
}
if(enable)
WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->ppsc, FM_PCD_PRS_PPSC_ALL_PORTS);
else
WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->ppsc, 0);
}
static t_Error BmSetPool(t_Handle h_Bm,
uint8_t bpid,
uint32_t swdet,
uint32_t swdxt,
uint32_t hwdet,
uint32_t hwdxt)
{
t_Bm *p_Bm = (t_Bm*)h_Bm;
SANITY_CHECK_RETURN_ERROR(p_Bm, E_INVALID_HANDLE);
SANITY_CHECK_RETURN_ERROR(bpid < BM_MAX_NUM_OF_POOLS, E_INVALID_VALUE);
WRITE_UINT32(p_Bm->p_BmRegs->swdet[bpid], GenerateThresh(swdet, 0));
WRITE_UINT32(p_Bm->p_BmRegs->swdxt[bpid], GenerateThresh(swdxt, 1));
WRITE_UINT32(p_Bm->p_BmRegs->hwdet[bpid], GenerateThresh(hwdet, 0));
WRITE_UINT32(p_Bm->p_BmRegs->hwdxt[bpid], GenerateThresh(hwdxt, 1));
return E_OK;
}
int
pgp_put_uint32(struct nettle_buffer *buffer, uint32_t i)
{
uint8_t *p = nettle_buffer_space(buffer, 4);
if (!p)
return 0;
WRITE_UINT32(p, i);
return 1;
}
void
pgp_sub_packet_end(struct nettle_buffer *buffer, unsigned start)
{
unsigned length;
assert(start >= 2);
assert(start <= buffer->size);
length = buffer->size - start;
WRITE_UINT32(buffer->contents + start - 2, length);
}
static void PcdPrsException(t_Handle h_FmPcd)
{
t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
uint32_t event, force;
ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
event = GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->pevr);
event &= GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->pever);
ASSERT_COND(event & FM_PCD_PRS_SINGLE_ECC);
DBG(TRACE, ("parser event - 0x%08x\n",event));
/* clear the forced events */
force = GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->pevfr);
if(force & event)
WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->pevfr, force & ~event);
WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->pevr, event);
p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC);
}
//;*************************************************************************
//;
//; Function: osTickIntProgram
//:
//: Inputs: None
//:
//: Outputs: None
//;
//; Description: This function starts the hardware timer for
//; the OS. MSC8101 specific implementation.
//; PIT and BRG0 are used to provide OS tick.
//;
//; Cautions: none
//;
//;*************************************************************************
void osTickIntProgram()
{
os_status status;
uint32_t divider_value;
#if 0
// Tie the interrupt handler to the interrupt
status = osHwiCreate(OS_INT_TM0, OS_HWI_PRIORITY0,
EDGE_MODE, osTickHwiHandler, 0);
OS_ASSERT_COND(status == OS_SUCCESS);
/* value and pre-load value */
divider_value = g_core_clock*1000000/g_tick_parameter;
WRITE_UINT32(g_dsp_plat_map->timer.platform_timer[0].tm_tp, divider_value );
WRITE_UINT32(g_dsp_plat_map->timer.platform_timer[0].tm_tv, divider_value );
/* Enable in periodic mode */
WRITE_UINT32(g_dsp_plat_map->timer.platform_timer[0].tm_tc, 0x00000003);
#endif
/* save ticks parameter */
g_tick_per_second = g_tick_parameter;
}
void osMpicClearPendingCoreInterrupts()
{
uint32_t i, iack;
for (i=0; i < MPIC_NUM_OF_INTR_SOURCES; i++)
{
/**
* Reading IACK returns the interrupt vector corresponding to the highest priority pending interrupt
* and it also has the following side effects:
* The associated field in the corresponding interrupt pending register (IPR) is cleared for edge-sensitive interrupts.
* The corresponding in-service register (ISR) is updated.
* The corresponding int output signal from the MPIC is negated.
*/
iack = (volatile uint32_t)GET_UINT32(g_soc_ccsr_map->mpic_memmap.mpic_global_memmap.private_per_cpu_par.iack);
WRITE_UINT32(g_soc_ccsr_map->mpic_memmap.mpic_global_memmap.private_per_cpu_par.eoi, EOI_CODE);
}
DBAR_SCFG();
WRITE_UINT32_DBAR_SCFG(g_soc_ccsr_map->mpic_memmap.mpic_core_memmap.core_per_cpu_par[OS_MPIC_CORES_ID_OFFSET + osGetCoreID()].per_cpu_par.ctpr, 0);
}
