__STATIC_INLINE void XMC_CCU4_lGateClock(const XMC_CCU4_MODULE_t *const module)
{
switch ((uint32_t)module)
{
case (uint32_t)CCU40:
XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU40);
break;
#if defined(CCU41)
case (uint32_t)CCU41:
XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU41);
break;
#endif
#if defined(CCU42)
case (uint32_t)CCU42:
XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU42);
break;
#endif
#if defined(CCU43)
case (uint32_t)CCU43:
XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU43);
break;
#endif
default:
XMC_ASSERT("XMC_CCU4_lGateClock:Invalid Module Pointer", 0);
break;
}
}
/* API to enable the POSIF module */
void XMC_POSIF_Enable(XMC_POSIF_t *const peripheral)
{
#if UC_FAMILY == XMC4
XMC_SCU_CLOCK_EnableClock(XMC_SCU_CLOCK_CCU);
#endif
switch ((uint32_t)peripheral)
{
case (uint32_t)POSIF0:
#if defined(CLOCK_GATING_SUPPORTED)
XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF0);
#endif
#if defined(PERIPHERAL_RESET_SUPPORTED)
XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_POSIF0);
#endif
break;
#if defined(POSIF1)
case (uint32_t)POSIF1:
#if defined(CLOCK_GATING_SUPPORTED)
XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF1);
#endif
#if defined(PERIPHERAL_RESET_SUPPORTED)
XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_POSIF1);
#endif
break;
#endif
default:
XMC_ASSERT("XMC_POSIF_Disable:Invalid module pointer", 0);
break;
}
}
/* API to program timer repeat mode - Single shot vs repeat */
void XMC_CCU4_SLICE_SetTimerRepeatMode(XMC_CCU4_SLICE_t *const slice, const XMC_CCU4_SLICE_TIMER_REPEAT_MODE_t mode)
{
XMC_ASSERT("XMC_CCU4_SLICE_SetTimerRepeatMode:Invalid Slice Pointer", XMC_CCU4_CHECK_SLICE_PTR(slice));
XMC_ASSERT("XMC_CCU4_SLICE_SetTimerRepeatMode:Invalid Timer Repeat Mode",
((mode == XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT) ||\
(mode == XMC_CCU4_SLICE_TIMER_REPEAT_MODE_SINGLE)));
if (XMC_CCU4_SLICE_TIMER_REPEAT_MODE_REPEAT == mode)
{
slice->TC &= ~((uint32_t) CCU4_CC4_TC_TSSM_Msk);
}
else
{
slice->TC |= (uint32_t) CCU4_CC4_TC_TSSM_Msk;
}
}
/* Initialize RX descriptors */
void XMC_ETH_MAC_InitRxDescriptors(XMC_ETH_MAC_t *const eth_mac)
{
uint32_t i;
uint32_t next;
XMC_ASSERT("XMC_ETH_MAC_InitRxDescriptors: eth_mac is invalid", XMC_ETH_MAC_IsValidModule(eth_mac->regs));
/*
* Chained structure (ETH_MAC_DMA_RDES1_RCH), second address in the descriptor
* (buffer2) is the next descriptor address
*/
for (i = 0U; i < eth_mac->num_rx_buf; ++i)
{
eth_mac->rx_desc[i].status = (uint32_t)ETH_MAC_DMA_RDES0_OWN;
eth_mac->rx_desc[i].length = (uint32_t)ETH_MAC_DMA_RDES1_RCH | (uint32_t)XMC_ETH_MAC_BUF_SIZE;
eth_mac->rx_desc[i].buffer1 = (uint32_t)&(eth_mac->rx_buf[i * XMC_ETH_MAC_BUF_SIZE]);
next = i + 1U;
if (next == eth_mac->num_rx_buf)
{
next = 0U;
}
eth_mac->rx_desc[i].buffer2 = (uint32_t)&(eth_mac->rx_desc[next]);
}
eth_mac->regs->RECEIVE_DESCRIPTOR_LIST_ADDRESS = (uint32_t)&(eth_mac->rx_desc[0]);
eth_mac->rx_index = 0U;
}
/*
* API to initialize the INTERRUPT APP
*/
INTERRUPT_STATUS_t INTERRUPT_Init(const INTERRUPT_t *const handler)
{
XMC_ASSERT("INTERRUPT_Init:HandlePtr NULL", (handler != NULL));
#if(UC_FAMILY == XMC4)
NVIC_SetPriority(handler->node,
NVIC_EncodePriority(NVIC_GetPriorityGrouping(),
handler->priority,
handler->subpriority));
if (handler->enable_at_init == true)
{
INTERRUPT_Enable(handler);
}
#endif
#if(UC_FAMILY == XMC1)
NVIC_SetPriority(handler->node, handler->priority);
#if (UC_SERIES == XMC14)
XMC_SCU_SetInterruptControl((uint8_t)handler->node, (XMC_SCU_IRQCTRL_t)((handler->node << 8) | handler->irqctrl));
#endif
/* Enable the interrupt if enable_at_init is enabled */
if (handler->enable_at_init == true)
{
INTERRUPT_Enable(handler);
}
#endif
return (INTERRUPT_STATUS_SUCCESS);
}
/* Disable global high resolution generation */
void XMC_HRPWM_DisableGlobalHR(XMC_HRPWM_t *const hrpwm)
{
XMC_ASSERT("XMC_HRPWM_DisableGlobalHR:Invalid module pointer", XMC_HRPWM_CHECK_MODULE_PTR(hrpwm));
/* Enable global high resolution generation / Force charge pump down */
hrpwm->GLBANA &= ~((uint32_t)HRPWM0_GLBANA_GHREN_Msk);
}
/* API to initialize CCU4 global resources */
void XMC_CCU4_Init(XMC_CCU4_MODULE_t *const module, const XMC_CCU4_SLICE_MCMS_ACTION_t mcs_action)
{
uint32_t gctrl;
XMC_ASSERT("XMC_CCU4_Init:Invalid module pointer", XMC_CCU4_CHECK_MODULE_PTR(module));
XMC_ASSERT("XMC_CCU4_Init:Invalid mcs action", XMC_CCU4_SLICE_CHECK_MCS_ACTION(mcs_action));
/* Enable CCU4 module */
XMC_CCU4_EnableModule(module);
gctrl = module->GCTRL;
gctrl &= ~((uint32_t) CCU4_GCTRL_MSDE_Msk);
gctrl |= ((uint32_t) mcs_action) << CCU4_GCTRL_MSDE_Pos;
module->GCTRL = gctrl;
}
/* API to configure CC4 Slice for Capture */
void XMC_CCU4_SLICE_CaptureInit(XMC_CCU4_SLICE_t *const slice,
const XMC_CCU4_SLICE_CAPTURE_CONFIG_t *const capture_init)
{
XMC_ASSERT("XMC_CCU4_SLICE_CaptureInit:Invalid Slice Pointer", XMC_CCU4_CHECK_SLICE_PTR(slice));
XMC_ASSERT("XMC_CCU4_SLICE_CaptureInit:Capture Init Pointer is NULL",
(XMC_CCU4_SLICE_CAPTURE_CONFIG_t *) NULL != capture_init);
/* Program the capture mode */
slice->TC = capture_init->tc;
/* Enable the timer concatenation */
slice->CMC = ((uint32_t)capture_init->timer_concatenation << CCU4_CC4_CMC_TCE_Pos);
/* Program initial prescaler divider value */
slice->PSC = (uint32_t) capture_init->prescaler_initval;
/* Program initial floating prescaler compare value */
slice->FPCS = (uint32_t) capture_init->float_limit;
}
/* Configure input selection for clock selection used in slope generation */
void XMC_HRPWM_CSG_SelSlopeGenClkInput(XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CLK_INPUT_t input_clk)
{
XMC_ASSERT("XMC_HRPWM_CSG_SelSlopeGenClkInput:Invalid CSG pointer", XMC_HRPWM_CHECK_CSG_PTR(csg));
csg->DCI &= ~((uint32_t)HRPWM0_CSG0_DCI_SCS_Msk);
csg->DCI |= ((uint32_t)input_clk) << HRPWM0_CSG0_DCI_SCS_Pos;
}
/*
* This function is used to set Alarm time.
*/
RTC_STATUS_t RTC_SetAlarmTime(XMC_RTC_ALARM_t *alarm)
{
RTC_STATUS_t status = RTC_STATUS_SUCCESS;
XMC_RTC_ALARM_t alarm_val;
XMC_ASSERT("RTC_SetAlarmTime: NULL pointer", alarm != NULL);
/* copy to local structure to keep data safe */
alarm_val.year = alarm->year;
alarm_val.month = alarm->month;
alarm_val.days = alarm->days;
alarm_val.hours = alarm->hours;
alarm_val.minutes = alarm->minutes;
alarm_val.seconds = alarm->seconds;
if ((alarm_val.days != 0U) && (alarm_val.month != 0U))
{
alarm_val.days = alarm_val.days - 1U;
alarm_val.month = alarm_val.month - 1U;
XMC_RTC_SetAlarm(&alarm_val);
}
else
{
status = RTC_STATUS_FAILURE;
}
return (status);
}
__STATIC_INLINE void XMC_CCU4_lDeassertReset(const XMC_CCU4_MODULE_t *const module)
{
switch ((uint32_t)module)
{
case (uint32_t)CCU40:
XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_CCU40);
break;
#if defined(CCU41)
case (uint32_t)CCU41:
XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_CCU41);
break;
#endif
#if defined(CCU42)
case (uint32_t)CCU42:
XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_CCU42);
break;
#endif
#if defined(CCU43)
case (uint32_t)CCU43:
XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_CCU43);
break;
#endif
default:
XMC_ASSERT("XMC_CCU4_lDeassertReset:Invalid Module Pointer", 0);
break;
}
}
/*
* API to configure number of consecutive zeroes allowed at modulator output (flicker watch-dog number)
*/
void XMC_BCCU_SetFlickerWDThreshold (XMC_BCCU_t *const bccu, uint32_t threshold_no)
{
XMC_ASSERT("XMC_BCCU_SetFlickerWDThreshold: Invalid threshold no", (threshold_no <= BCCU_GLOBCON_WDMBN_Msk));
bccu->GLOBCON &= ~(uint32_t)(BCCU_GLOBCON_WDMBN_Msk);
bccu->GLOBCON |= (uint32_t)(threshold_no << BCCU_GLOBCON_WDMBN_Pos);
}
/*
* This API install the global read and sector write protection for the specified user
*/
void XMC_FLASH_InstallProtection(uint8_t user,
uint32_t protection_mask,
uint32_t password_0,
uint32_t password_1)
{
uint32_t idx;
XMC_ASSERT(" XMC_FLASH_ConfigureProtection: User level out of range", (user < 3U))
XMC_FLASH_lEnterPageModeCommand();
XMC_FLASH_lLoadPageCommand(protection_mask, 0UL);
XMC_FLASH_lLoadPageCommand(protection_mask, 0UL);
XMC_FLASH_lLoadPageCommand(password_0, password_1);
XMC_FLASH_lLoadPageCommand(password_0, password_1);
for (idx = 0U; idx < (XMC_FLASH_WORDS_PER_PAGE - XMC_FLASH_PROTECTION_CONFIGURATION_WORDS); idx += 2U)
{
XMC_FLASH_lLoadPageCommand(0UL, 0UL);
}
XMC_FLASH_lWriteUCBPageCommand((uint32_t *)((uint32_t)XMC_FLASH_UCB0 + (user * XMC_FLASH_BYTES_PER_UCB)));
/* wait until the operation is completed */
while ((FLASH0->FSR & (uint32_t)FLASH_FSR_PBUSY_Msk) != 0U){}
}
/*
* API to set the channel's output passive levels at the same time
*/
void XMC_BCCU_ConcurrentSetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t chan_mask, XMC_BCCU_CH_ACTIVE_LEVEL_t level)
{
XMC_ASSERT("XMC_BCCU_ConcurrentSetOutputPassiveLevel: Invalid channel mask", (chan_mask <= XMC_BCCU_CHANNEL_MASK));
bccu->CHOCON &= ~(uint32_t)(chan_mask);
bccu->CHOCON |= (chan_mask * (uint32_t)level);
}
/*
* API to initialize the PIN_INTERRUPT APP ERU Event Trigger Logic, Output Gating Unit Hardware initialization
* and NVIC node configuration.
*/
PIN_INTERRUPT_STATUS_t PIN_INTERRUPT_Init(const PIN_INTERRUPT_t *const handle)
{
XMC_ASSERT("PIN_INTERRUPT_Init: PIN_INTERRUPT APP handle function pointer uninitialized", (handle != NULL));
/* Initializes input pin characteristics */
XMC_GPIO_Init(handle->port, handle->pin, &handle->gpio_config);
/* ERU Event Trigger Logic Hardware initialization based on UI */
XMC_ERU_ETL_Init(handle->eru, handle->etl, &handle->etl_config);
/* OGU is configured to generate event on configured trigger edge */
XMC_ERU_OGU_SetServiceRequestMode(handle->eru, handle->ogu, XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER);
#if (UC_FAMILY == XMC1)
/* Configure NVIC node and priority */
NVIC_SetPriority((IRQn_Type)handle->IRQn, handle->irq_priority);
#else
/* Configure NVIC node, priority and subpriority */
NVIC_SetPriority((IRQn_Type)handle->IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),
handle->irq_priority, handle->irq_subpriority));
#endif
#if (UC_SERIES == XMC14)
XMC_SCU_SetInterruptControl((IRQn_Type)handle->IRQn, (XMC_SCU_IRQCTRL_t)handle->irqctrl);
#endif
if (true == handle->enable_at_init)
{
/* Clear pending interrupt before enabling it */
NVIC_ClearPendingIRQ((IRQn_Type)handle->IRQn);
/* Enable NVIC node */
NVIC_EnableIRQ((IRQn_Type)handle->IRQn);
}
return (PIN_INTERRUPT_STATUS_SUCCESS);
}
/* API to disable the POSIF module */
void XMC_POSIF_Disable(XMC_POSIF_t *const peripheral)
{
if (peripheral == POSIF0)
{
#if defined(PERIPHERAL_RESET_SUPPORTED)
XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_POSIF0);
#endif
#if defined(CLOCK_GATING_SUPPORTED)
XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF0);
#endif
}
#if defined(POSIF1)
else if (peripheral == POSIF1)
{
#if defined(PERIPHERAL_RESET_SUPPORTED)
XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_POSIF1);
#endif
#if defined(CLOCK_GATING_SUPPORTED)
XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF1);
#endif
}
#endif
else
{
XMC_ASSERT("XMC_POSIF_Disable:Invalid module pointer", 0);
}
}
/*
* This function is used to set RTC time.
*/
RTC_STATUS_t RTC_SetTime(XMC_RTC_TIME_t *current_time)
{
RTC_STATUS_t status = RTC_STATUS_SUCCESS;
XMC_RTC_TIME_t time_val;
XMC_ASSERT("RTC_SetTime: NULL pointer", current_time != NULL);
/* copy to local structure to keep data safe */
time_val.year = current_time->year;
time_val.month = current_time->month;
time_val.days = current_time->days;
time_val.hours = current_time->hours;
time_val.minutes = current_time->minutes;
time_val.seconds = current_time->seconds;
if ((time_val.days != 0U) && (time_val.month != 0U))
{
time_val.days = time_val.days - 1U;
time_val.month = time_val.month - 1U;
XMC_RTC_SetTime(&time_val);
}
else
{
status = RTC_STATUS_FAILURE;
}
return (status);
}
/* This API will Software trigger ADC Background request source and starts conversion*/
void ADC_MEASUREMENT_StartConversion(ADC_MEASUREMENT_t *const handle_ptr)
{
XMC_ASSERT("ADC_MEASUREMENT_Start:Invalid handle_ptr", (handle_ptr != NULL))
/* Generate a load event to start background request source conversion*/
XMC_VADC_GLOBAL_BackgroundTriggerConversion(handle_ptr->global_handle->module_ptr);
}
/**
* Set the number of LED column Enabled
*/
void XMC_LEDTS_SetNumOfLEDColumns(XMC_LEDTS_t *const ledts, uint8_t count)
{
XMC_ASSERT("XMC_LEDTS_SetNumOfLEDColumns:Wrong Module Pointer", XMC_LEDTS_CHECK_KERNEL_PTR(ledts));
ledts->FNCTL &= ~(LEDTS_FNCTL_NR_LEDCOL_Msk);
ledts->FNCTL |= (count << LEDTS_FNCTL_NR_LEDCOL_Pos);
}
/*Gets the status of CCU4_CC4 slice. */
bool PWM_CCU4_GetTimerStatus(PWM_CCU4_t* handle_ptr)
{
bool status_timer;
XMC_ASSERT("PWM_CCU4_GetTimerStatus:handle_ptr NULL", (handle_ptr != NULL));
status_timer = XMC_CCU4_SLICE_IsTimerRunning(handle_ptr->ccu4_slice_ptr);
return (status_timer);
} /* end of PWM_CCU4_GetStatus() api */
/*
* API to configure the fast clock prescaler factor of a BCCU module
*/
void XMC_BCCU_SetFastClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div)
{
XMC_ASSERT("XMC_BCCU_SetFastClockPrescaler: Invalid divider value", (div <= BCCU_GLOBCLK_FCLK_PS_Msk));
bccu->GLOBCLK &= ~(uint32_t)(BCCU_GLOBCLK_FCLK_PS_Msk);
bccu->GLOBCLK |= div;
}
/*
* API to configure the dimmer clock prescaler factor of a BCCU module
*/
void XMC_BCCU_SetDimClockPrescaler (XMC_BCCU_t *const bccu, uint32_t div)
{
XMC_ASSERT("XMC_BCCU_SetDimClockPrescaler: Invalid divider value", (div <= BCCU_GLOBCLK_DCLK_PS_Msk));
bccu->GLOBCLK &= ~(uint32_t)(BCCU_GLOBCLK_DCLK_PS_Msk);
bccu->GLOBCLK |= (uint32_t)(div << BCCU_GLOBCLK_DCLK_PS_Pos);
}
/*Gets the timer value of CCU4_CC4 slice. */
uint32_t PWM_CCU4_GetTimerValue(PWM_CCU4_t* handle_ptr)
{
uint32_t timer_value;
XMC_ASSERT("PWM_CCU4_GetTimerValue:handle_ptr NULL", (handle_ptr != NULL));
timer_value = (uint32_t) XMC_CCU4_SLICE_GetTimerValue(handle_ptr->ccu4_slice_ptr);
XMC_DEBUG("PWM_CCU4_GetTimerValue:timer value");
return (timer_value);
}/* end of PWM_CCU4_GetTimerValue() api */
/*
* Sets the RTC_TIM0, RTC_TIM1 registers with time values
*/
void XMC_RTC_SetTime(const XMC_RTC_TIME_t *const time)
{
XMC_ASSERT("XMC_RTC_SetTime:Wrong seconds value", ((uint32_t)time->seconds < XMC_RTC_MAXSECONDS));
XMC_ASSERT("XMC_RTC_SetTime:Wrong minutes value", ((uint32_t)time->minutes < XMC_RTC_MAXMINUTES));
XMC_ASSERT("XMC_RTC_SetTime:Wrong hours value", ((uint32_t)time->hours < XMC_RTC_MAXHOURS));
XMC_ASSERT("XMC_RTC_SetTime:Wrong month day value", ((uint32_t)time->days < XMC_RTC_MAXDAYS));
XMC_ASSERT("XMC_RTC_SetTime:Wrong week day value", ((uint32_t)time->daysofweek < XMC_RTC_MAXDAYSOFWEEK));
XMC_ASSERT("XMC_RTC_SetTime:Wrong month value", ((uint32_t)time->month < XMC_RTC_MAXMONTH));
XMC_ASSERT("XMC_RTC_SetTime:Wrong year value", ((uint32_t)time->year < XMC_RTC_MAXYEAR));
#if (XMC_RTC_INIT_SEQUENCE == 1U)
while ((XMC_SCU_GetMirrorStatus() & SCU_GENERAL_MIRRSTS_RTC_TIM0_Msk) != 0U)
{
/* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */
}
RTC->TIM0 = time->raw0;
while ((XMC_SCU_GetMirrorStatus() & SCU_GENERAL_MIRRSTS_RTC_TIM1_Msk) != 0U)
{
/* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */
}
RTC->TIM1 = time->raw1;
#endif
#if (XMC_RTC_INIT_SEQUENCE == 0U)
while ((XMC_SCU_GetMirrorStatus() & (SCU_GENERAL_MIRRSTS_RTC_TIM0_Msk | SCU_GENERAL_MIRRSTS_RTC_TIM1_Msk)) != 0U)
{
/* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */
}
RTC->TIM0 = time->raw0;
RTC->TIM1 = time->raw1; ;
#endif
}
/* Configure input selection for triggering shadow transfer */
void XMC_HRPWM_CSG_TriggerShadowXferConfig(XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
{
XMC_ASSERT("XMC_HRPWM_CSG_TriggerShadowXferConfig:Invalid CSG pointer", XMC_HRPWM_CHECK_CSG_PTR(csg));
csg->DCI &= ~((uint32_t)HRPWM0_CSG0_DCI_STIS_Msk);
csg->DCI |= ((uint32_t)config->mapped_input) << HRPWM0_CSG0_DCI_STIS_Pos;
csg->IES &= ~((uint32_t)HRPWM0_CSG_IES_STES_Msk);
csg->IES |= ((uint32_t)config->edge) << HRPWM0_CSG_IES_STES_Pos;
}
/*
* This function is used to get Alarm time from XMC.
* And returns in standard time format.
*/
void RTC_GetAlarmTime(XMC_RTC_ALARM_t *alarm)
{
XMC_ASSERT("RTC_GetAlarmTime: NULL pointer", alarm != NULL);
XMC_RTC_GetAlarm(alarm);
alarm->days = alarm->days + 1U;
alarm->month = alarm->month + 1U;
}
/* Configure input selection to trigger a switch in DAC reference value. This is only applicable to DAC in static mode */
void XMC_HRPWM_CSG_DACRefValSwitchingConfig(XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
{
XMC_ASSERT("XMC_HRPWM_CSG_DACRefValSwitchingConfig:Invalid CSG pointer", XMC_HRPWM_CHECK_CSG_PTR(csg));
csg->DCI &= ~((uint32_t)HRPWM0_CSG0_DCI_SVIS_Msk);
csg->DCI |= ((uint32_t)config->mapped_input) << HRPWM0_CSG0_DCI_SVIS_Pos;
csg->IES &= ~((uint32_t)HRPWM0_CSG_IES_SVLS_Msk);
csg->IES |= ((uint32_t)config->level) << HRPWM0_CSG_IES_SVLS_Pos;
}
/*
* This function is used to get RTC time.
*/
void RTC_GetTime(XMC_RTC_TIME_t *current_time)
{
XMC_ASSERT("RTC_GetTime: NULL pointer", current_time != NULL);
XMC_RTC_GetTime(current_time);
current_time->days = current_time->days + 1U;
current_time->month = current_time->month + 1U;
}
/*
* Configures the SDRAM region for read and write operation
*/
void XMC_EBU_ConfigureRegion(XMC_EBU_t *const ebu,const XMC_EBU_REGION_t *const region)
{
XMC_ASSERT("XMC_EBU_Init: Invalid module pointer", XMC_EBU_CHECK_MODULE_PTR(ebu));
XMC_ASSERT("XMC_EBU_Init:Null Pointer", (region != (XMC_EBU_REGION_t *)NULL));
/* Read configuration of the region*/
ebu->BUS[region->read_config.ebu_region_no].RDCON = region->read_config.ebu_bus_read_config.raw0;
/* Read parameters of the region*/
ebu->BUS[region->read_config.ebu_region_no].RDAPR = region->read_config.ebu_bus_read_config.raw1;
/* Write configuration of the region*/
ebu->BUS[region->write_config.ebu_region_no].WRCON = region->write_config.ebu_bus_write_config.raw0;
/* Write parameters of the region*/
ebu->BUS[region->write_config.ebu_region_no].WRAPR = region->write_config.ebu_bus_write_config.raw1;
}
/* API to initialize multi-channel mode.
* This is used in Hall mode, standalone multi-channel mode and quadrature with multi-channel mode
*/
XMC_POSIF_STATUS_t XMC_POSIF_MCM_Init(XMC_POSIF_t *const peripheral, const XMC_POSIF_MCM_CONFIG_t * const config)
{
XMC_POSIF_STATUS_t retval;
XMC_ASSERT("XMC_POSIF_MCM_Init:Invalid module pointer", XMC_POSIF_IsPeripheralValid(peripheral));
XMC_ASSERT("XMC_POSIF_MCM_Init:NULL Pointer", (config != (XMC_POSIF_MCM_CONFIG_t *)NULL) );
if ((XMC_POSIF_MODE_t)((peripheral->PCONF) & (uint32_t)POSIF_PCONF_FSEL_Msk) != XMC_POSIF_MODE_QD)
{
peripheral->PCONF |= config->mcm_config;
retval = XMC_POSIF_STATUS_OK;
}
else
{
retval = XMC_POSIF_STATUS_ERROR;
}
return retval;
}