/**
*
* This function returns the interrupt status read from Interrupt Status
* Register(IPISR). Use the XSM_IPIXR_* constants defined in xsysmon_hw.h
* to interpret the returned value.
*
* @param	InstancePtr is a pointer to the XSysMon instance.
*
* @return	A 32-bit value representing the contents of the IPISR.
*
* @note		The device must be configured at hardware build time to include
*		interrupt component for this function to work.
*
*****************************************************************************/
u32 XSysMon_IntrGetStatus(XSysMon *InstancePtr)
{
	/*
	 * Assert the arguments.
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertNonvoid(InstancePtr->Config.IncludeInterrupt == TRUE);

	/*
	 * Return the value read from the Interrupt Status register.
	 */
	return XSysMon_ReadReg(InstancePtr->Config.BaseAddress,
				XSM_IPISR_OFFSET) & XSM_IPIXR_ALL_MASK;
}
/**
*
* This function disables the specified interrupts in the device.
*
* @param	InstancePtr is a pointer to the XSysMon instance.
* @param	Mask is the bit-mask of the interrupts to be disabled.
*		Bit positions of 1 will be disabled. Bit positions of 0 will
*		keep the previous setting. This mask is formed by OR'ing
*		XSM_IPIXR_* bits defined in xsysmon_hw.h.
*
* @return	None.
*
* @note		The device must be configured at hardware build time to include
*		interrupt component for this function to work.
*
*****************************************************************************/
void XSysMon_IntrDisable(XSysMon *InstancePtr, u32 Mask)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid(InstancePtr->Config.IncludeInterrupt == TRUE);

	/*
	 * Disable the specified interrupts in the IPIER.
	 */
	RegValue = XSysMon_ReadReg(InstancePtr->Config.BaseAddress,
				    XSM_IPIER_OFFSET);
	RegValue &= ~(Mask & XSM_IPIXR_ALL_MASK);
	XSysMon_WriteReg(InstancePtr->Config.BaseAddress, XSM_IPIER_OFFSET,
			  RegValue);
}
/**
*
* This function runs a test on the System Monitor device using the
* basic driver functions.
* The function does the following tasks:
*	- Reset the device
*	- Setup alarm thresholds for on-chip temperature and VCCAUX.
*	- Setup sequence registers to continuously monitor on-chip temperature
*	 and VCCAUX.
*	- Setup configuration registers to start the sequence.
*	- Read latest on-chip temperature and VCCAUX, as well as their maximum
*	 and minimum values. Also check if alarm(s) are set.
*
* @param	BaseAddress is the XPAR_<SYSMON_ADC_instance>_BASEADDRESS value
*		from xparameters.h.
*
* @return	XST_SUCCESS
*
* @note		None.
*
****************************************************************************/
int SysMonLowLevelExample(u32 BaseAddress)
{
	u32 RegValue;
	u16 TempData;
	u16 VccauxData;

	/*
	 * Reset the device.
	 */
	XSysMon_WriteReg(BaseAddress, XSM_SRR_OFFSET, XSM_SRR_IPRST_MASK);

	/*
	 * Disable the Channel Sequencer before configuring the Sequence
	 * registers.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_CFR1_OFFSET) &
			(~ XSM_CFR1_SEQ_VALID_MASK);
	XSysMon_WriteReg(BaseAddress, XSM_CFR1_OFFSET,	RegValue |
				XSM_CFR1_SEQ_SAFEMODE_MASK);


	/*
	 * Setup the Averaging to be done for the channels in the
	 * Configuration 0 register as 16 samples:
	 */
	RegValue = XSysMon_ReadReg(BaseAddress,
				XSM_CFR0_OFFSET) & (~XSM_CFR0_AVG_VALID_MASK);
	XSysMon_WriteReg(BaseAddress, XSM_CFR0_OFFSET,
				RegValue | XSM_CFR0_AVG16_MASK);

	/*
	 * Setup the Sequence register for 1st Auxiliary channel
	 * Setting is:
	 *	- Add acquisition time by 6 ADCCLK cycles.
	 *	- Bipolar Mode
	 *
	 * Setup the Sequence register for 16th Auxiliary channel
	 * Setting is:
	 *	- Add acquisition time by 6 ADCCLK cycles.
	 *	- Unipolar Mode
	 */

	/*
	 *  Set the Acquisition time for the specified channels.
	 */
	XSysMon_WriteReg(BaseAddress,XSM_SEQ07_OFFSET,
				(XSM_SEQ_CH_AUX00 | XSM_SEQ_CH_AUX15) >>
				XSM_SEQ_CH_AUX_SHIFT);

	/*
	 *  Set the input mode for the specified channels.
	 */
	XSysMon_WriteReg(BaseAddress, XSM_SEQ05_OFFSET,
				XSM_SEQ_CH_AUX00 >> XSM_SEQ_CH_AUX_SHIFT);



	/*
	 * Enable the averaging on the following channels in the Sequencer
	 * registers:
	 * 	- On-chip Temperature
	 * 	- On-chip VCCAUX supply sensor
	 * 	- 1st Auxiliary Channel
	 * 	- 16th Auxiliary Channel
	 */
	XSysMon_WriteReg(BaseAddress,XSM_SEQ02_OFFSET,
				XSM_SEQ_CH_TEMP | XSM_SEQ_CH_VCCAUX);

	XSysMon_WriteReg(BaseAddress, XSM_SEQ03_OFFSET,
				(XSM_SEQ_CH_AUX00 | XSM_SEQ_CH_AUX15) >>
				XSM_SEQ_CH_AUX_SHIFT);


	/*
	 * Enable the following channels in the Sequencer registers:
	 * 	- On-chip Temperature
	 * 	- On-chip VCCAUX supply sensor
	 * 	- 1st Auxiliary Channel
	 * 	- 16th Auxiliary Channel
	 */
	XSysMon_WriteReg(BaseAddress, XSM_SEQ00_OFFSET,
				XSM_SEQ_CH_TEMP | XSM_SEQ_CH_VCCAUX);
	XSysMon_WriteReg(BaseAddress, XSM_SEQ01_OFFSET,
				(XSM_SEQ_CH_AUX00 | XSM_SEQ_CH_AUX15) >>
				XSM_SEQ_CH_AUX_SHIFT);


	/*
	 * Set the ADCCLK frequency equal to 1/32 of System clock for the System
	 * Monitor/ADC in the Configuration Register 2.
	 */
	XSysMon_WriteReg(BaseAddress, XSM_CFR2_OFFSET, 32 <<
					XSM_CFR2_CD_SHIFT);


	/*
	 * Enable the Channel Sequencer in continuous sequencer cycling mode.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_CFR1_OFFSET) &
			(~ XSM_CFR1_SEQ_VALID_MASK);
	XSysMon_WriteReg(BaseAddress, XSM_CFR1_OFFSET,	RegValue |
				XSM_CFR1_SEQ_CONTINPASS_MASK);


	/*
	 * Wait till the End of Sequence occurs
	 */
	XSysMon_ReadReg(BaseAddress, XSM_SR_OFFSET); /* Clear the old status */
	while (((XSysMon_ReadReg(BaseAddress, XSM_SR_OFFSET)) &
			XSM_SR_EOS_MASK) != XSM_SR_EOS_MASK);


	/*
	 * Read the current value of the on-chip temperature.
	 */
	TempData = XSysMon_ReadReg(BaseAddress, XSM_TEMP_OFFSET);
	/*
	 * Read the current value of the on-chip VCCAUX voltage.
	 */
	VccauxData = XSysMon_ReadReg(BaseAddress, XSM_VCCAUX_OFFSET);


	/*
	 * Disable all the alarms in the Configuration Register 1.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_CFR1_OFFSET);
	RegValue |= XSM_CFR1_ALM_ALL_MASK;
	XSysMon_WriteReg(BaseAddress, XSM_CFR1_OFFSET, RegValue);

	/*
	 * Setup Alarm threshold registers for
	 * On-chip Temperature High limit
	 * VCCAUX High limit
	 * VCCAUX Low limit
	 */
	XSysMon_WriteReg(BaseAddress, XSM_ATR_TEMP_UPPER_OFFSET,
					TempData - 0x6F);
	XSysMon_WriteReg(BaseAddress, XSM_ATR_VCCAUX_UPPER_OFFSET,
					VccauxData - 0x6F);
	XSysMon_WriteReg(BaseAddress, XSM_ATR_VCCAUX_LOWER_OFFSET,
					VccauxData + 0x6F);


	/*
	 * Enable Alarm 0 for on-chip temperature and Alarm 2 for on-chip
	 * VCCAUX in the Configuration Register 1.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress,
				XSM_CFR1_OFFSET) & (~XSM_CFR1_ALM_ALL_MASK);
	RegValue |= ((~(XSM_CFR1_ALM_VCCAUX_MASK | XSM_CFR1_ALM_TEMP_MASK)) &
				XSM_CFR1_ALM_ALL_MASK);
	XSysMon_WriteReg(BaseAddress, XSM_CFR1_OFFSET, RegValue);



	/*
	 * Read the current value of on-chip temperature.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_TEMP_OFFSET);

	/*
	 * Read the Maximum value of on-chip temperature.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_MAX_TEMP_OFFSET);

	/*
	 * Read the Minimum value of on-chip temperature.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_MIN_TEMP_OFFSET);

	/*
	 * Check if alarm for on-chip temperature is set.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_AOR_OFFSET) &
			XSM_AOR_TEMP_MASK;
	if (RegValue) {
		/*
		 * Alarm for on-chip temperature is set.
		 * The required processing should be put here.
		 */
	}


	/*
	 * Read the current value of on-chip VCCAUX.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_VCCAUX_OFFSET);

	/*
	 * Read the Maximum value of on-chip VCCAUX.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_MAX_VCCAUX_OFFSET);

	/*
	 * Read the Minimum value of on-chip VCCAUX.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_MIN_VCCAUX_OFFSET);

	/*
	 * Check if the alarm for on-chip VCCAUX is set.
	 */
	RegValue = XSysMon_ReadReg(BaseAddress, XSM_AOR_OFFSET) &
				XSM_AOR_VCCAUX_MASK;
	if (RegValue) {
		/*
		 * Alarm for on-chip VCCAUX is set.
		 * The required processing should be put here.
		 */
	}

	return XST_SUCCESS;
}