// Scan the current PSound z80 state
int PsndZScan(int nAction)
{
struct BurnArea ba;
int i=0;
ZetScan(nAction); // Scan Z80
SCAN_VAR(nTimerPeriod)
SCAN_VAR(nNextTimer)
SCAN_VAR(FmReg)
SCAN_VAR(nFmSel)
SCAN_VAR(nPsndZBank)
// Scan Ram
memset(&ba,0,sizeof(ba));
ba.szName="PsndZRam";
ba.Data=PsndZRam;
ba.nLen=0x800;
BurnAcb(&ba);
if (nAction&2)
{
PsndZBankMap(); // If write, bank could have changed
CalcTimerPeriod(); // If write, timer registers could have changed
// Resend all the registers to the ym2151
if (bPsmOkay)
{
for (i=0; i<0x100; i++)
{
YM2151WriteReg(0,i,FmReg[i]);
}
}
}
return 0;
}
static void OD_Write(unsigned int address, unsigned int data)
{
if (address == 0x200)
{
ym2151_last_adr = data;
return;
}
if (address == 0x201)
{
YM2151WriteReg(0, ym2151_last_adr, data);
return;
}
if (address >= 0x400 && address <= 0x42f)
{
K053260_0_w(address&0x3f, data);
return;
}
if (address >= 0x600 && address <= 0x62f)
{
K053260_1_w(address&0x3f, data);
return;
}
if (address >= 0x800 && address <= 0xfff)
{
workram[address-0x800] = data;
return;
}
// printf("Unmapped write %x to %x\n", data, address);
}
static void write_memory_8(unsigned int address, unsigned int data)
{
if (address < 0x004000)
workram[address] = data;
else if ((address >= 0x4000) && (address < 0x8000))
workram[0x10000 + (address & 0x3fff)] = data;
else if (address == 0x400001)
ym2151_last_adr = data;
else if (address == 0x400003)
YM2151WriteReg(0, ym2151_last_adr, data);
else if (address == 0x400005)
OKIM6295_data_0_w(0, data);
else if ((address >= 0xc00000) && (address < 0xc08000))
workram[address & 0x7fff] = data;
else if ((address >= 0xfe0000) && (address < 0xffffff))
workram[0x10000 + (address & 0x1ffff)] = data;
else
printf("W8: %x @ %x (PC=%x)\n", data, address, m68k_get_reg(NULL, M68K_REG_PC));
}
void ym2151Write(YM2151* ym2151, UInt16 ioPort, UInt8 value)
{
switch (ioPort & 1) {
case 0:
ym2151->latch = value;
break;
case 1:
mixerSync(ym2151->mixer);
YM2151WriteReg(ym2151->opl, ym2151->latch, value);
break;
}
}
void YM2151_data_port_2_w(int offset,int data)
{
switch(FMMode)
{
case CHIP_YM2151_DAC:
YM2151Write(2,0,lastreg2);
YM2151Write(2,1,data);
break;
case CHIP_YM2151_ALT:
YM2151UpdateRequest(2);
YM2151WriteReg(2,lastreg2,data);
break;
case CHIP_YM2151_OPL:
opm_to_opn(2,lastreg2,data);
break;
}
}
void BurnYM2151Scan(INT32 nAction)
{
#if defined FBA_DEBUG
if (!DebugSnd_YM2151Initted) bprintf(PRINT_ERROR, _T("BurnYM2151Scan called without init\n"));
#endif
if ((nAction & ACB_DRIVER_DATA) == 0) {
return;
}
SCAN_VAR(nBurnCurrentYM2151Register);
SCAN_VAR(BurnYM2151Registers);
if (nAction & ACB_WRITE) {
for (INT32 i = 0; i < 0x0100; i++) {
YM2151WriteReg(0, i, BurnYM2151Registers[i]);
}
}
}
void YM2151_data_port_0_w(int offset,int data)
{
mame4all_prof_start(6);
switch(FMMode)
{
case CHIP_YM2151_DAC:
YM2151Write(0,0,lastreg0);
YM2151Write(0,1,data);
break;
case CHIP_YM2151_ALT:
YM2151UpdateRequest(0);
YM2151WriteReg(0,lastreg0,data);
break;
case CHIP_YM2151_OPL:
opm_to_opn(0,lastreg0,data);
break;
}
mame4all_prof_end(6);
}
// PSound Z80 memory write
static void PsndZWrite(unsigned short a,unsigned char d)
{
if (a==0xf000)
{
nFmSel=d; // FM Register select
return;
}
if (a==0xf001)
{
// FM Register write
FmReg[nFmSel]=d;
// Write the register to the chip emu
if (bPsmOkay)
{
YM2151WriteReg(0,nFmSel,d);
}
if (nFmSel==0x10 || nFmSel==0x11)
{
CalcTimerPeriod(); // recalc timer period
}
return;
}
if (a==0xf002)
{
PsaWrite(d);
return;
}
if (a==0xf004)
{
int nNewBank;
nNewBank=d&0x0f;
if (nPsndZBank!=nNewBank)
{
nPsndZBank=nNewBank;
PsndZBankMap();
}
}
}
