static void OpndSizeIf( bool if_32 )
/**********************************/
{
if( ( if_32 && _IsTargetModel( USE_32 ) ) || _IsntTargetModel( USE_32 ) ) {
AddToTemp( M_OPND_SIZE );
}
}
extern void DoRepOp( instruction *ins )
/*****************************************/
{
type_length size;
bool first;
size = ins->result->n.size;
first = true;
if( ins->head.opcode == OP_MOV && !UseRepForm( size ) ) {
for( ; size >= 4; size -= 4 ) {
if( first ) {
LayOpbyte( M_MOVSW );
OpndSizeIf( false );
first = false;
} else {
if( _IsntTargetModel( USE_32 ) ) AddByte( M_OPND_SIZE );
AddByte( M_MOVSW );
}
}
TakeUpSlack( size );
} else {
LayOpbyte( M_REPE );
if( ins->head.opcode == OP_MOV ) {
if( ( size & ( 4 - 1 ) ) == 0 || OptForSize <= 50 ) {
if( _IsntTargetModel( USE_32 ) ) AddByte( M_OPND_SIZE );
AddByte( M_MOVSW );
TakeUpSlack( size & ( 4 - 1 ) );
} else {
AddByte( M_MOVSB );
}
} else {
if( ins->operands[1]->n.size & 1 ) {
AddByte( M_CMPSB );
} else {
AddByte( M_CMPSW );
if( _IsntTargetModel( USE_32 ) ) AddByte( M_OPND_SIZE );
}
}
}
}
void ScInitRegs( score *scoreboard )
/**************************************
Add some register equality "truths" to the scoreboard "sc"
*/
{
int xs;
int ds;
ds = AllocRegName( HW_DS )->r.reg_index;
if( _IsntTargetModel( FLOATING_DS ) ) {
if( _IsntTargetModel( FLOATING_ES ) ) {
xs = AllocRegName( HW_ES )->r.reg_index;
if( !RegsEqual( scoreboard, xs, ds ) ) {
RegInsert( scoreboard, xs, ds );
}
}
if( _IsntTargetModel( FLOATING_SS ) ) {
xs = AllocRegName( HW_SS )->r.reg_index;
if( !RegsEqual( scoreboard, xs, ds ) ) {
RegInsert( scoreboard, xs, ds );
}
}
}
}
void ScInitRegs( score *sc )
/**************************************
Add some register equality "truths" to the scoreboard "sc"
*/
{
int ss;
int ds;
if( _IsntTargetModel( FLOATING_DS | FLOATING_SS ) ) {
ss = AllocRegName(HW_SS)->r.reg_index;
ds = AllocRegName(HW_DS)->r.reg_index;
if( RegsEqual( sc, ss, ds ) == false ) {
RegInsert( sc, ss, ds );
}
}
}
extern void DFLineNum( cue_state *state, offset lc ){
/*******************************************************/
char *fname;
if( NeedBaseSet() ){
back_handle bck;
bck = MakeLabel();
OutLabel( bck->lbl );
DWLineAddr( Client, (dw_sym_handle)bck, lc );
#if _TARGET & ( _TARG_IAPX86 | _TARG_80386 )
if( _IsntTargetModel( FLAT_MODEL ) ) {
DWLineSeg( Client, (dw_sym_handle)bck );
}
#endif
BEFreeBack( bck );
}
if( state->fno != CurrFNo ){
fname = SrcFNoFind( state->fno );
DWSetFile( Client, fname );
CurrFNo = state->fno;
}
DWLineNum( Client, DW_LN_STMT, state->line, state->col, lc );
}
static void PostOptimize( void )
/******************************************/
{
if( _IsntModel( NO_OPTIMIZATION ) ) {
// Run peephole optimizer again. Important: It is critical that the
// new instructions can be directly generated because RegAlloc is
// done by now. PeepOpt() is responsible for verifying that.
if( PeepOpt( HeadBlock, NextBlock, NULL, TRUE ) ) {
LiveInfoUpdate();
}
// this is important as BuildIndex cannot handle instructions with no operands
DeadInstructions();
BuildIndex();
DeadInstructions();
}
MergeIndex();
if( _IsntModel( NO_OPTIMIZATION ) ) {
#if !(_TARGET & _TARG_RISC)
//
// Calling Conditions() at this point has nice optimization effect,
// but doesn't working correctly right now. It optimizes conditions
// making them dependent from previous conditions codes, but riscifier
// generates XOR's which will trash cond. codes. Either Conditions()
// either riscifier must be fixed to handle this situation.
//
#if 0
// Get rid of unused conditions on variables level
// to decrease number of referenced vars in LdStAlloc() and Score()
if( _IsntTargetModel( STATEMENT_COUNTING ) ) {
Conditions();
DeadInstructions(); // cleanup junk after Conditions()
}
#endif
#endif
// OptCloseMoves(); // todo: merge constant moves before riscifier
LdStAlloc();
Score();
DeadInstructions(); // cleanup junk after Score()
// deRISCify before LoopRegInvariant() or Shedule() are run:
// they're moving RISCified pair.
LdStCompress();
// Reuse registers freed by deriscifier
Score();
DeadInstructions(); // cleanup junk after Score()
if( !BlockByBlock ) LoopRegInvariant();
#if !(_TARGET & _TARG_RISC)
// Get rid of remaining unused conditions on register level.
if( _IsntTargetModel( STATEMENT_COUNTING ) ) {
Conditions();
}
#endif
}
FPExpand();
if( _IsntModel( NO_OPTIMIZATION ) ) {
DeadInstructions(); // cleanup junk after Conditions()
// Run scheduler last, when all instructions are stable
if( _IsModel( INS_SCHEDULING ) ) {
HaveLiveInfo = FALSE;
Schedule(); /* NOTE: Schedule messes up live information */
LiveInfoUpdate();
HaveLiveInfo = TRUE;
}
// run this again in case Scheduler messed around with indices
if( PeepOpt( HeadBlock, NextBlock, NULL, TRUE ) ) {
LiveInfoUpdate();
}
}
FPOptimize();
}
static void CLIReloc( dw_sectnum sect, dw_relocs reloc_type, ... ){
/******************************************************/
static uint_32 const zero = 0;
sect_info *curr;
dw_sym_handle sym;
dw_sym_handle bck;
loc_range *low;
loc_range *high;
dw_sectnum section;
va_list args;
segment_id old;
// long_offset off;
va_start( args, reloc_type );
curr = &DwarfSegs[sect];
old = SetOP( curr->seg );
// off = AskBigLocation();
switch( reloc_type ) {
case DW_W_LOW_PC:
if( Pc_Low != NULL ){
DoLblReloc( Pc_Low, 0 );
}else{
Zoiks( ZOIKS_107 ); /* No Low PC */
}
break;
case DW_W_HIGH_PC:
if( Pc_High != NULL ){
DoLblReloc( Pc_High, 0 );
}else{
Zoiks( ZOIKS_107 ); /* No High PC */
}
break;
case DW_W_STATIC:
sym = va_arg( args, dw_sym_handle );
DoReloc( sym, 0 );
break;
case DW_W_LABEL:
bck = va_arg( args, dw_sym_handle );
DoLblReloc( (back_handle)bck, 0 );
break;
case DW_W_SEGMENT:
sym = va_arg( args, dw_sym_handle );
DoSegReloc( sym );
break;
case DW_W_LABEL_SEG:
bck = va_arg( args, dw_sym_handle );
DoSegLblReloc( (back_handle)bck );
break;
case DW_W_LOC_RANGE:
low = va_arg( args, loc_range* );
high = va_arg( args, loc_range* );
DoLblReloc( low->bck, low->disp );
DoLblReloc( high->bck, high->disp );
break;
case DW_W_DEFAULT_FUNCTION:
break;
case DW_W_ARANGE_ADDR:
DoLblReloc( ARange, 0 );
#if _TARGET & ( _TARG_IAPX86 | _TARG_80386 )
if( _IsntTargetModel( FLAT_MODEL ) ) {
DoSegLblReloc( ARange );
}
#endif
break;
case DW_W_UNIT_SIZE:
UnitSize->segment = curr->seg;
UnitSize->offset = AskBigLocation();
DataBytes( sizeof( zero ), &zero );
break;
case DW_W_SECTION_POS:
section = va_arg( args, uint );
DoSectOffset( section );
break;
case DW_W_EXT_REF:
{
long_offset disp;
sym = va_arg( args, dw_sym_handle );
disp = va_arg( args, dw_addr_offset );
DoReloc( sym, disp );
// DFFEPtrRef( (cg_sym_handle)sym, disp );
break;
}
default:
abort();
break;
}
SetOP( old );
}
