/*FUNCTION********************************************************************** * * Function Name : OSA_TimeGetMsec * Description : This function gets current time in milliseconds. * *END**************************************************************************/ uint32_t OSA_TimeGetMsec(void) { portTickType ticks; if (__get_IPSR()) { ticks = xTaskGetTickCountFromISR(); } else { ticks = xTaskGetTickCount(); } return ticks * portTICK_RATE_MS; }
/*FUNCTION********************************************************************** * * Function Name : OSA_EventClear * Description : Clear one or more event flags of an event object. * Return kStatus_OSA_Success if clear successfully, kStatus_OSA_Error if failed. * *END**************************************************************************/ osa_status_t OSA_EventClear(event_t *pEvent, event_flags_t flagsToClear) { assert(pEvent); if (__get_IPSR()) { xEventGroupClearBitsFromISR(pEvent->eventHandler, flagsToClear); } else { xEventGroupClearBits(pEvent->eventHandler, flagsToClear); } return kStatus_OSA_Success; }
os_error_t os_arch_os_init(void) { os_error_t err; int i; /* Cannot be called within an ISR */ err = OS_ERR_IN_ISR; if (__get_IPSR() == 0) { err = OS_OK; /* Drop priority for all interrupts */ for (i = 0; i < sizeof(NVIC->IP); i++) { NVIC->IP[i] = -1; } NVIC_SetVector(SVCall_IRQn, (uint32_t)SVC_Handler); NVIC_SetVector(PendSV_IRQn, (uint32_t)PendSV_Handler); NVIC_SetVector(SysTick_IRQn, (uint32_t)SysTick_Handler); /* * Install default interrupt handler, which'll print out system * state at the time of the interrupt, and few other regs which * should help in trying to figure out what went wrong. */ NVIC_SetVector(NonMaskableInt_IRQn, (uint32_t)os_default_irq_asm); NVIC_SetVector(HardFault_IRQn, (uint32_t)os_default_irq_asm); NVIC_SetVector(-13, (uint32_t)os_default_irq_asm); /* Hardfault */ for (i = 0; i < NVIC_NUM_VECTORS - NVIC_USER_IRQ_OFFSET; i++) { NVIC_SetVector(i, (uint32_t)os_default_irq_asm); } /* Set the PendSV interrupt exception priority to the lowest priority */ NVIC_SetPriority(PendSV_IRQn, PEND_SV_PRIO); /* Set the SVC interrupt to priority 0 (highest configurable) */ NVIC_SetPriority(SVCall_IRQn, SVC_PRIO); /* Check if privileged or not */ if ((__get_CONTROL() & 1) == 0) { os_arch_init(); } else { svc_os_arch_init(); } } return err; }
/*FUNCTION********************************************************************** * * Function Name : OSA_InterruptEnable * Description : self explanatory. * *END**************************************************************************/ void OSA_InterruptEnable(void) { if (__get_IPSR()) { if(g_base_priority_top) { g_base_priority_top--; portCLEAR_INTERRUPT_MASK_FROM_ISR(g_base_priority_array[g_base_priority_top]); } } else { portEXIT_CRITICAL(); } }
/*FUNCTION********************************************************************** * * Function Name : OSA_InterruptDisable * Description : self explanatory. * *END**************************************************************************/ void OSA_InterruptDisable(void) { if (__get_IPSR()) { if(g_base_priority_top < OSA_MAX_ISR_CRITICAL_SECTION_DEPTH) { g_base_priority_array[g_base_priority_top] = portSET_INTERRUPT_MASK_FROM_ISR(); g_base_priority_top++; } } else { portENTER_CRITICAL(); } }
os_error_t os_arch_os_start(void) { os_error_t err; err = OS_ERR_IN_ISR; if (__get_IPSR() == 0) { /* * The following switch statement is really just a sanity check to * insure that the os initialization routine was called prior to the * os start routine. */ err = OS_OK; switch (__get_CONTROL() & 0x03) { /* * These two cases are for completeness. Thread mode should be set * to use PSP already. * * Fall-through intentional! */ case 0x00: case 0x01: err = OS_ERR_PRIV; break; case 0x02: /* Privileged Thread mode w/SP = PSP */ if ((os_flags & 1) == 0) { err = OS_ERR_PRIV; } break; case 0x03: /* Unpriviliged thread mode w/sp = PSP */ if (os_flags & 1) { err = OS_ERR_PRIV; } break; } if (err == OS_OK) { /* Always start OS through SVC call */ svc_os_arch_start(); } } return err; }
/*FUNCTION********************************************************************** * * Function Name : OSA_EventSet * Description : Set one or more event flags of an event object. * Return kStatus_OSA_Success if set successfully, kStatus_OSA_Error if failed. * *END**************************************************************************/ osa_status_t OSA_EventSet(event_t *pEvent, event_flags_t flagsToSet) { assert(pEvent); portBASE_TYPE taskToWake = pdFALSE; if (__get_IPSR()) { xEventGroupSetBitsFromISR(pEvent->eventHandler, flagsToSet, &taskToWake); if (pdTRUE == taskToWake) { vPortYieldFromISR(); } } else { xEventGroupSetBits(pEvent->eventHandler, flagsToSet); } return kStatus_OSA_Success; }
/*FUNCTION********************************************************************** * * Function Name : OSA_SemaphorePost * Description : This function is used to wake up one task that wating on the * semaphore. If no task is waiting, increase the semaphore. The function returns * osaStatus_Success if the semaphre is post successfully, otherwise returns * osaStatus_Error. * *END**************************************************************************/ osaStatus_t OSA_SemaphorePost(osaSemaphoreId_t semId) { #if osNumberOfSemaphores osaStatus_t status = osaStatus_Error; if(semId) { semaphore_t sem = (semaphore_t)semId; if (__get_IPSR()) { portBASE_TYPE taskToWake = pdFALSE; if (pdTRUE==xSemaphoreGiveFromISR(sem, &taskToWake)) { if (pdTRUE == taskToWake) { portYIELD_FROM_ISR(taskToWake); } status = osaStatus_Success; } else { status = osaStatus_Error; } } else { if (pdTRUE == xSemaphoreGive(sem)) { status = osaStatus_Success; /* sync object given */ } else { status = osaStatus_Error; } } } return status; #else (void)semId; return osaStatus_Error; #endif }
/*FUNCTION********************************************************************** * * Function Name : OSA_MsgQPut * Description : This function is used to put a message to a message queue. * Return : osaStatus_Success if the message is put successfully, otherwise return osaStatus_Error. * *END**************************************************************************/ osaStatus_t OSA_MsgQPut(osaMsgQId_t msgQId, void* pMessage) { #if osNumberOfMessageQs msg_queue_handler_t handler; osaStatus_t osaStatus; if(msgQId == NULL) { return osaStatus_Error; } handler = (msg_queue_handler_t)msgQId; { if (__get_IPSR()) { portBASE_TYPE taskToWake = pdFALSE; if (pdTRUE == xQueueSendToBackFromISR(handler, pMessage, &taskToWake)) { if (pdTRUE == taskToWake) { portYIELD_FROM_ISR(taskToWake); } osaStatus = osaStatus_Success; } else { osaStatus = osaStatus_Error; } } else { osaStatus = (xQueueSendToBack(handler, pMessage, 0)== pdPASS)?(osaStatus_Success):(osaStatus_Error); } } return osaStatus; #else (void)msgQId; (void)pMessage; return osaStatus_Error; #endif }
void OSA_EnterCritical(osa_critical_section_mode_t mode) { if (kCriticalDisableInt == mode) { if (__get_IPSR()) { assert(g_base_priority_top < OSA_MAX_ISR_CRITICAL_SECTION_DEPTH); g_base_priority_array[g_base_priority_top] = portSET_INTERRUPT_MASK_FROM_ISR(); g_base_priority_top++; } else { portENTER_CRITICAL(); } } else { vTaskSuspendAll(); } }
/*FUNCTION********************************************************************** * * Function Name : OSA_ExitCritical * Description : This function is used to exit critical section. * *END**************************************************************************/ void OSA_ExitCritical(osa_critical_section_mode_t mode) { if (kCriticalDisableInt == mode) { if (__get_IPSR()) { g_base_priority_top--; assert(g_base_priority_top >= 0); portCLEAR_INTERRUPT_MASK_FROM_ISR(g_base_priority_array[g_base_priority_top]); } else { portEXIT_CRITICAL(); } } else { xTaskResumeAll(); } }
/*FUNCTION********************************************************************** * * Function Name : OSA_EventSet * Description : Set one or more event flags of an event object. * Return : osaStatus_Success if set successfully, osaStatus_Error if failed. * *END**************************************************************************/ osaStatus_t OSA_EventSet(osaEventId_t eventId, osaEventFlags_t flagsToSet) { #if osNumberOfEvents osEventStruct_t* pEventStruct; portBASE_TYPE taskToWake = pdFALSE; if(osObjectIsAllocated(&osEventInfo, eventId) == FALSE) { return osaStatus_Error; } pEventStruct = (osEventStruct_t*)eventId; if(pEventStruct->event.eventHandler == NULL) { return osaStatus_Error; } if (__get_IPSR()) { if (pdPASS != xEventGroupSetBitsFromISR(pEventStruct->event.eventHandler, (event_flags_t)flagsToSet, &taskToWake)) { panic(0,(uint32_t)OSA_EventSet,0,0); return osaStatus_Error; } if (pdTRUE == taskToWake) { portYIELD_FROM_ISR(taskToWake); } } else { xEventGroupSetBits(pEventStruct->event.eventHandler, (event_flags_t)flagsToSet); } return osaStatus_Success; #else (void)eventId; (void)flagsToSet; return osaStatus_Error; #endif }
void HAL_Delay(uint32_t Delay) { /* Delay for amount of milliseconds */ /* Check if we are called from ISR */ if (__get_IPSR() == 0) { /* Called from thread mode */ uint32_t tickstart = HAL_GetTick(); /* Count interrupts */ while ((HAL_GetTick() - tickstart) < Delay) { #ifdef DELAY_SLEEP /* Go sleep, wait systick interrupt */ __WFI(); #endif } } else { /* Called from interrupt mode */ while (Delay) { /* Check if timer reached zero after we last checked COUNTFLAG bit */ if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) { Delay--; } } } }
os_error_t os_arch_os_init(void) { os_error_t err; /* Cannot be called within an ISR */ err = OS_ERR_IN_ISR; if (__get_IPSR() == 0) { err = OS_OK; /* Call bsp related OS initializations */ os_bsp_init(); /* Set the PendSV interrupt exception priority to the lowest priority */ NVIC_SetPriority(PendSV_IRQn, PEND_SV_PRIO); /* Set the SVC interrupt to priority 0 (highest configurable) */ NVIC_SetPriority(SVCall_IRQn, SVC_PRIO); /* * Set the os environment. This will set stack pointers and, based * on the contents of os_flags, will determine if the tasks run in * priviliged or un-privileged mode. */ os_set_env(); /* Check if priviliged or not */ if ((__get_CONTROL() & 1) == 0) { os_arch_init(); } else { svc_os_arch_init(); } } return err; }
/**@brief Start a FreeRTOS timer. * * @param[in] p_timer_id Id of timer. * @param[in] timeout_ticks The timer period in [ms]. * @param[in] p_contex This pointer should be always NULL. * * @return NRF_SUCCESS on success, otherwise error code. */ uint32_t app_timer_start(TimerHandle_t timer_id, uint32_t timeout_ticks, void * p_context) { if (__get_IPSR() != 0) { if( xTimerChangePeriodFromISR( timer_id, timeout_ticks, &xHigherPriorityTaskWoken) != pdPASS ) { if( xTimerStartFromISR( timer_id, &xHigherPriorityTaskWoken ) != pdPASS ) return NRF_ERROR_NOT_FOUND; } else return NRF_SUCCESS; } else { xTimerChangePeriod(timer_id, timeout_ticks, NULL); if( xTimerStart(timer_id, NULL) != pdPASS ) return NRF_ERROR_NOT_FOUND; else return NRF_SUCCESS; } return NRF_ERROR_NOT_FOUND; }
/** \brief Test case: TC_CoreFunc_IPSR \details - Check if __get_IPSR intrinsic is available - Check if __get_xPSR intrinsic is available - Result differentiates between thread and exception modes */ void TC_CoreFunc_IPSR (void) { uint32_t result = __get_IPSR(); ASSERT_TRUE(result == 0U); // Thread Mode result = __get_xPSR(); ASSERT_TRUE((result & xPSR_ISR_Msk) == 0U); // Thread Mode TST_IRQHandler = TC_CoreFunc_IPSR_IRQHandler; irqIPSR = 0U; irqXPSR = 0U; NVIC_ClearPendingIRQ(WDT_IRQn); NVIC_EnableIRQ(WDT_IRQn); __enable_irq(); NVIC_SetPendingIRQ(WDT_IRQn); for(uint32_t i = 10U; i > 0U; --i) {} __disable_irq(); NVIC_DisableIRQ(WDT_IRQn); ASSERT_TRUE(irqIPSR != 0U); // Exception Mode ASSERT_TRUE((irqXPSR & xPSR_ISR_Msk) != 0U); // Exception Mode }
/* Wrap memory allocation routines to make sure that they aren't being called from interrupt handler. */ static void breakOnHeapOpFromInterruptHandler(void) { if (__get_IPSR() != 0) __debugbreak(); }
/* Trap calls to malloc/free/realloc in ISR. */ extern "C" void __malloc_lock(void) { if (__get_IPSR() != 0) __debugbreak(); }
int inISR(void) { return (__get_IPSR() & 0xFF); }
static void TC_CoreFunc_IPSR_IRQHandler(void) { irqIPSR = __get_IPSR(); irqXPSR = __get_xPSR(); }
/* Determine whether we are in thread mode or handler mode. */ int Util_IsInHandlerMode (void) { return __get_IPSR() != 0; }
void Dummy_Handler(void) { while (1) { phantomISR = __get_IPSR(); } }
/** * Start the OS. First check to see if we are running with the correct stack * pointer set (PSP) and privilege mode (PRIV). * * @return os_error_t */ os_error_t os_arch_os_start(void) { os_error_t err; /* * Set the os environment. This will set stack pointers and, based * on the contents of os_flags, will determine if the tasks run in * priviliged or un-privileged mode. * * We switch to using "empty" part of idle task's stack until * the svc_os_arch_start() executes SVC, and we will never return. */ os_set_env(g_idle_task.t_stackptr - 1); err = OS_ERR_IN_ISR; if (__get_IPSR() == 0) { /* * The following switch statement is really just a sanity check to * insure that the os initialization routine was called prior to the * os start routine. */ err = OS_OK; switch (__get_CONTROL() & 0x03) { /* * These two cases are for completeness. Thread mode should be set * to use PSP already. * * Fall-through intentional! */ case 0x00: case 0x01: err = OS_ERR_PRIV; break; case 0x02: /* * We are running in Privileged Thread mode w/SP = PSP but we * are supposed to be un-privileged. */ if ((os_flags & 1) == OS_RUN_UNPRIV) { err = OS_ERR_PRIV; } break; case 0x03: /* * We are running in Unprivileged Thread mode w/SP = PSP but we * are supposed to be privileged. */ if ((os_flags & 1) == OS_RUN_PRIV) { err = OS_ERR_PRIV; } break; } if (err == OS_OK) { /* Always start OS through SVC call */ svc_os_arch_start(); } } return err; }
void hard_fault_handler_c (unsigned int * hardfault_args) { unsigned int stacked_r0; unsigned int stacked_r1; unsigned int stacked_r2; unsigned int stacked_r3; unsigned int stacked_r12; unsigned int stacked_lr; unsigned int stacked_pc; unsigned int stacked_psr; char logString[50]; stacked_r0 = ((unsigned long) hardfault_args[0]); stacked_r1 = ((unsigned long) hardfault_args[1]); stacked_r2 = ((unsigned long) hardfault_args[2]); stacked_r3 = ((unsigned long) hardfault_args[3]); stacked_r12 = ((unsigned long) hardfault_args[4]); stacked_lr = ((unsigned long) hardfault_args[5]); stacked_pc = ((unsigned long) hardfault_args[6]); stacked_psr = ((unsigned long) hardfault_args[7]); sprintf (logString,"\n>>>>>>>>>>>>>>["); stdio_hardfault( logString, strlen(logString)+1 ); switch(__get_IPSR()) { case 3: sprintf (logString, "Hard Fault"); stdio_hardfault( logString, strlen(logString)+1 ); break; case 4: sprintf (logString, "Memory Manage"); stdio_hardfault( logString, strlen(logString)+1 ); break; case 5: sprintf (logString, "Bus Fault"); stdio_hardfault( logString, strlen(logString)+1 ); break; case 6: sprintf (logString, "Usage Fault"); stdio_hardfault( logString, strlen(logString)+1 ); break; default: sprintf (logString, "Unknown Fault %ld", __get_IPSR()); stdio_hardfault( logString, strlen(logString)+1 ); break; } sprintf (logString, ",corrupt,dump registers]>>>>>>>>>>>>>>>>>>\n\r"); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "R0 = 0x%08x\r\n", stacked_r0); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "R1 = 0x%08x\r\n", stacked_r1); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "R2 = 0x%08x\r\n", stacked_r2); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "R3 = 0x%08x\r\n", stacked_r3); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "R12 = 0x%08x\r\n", stacked_r12); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "LR [R14] = 0x%08x subroutine call return address\r\n", stacked_lr); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "PC [R15] = 0x%08X program counter\r\n", stacked_pc); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "PSR = 0x%08X\r\n", stacked_psr); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "BFAR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED38)))); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "CFSR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED28)))); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "HFSR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED2C)))); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "DFSR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED30)))); stdio_hardfault( logString, strlen(logString)+1 ); sprintf (logString, "AFSR = 0x%08lx\r\n", (*((volatile unsigned long *)(0xE000ED3C)))); stdio_hardfault( logString, strlen(logString)+1 ); while (1); }
uint32_t vmpu_sys_mux_handler(uint32_t lr, uint32_t msp) { uint32_t pc; uint32_t fault_addr, fault_status; /* The IPSR enumerates interrupt numbers from 0 up, while *_IRQn numbers * are both positive (hardware IRQn) and negative (system IRQn); here we * convert the IPSR value to this latter encoding. */ int ipsr = ((int) (__get_IPSR() & 0x1FF)) - NVIC_OFFSET; /* Determine the origin of the exception. */ bool from_psp = EXC_FROM_PSP(lr); uint32_t sp = from_psp ? __get_PSP() : msp; switch (ipsr) { case NonMaskableInt_IRQn: HALT_ERROR(NOT_IMPLEMENTED, "No NonMaskableInt IRQ handler registered."); break; case HardFault_IRQn: DEBUG_FAULT(FAULT_HARD, lr, sp); HALT_ERROR(FAULT_HARD, "Cannot recover from a hard fault."); lr = debug_box_enter_from_priv(lr); break; case MemoryManagement_IRQn: fault_status = VMPU_SCB_MMFSR; /* If we are having an unstacking fault, we can't read the pc * at fault. */ if (fault_status & (SCB_CFSR_MSTKERR_Msk | SCB_CFSR_MUNSTKERR_Msk)) { /* Fake pc */ pc = 0x0; /* The stack pointer is at fault. MMFAR doesn't contain a * valid fault address. */ fault_addr = sp; } else { /* pc at fault */ if (from_psp) { pc = vmpu_unpriv_uint32_read(sp + (6 * 4)); } else { /* We can be privileged here if we tried doing an ldrt or * strt to a region not currently loaded in the MPU. In * such cases, we are reading from the msp and shouldn't go * through vmpu_unpriv_uint32_read. A box wouldn't have * access to our stack. */ pc = *(uint32_t *) (msp + (6 * 4)); } /* Backup fault address and status */ fault_addr = SCB->MMFAR; } /* Check if the fault is an MPU fault. */ if (vmpu_fault_recovery_mpu(pc, sp, fault_addr, fault_status)) { VMPU_SCB_MMFSR = fault_status; return lr; } /* If recovery was not successful, throw an error and halt. */ DEBUG_FAULT(FAULT_MEMMANAGE, lr, sp); VMPU_SCB_MMFSR = fault_status; HALT_ERROR(PERMISSION_DENIED, "Access to restricted resource denied."); lr = debug_box_enter_from_priv(lr); break; case BusFault_IRQn: /* Bus faults can be used in a "managed" way, triggered to let * uVisor handle some restricted registers. * Note: This feature will not be needed anymore when the * register-level will be implemented. */ /* Note: All recovery functions update the stacked stack pointer so * that exception return points to the correct instruction. */ /* Currently we only support recovery from unprivileged mode. */ if (from_psp) { /* pc at fault */ pc = vmpu_unpriv_uint32_read(sp + (6 * 4)); /* Backup fault address and status */ fault_addr = SCB->BFAR; fault_status = VMPU_SCB_BFSR; /* Check if the fault is the special register corner case. */ if (!vmpu_fault_recovery_bus(pc, sp, fault_addr, fault_status)) { VMPU_SCB_BFSR = fault_status; return lr; } } /* If recovery was not successful, throw an error and halt. */ DEBUG_FAULT(FAULT_BUS, lr, sp); HALT_ERROR(PERMISSION_DENIED, "Access to restricted resource denied."); break; case UsageFault_IRQn: DEBUG_FAULT(FAULT_USAGE, lr, sp); HALT_ERROR(FAULT_USAGE, "Cannot recover from a usage fault."); break; case SVCall_IRQn: HALT_ERROR(NOT_IMPLEMENTED, "No SVCall IRQ handler registered."); break; case DebugMonitor_IRQn: DEBUG_FAULT(FAULT_DEBUG, lr, sp); HALT_ERROR(FAULT_DEBUG, "Cannot recover from a DebugMonitor fault."); break; case PendSV_IRQn: HALT_ERROR(NOT_IMPLEMENTED, "No PendSV IRQ handler registered."); break; case SysTick_IRQn: HALT_ERROR(NOT_IMPLEMENTED, "No SysTick IRQ handler registered."); break; default: HALT_ERROR(NOT_ALLOWED, "Active IRQn (%i) is not a system interrupt.", ipsr); break; } return lr; }
/** * @brief See if the current context is inside an ISR */ int irq_arch_in(void) { return (__get_IPSR() & 0xFF); }
void trapfault_handler_dumpstack(unsigned long* irqs_regs, unsigned long* user_regs) { DBG("\n>>>>>>>>>>>>>>["); switch(__get_IPSR()) { case 3: DBG("Hard Fault"); break; case 4: DBG("Memory Manage"); break; case 5: DBG("Bus Fault"); break; case 6: DBG("Usage Fault"); break; default: DBG("Unknown Fault %d", __get_IPSR()); break; } DBG(",corrupt,dump registers]>>>>>>>>>>>>>>>>>>\n"); DBG("R0 = 0x%08X\n", irqs_regs[0]); DBG("R1 = 0x%08X\n", irqs_regs[1]); DBG("R2 = 0x%08X\n", irqs_regs[2]); DBG("R3 = 0x%08X\n", irqs_regs[3]); DBG("R4 = 0x%08X\n", user_regs[0]); DBG("R5 = 0x%08X\n", user_regs[1]); DBG("R6 = 0x%08X\n", user_regs[2]); DBG("R7 = 0x%08X\n", user_regs[3]); DBG("R8 = 0x%08X\n", user_regs[4]); DBG("R9 = 0x%08X\n", user_regs[5]); DBG("R10 = 0x%08X\n", user_regs[6]); DBG("R11 = 0x%08X\n", user_regs[7]); DBG("R12 = 0x%08X\n", irqs_regs[4]); DBG("SP = 0x%08X\n", &irqs_regs[8]); DBG("LR = 0x%08X\n", irqs_regs[5]); DBG("PC = 0x%08X\n", irqs_regs[6]); DBG("PSR = 0x%08X\n", irqs_regs[7]); DBG("BFAR = 0x%08X\n", (*((volatile unsigned long*)(0xE000ED38)))); DBG("CFSR = 0x%08X\n", (*((volatile unsigned long*)(0xE000ED28)))); DBG("HFSR = 0x%08X\n", (*((volatile unsigned long*)(0xE000ED2C)))); DBG("DFSR = 0x%08X\n", (*((volatile unsigned long*)(0xE000ED30)))); DBG("AFSR = 0x%08X\n", (*((volatile unsigned long*)(0xE000ED3C)))); //DBG("Terminated@%u ms\n", auxtmr_count_get()); /* #ifdef DEBUG if(*(unsigned long*)0x20000000 != 0xA5A5A5A5) { DBG("Error:System Stack Overflow\n"); return; } #endif //DEBUG */ /* * indefinitely deadloop */ while(1);;; }
void arm_cm_irq_entry(void) { THREAD_STATS_INC(interrupts); KEVLOG_IRQ_ENTER(__get_IPSR()); }
/* Determine whether we are in thread mode or handler mode. */ static int inHandlerMode (void) { return __get_IPSR() != 0; }