int wifi_gpio_operate(struct wifi_power *gpio, int flag)
{
int sensitive;
if (gpio->use_gpio == POWER_NOT_USE_GPIO)
return 0;
if (gpio->gpio_iomux == POWER_GPIO_IOMUX)
{
OS_IOMUX(gpio->iomux_name, gpio->iomux_value);
}
if (flag == GPIO_SWITCH_ON)
sensitive = gpio->sensi_level;
else
sensitive = 1 - gpio->sensi_level;
if (gpio->use_gpio == POWER_USE_EXT_GPIO)
{
wifi_extgpio_operation(gpio->gpio_id, sensitive);
}
else
{
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,25)
gpio_direction_output(gpio->gpio_id, GPIO_OUT);
__gpio_set(gpio->gpio_id, sensitive);
#else
gpio_direction_output(gpio->gpio_id, sensitive);
gpio_set_value(gpio->gpio_id, sensitive);
#endif
}
return 0;
}
int __init musb_platform_init(struct musb *musb)
{
void *__iomem tibase = musb->ctrl_base;
u32 revision, phystatus;
#ifdef CONFIG_ARCH_DAVINCI
struct clk *clkp;
clkp = clk_get (NULL, "USBCLK");
if (IS_ERR(clkp))
return -ENODEV;
musb->clock = clkp;
clk_use (clkp);
if(clk_enable (clkp) != 0)
return -ENODEV;
#endif
musb->pRegs += DAVINCI_BASE_OFFSET;
/* returns zero if e.g. not clocked */
revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
if (revision == 0)
return -ENODEV;
/* note that transceiver issues make us want to charge
* VBUS only when the PHY PLL is not active.
*/
#if defined(CONFIG_MACH_DAVINCI_EVM) || defined (CONFIG_MACH_DAVINCI_HD_EVM)
#ifdef CONFIG_USB_MUSB_OTG
/* clear EMACEN to enble OTG GPIO 16 for VBus power control */
/* Set GPIO Direction */
REG_DVEVM_GPIO45_DIR &= ~(DVEVM_GPIO45_DIR_OUT);
DAVINCI_PINMUX0 &= ~(0x80000000);
#endif
evm_vbus_work.data = musb;
#endif
#ifdef CONFIG_ARCH_DAVINCI355
gpio_set_direction(2, GIO_DIR_OUTPUT);
#ifdef CONFIG_USB_MUSB_HDRC_HCD
__gpio_set(2, 1);
#else
__gpio_set(2, 0);
#endif
__raw_writel( __raw_readl(IO_ADDRESS(DEEPSLEEP_REG)) & 0xfffffff0,
IO_ADDRESS(DEEPSLEEP_REG));
#endif
/* reset the controller */
musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
phy_on();
msleep(5);
phystatus = __raw_readl(IO_ADDRESS(USBPHY_CTL_PADDR));
#ifdef CONFIG_ARCH_DAVINCI646x
#ifdef CONFIG_USB_MUSB_HDRC_HCD
__raw_writel(phystatus | USBPHY_SESSION_VBUS | USBPHY_NDATAPOL,
IO_ADDRESS(USBPHY_CTL_PADDR));
#else
__raw_writel (phystatus | USBPHY_SESSION_VBUS | USBPHY_NDATAPOL |
USBPHY_PERI_USBID, IO_ADDRESS(USBPHY_CTL_PADDR));
#endif
#endif
/* NOTE: irqs are in mixed mode, not bypass to pure-musb */
pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
revision,
musb_readl((void *__iomem)IO_ADDRESS(USBPHY_CTL_PADDR), 0x00),
musb_readb(tibase, DAVINCI_USB_CTRL_REG));
musb->isr = davinci_interrupt;
return 0;
}
void gpio_set(int gpio, int value)
{
__gpio_set(gpio, value << GPIO_BIT(gpio));
}
