xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned long ulReloadValue = 0UL;
ulReloadValue = ( configPERIPHERAL_CLOCK_HZ / ( 48UL * ulWantedBaud ) ) - 1UL;
if( NULL == xSerialTransmitQueue )
{
xSerialTransmitQueue = xQueueCreate( uxQueueLength, sizeof( char ) );
xSerialReceiveQueue = xQueueCreate( uxQueueLength, sizeof( char ) );
}
/* Enable ASC0 Module. */
unlock_wdtcon();
{
while ( 0 != ( WDT_CON0.reg & 0x1UL ) );
ASC0_CLC.reg = 0x0200UL;
}
lock_wdtcon();
/* Disable the Operation. */
ASC0_CON.reg &= 0xFFFF7FFF;
/* Set-up the GPIO Ports. */
P3_IOCR0.reg = 0x00009000; /* 3.0 ASC In, 3.1 Alt ASC Out */
/* Write the baud rate. */
ASC0_BG.reg = ulReloadValue;
/* Reconfigure and re-initialise the Operation. */
ASC0_PISEL.reg = 0UL;
ASC0_CON.reg = 0UL;
ASC0_CON.bits.M = 0x01; /* 8bit async. */
ASC0_CON.bits.REN = 0x01; /* Receiver enabled. */
ASC0_CON.bits.FDE = 0x01; /* Fractional divider enabled. */
ASC0_CON.bits.BRS = 0x01; /* Divide by three. */
ASC0_CON.bits.LB = 0x01; /* Loopback enabled. */
ASC0_CON.bits.R = 0x01; /* Enable the baud rate generator. */
/* Install the Tx interrupt. */
if( 0 != _install_int_handler( configINTERRUPT_PRIORITY_TX, prvTxBufferInterruptHandler, 0 ) )
{
ASC0_TBSRC.reg = configINTERRUPT_PRIORITY_TX | 0x5000UL;
xTransmitStatus = 0UL;
}
/* Install the Rx interrupt. */
if( 0 != _install_int_handler( configINTERRUPT_PRIORITY_RX, prvRxInterruptHandler, 0 ) )
{
ASC0_RSRC.reg = configINTERRUPT_PRIORITY_RX | 0x5000UL;
}
/* COM Handle is never used by demo code. */
return (xComPortHandle) pdPASS;
}
void _init_uart(int baudrate)
{
unsigned int frequency, reload_value, fdv;
unsigned int dfreq;
/* initialize vector and trap tables */
_init_vectab();
/* Install handlers for transmit and receive interrupts. */
_install_int_handler(XMIT_INTERRUPT, (void (*) (int)) _uart_tx_handler, 0);
_install_int_handler(RECV_INTERRUPT, (void (*) (int)) _uart_rx_handler, 0);
/* Set TXD to "output" and "high" */
/* set P3.1 to output and high */
port->IOCR0.bits.PC1 = OUT_PPALT1;
port->OMR.bits.PS1 = 1;
/* Compute system frequency and reload value for ASC0 */
frequency = get_cpu_frequency();
if (baudrate <= 0)
baudrate = BAUDRATE;
/* reload_value = fdv/512 * freq/16/baudrate -1 ==>
reload_value = (512*freq)/(baudrate * 512*16) - 1
fdv = (reload_value + 1) * (baudrate*512*16/freq)
reload_value = (frequency / 32) / BAUDRATE - 1;
*/
reload_value = (frequency / (baudrate * 16)) - 1;
dfreq = frequency / (16*512);
fdv = (reload_value + 1) * (unsigned int)baudrate / dfreq;
/* Enable ASCn */
unlock_wdtcon();
asc->CLC.bits.RMC = 1;
asc->CLC.bits.DISR = 0;
lock_wdtcon();
/* Program ASCn */
asc->CON.reg = 0;
asc->BG.reg = reload_value;
asc->FDV.reg = fdv;
asc->TSRC.reg = ASCn_TSRC_SRE_MASK | XMIT_INTERRUPT;
asc->RSRC.reg = ASCn_RSRC_SRE_MASK | RECV_INTERRUPT;
asc->CON.bits.M = ASCM_8ASYNC;
asc->CON.bits.R = 1;
asc->CON.bits.REN = 1;
asc->CON.bits.FDE = 1;
}
void vSetupInterruptNestingTest( void )
{
unsigned long ulCompareMatchBits;
/* Create the semaphore used to communicate between the high frequency
interrupt and the task. */
vSemaphoreCreateBinary( xHighFrequencyTimerSemaphore );
configASSERT( xHighFrequencyTimerSemaphore );
/* Create the task that pends on the semaphore that is given by the
high frequency interrupt. */
xTaskCreate( prvHighFrequencyTimerTask, ( signed char * ) "HFTmr", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );
/* Setup the interrupt itself. The STM module clock divider is setup when
the tick interrupt is configured - which is when the scheduler is started -
so there is no need to do it here.
The tick interrupt uses compare match 0, so this test uses compare match
1, which means shifting up the values by 16 before writing them to the
register. */
ulCompareMatchBits = ( 0x1fUL - __CLZ( ulCompareMatchValue ) );
ulCompareMatchBits <<= 16UL;
/* Write the values to the relevant SMT registers, without changing other
bits. */
taskENTER_CRITICAL();
{
STM_CMCON.reg &= ~( 0x1fUL << 16UL );
STM_CMCON.reg |= ulCompareMatchBits;
STM_CMP1.reg = ulCompareMatchValue;
if( 0 != _install_int_handler( configHIGH_FREQUENCY_TIMER_PRIORITY, prvPortHighFrequencyTimerHandler, 0 ) )
{
/* Set-up the interrupt. */
STM_SRC1.reg = ( configHIGH_FREQUENCY_TIMER_PRIORITY | 0x00005000UL );
/* Enable the Interrupt. */
STM_ISRR.reg &= ~( 0x03UL << 2UL );
STM_ISRR.reg |= ( 0x1UL << 2UL );
STM_ICR.reg &= ~( 0x07UL << 4UL );
STM_ICR.reg |= ( 0x5UL << 4UL );
}
else
{
/* Failed to install the interrupt. */
configASSERT( ( ( volatile void * ) NULL ) );
}
}
taskEXIT_CRITICAL();
}
/*---------------------------------------------------------------------
Function: InterruptInstall
Purpose: Install a service handler for an interrupt
Arguments: int irqNum - number of interrupt
isrhnd_t isrProc - pointer to service routine
int prio - priority (1-255)
int arg - argument for service routine
Return: void
---------------------------------------------------------------------*/
void InterruptInstall(int irqNum, isrhnd_t isrProc, int prio, int arg)
{
unsigned int coreId = _mfcr(CPU_CORE_ID) & IFX_CPU_CORE_ID_CORE_ID_MSK;
if ((irqNum < 0) || (IRQ_ID_MAX_NUM <= irqNum))
{
return;
}
/* install the service routine */
_install_int_handler(prio, isrProc, arg);
/* set processor and priority values */
tabSRC[irqNum].B.TOS = coreId;
tabSRC[irqNum].B.SRPN = prio;
/* ... and enable it */
tabSRC[irqNum].B.SRE = 1;
}
static void prvSetupTimerInterrupt( void )
{
/* Set-up the clock divider. */
unlock_wdtcon();
{
/* Wait until access to Endint protected register is enabled. */
while( 0 != ( WDT_CON0.reg & 0x1UL ) );
/* RMC == 1 so STM Clock == FPI */
STM_CLC.reg = ( 1UL << 8 );
}
lock_wdtcon();
/* Determine how many bits are used without changing other bits in the CMCON register. */
STM_CMCON.reg &= ~( 0x1fUL );
STM_CMCON.reg |= ( 0x1fUL - __CLZ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) );
/* Take into account the current time so a tick doesn't happen immediately. */
STM_CMP0.reg = ulCompareMatchValue + STM_TIM0.reg;
if( 0 != _install_int_handler( configKERNEL_INTERRUPT_PRIORITY, prvSystemTickHandler, 0 ) )
{
/* Set-up the interrupt. */
STM_SRC0.reg = ( configKERNEL_INTERRUPT_PRIORITY | 0x00005000UL );
/* Enable the Interrupt. */
STM_ISRR.reg &= ~( 0x03UL );
STM_ISRR.reg |= 0x1UL;
STM_ISRR.reg &= ~( 0x07UL );
STM_ICR.reg |= 0x1UL;
}
else
{
/* Failed to install the Tick Interrupt. */
configASSERT( ( ( volatile void * ) NULL ) );
}
}
int32_t xPortStartScheduler( void )
{
extern void vTrapInstallHandlers( void );
uint32_t ulMFCR = 0UL;
uint32_t *pulUpperCSA = NULL;
uint32_t *pulLowerCSA = NULL;
/* Interrupts at or below configMAX_SYSCALL_INTERRUPT_PRIORITY are disable
when this function is called. */
/* Set-up the timer interrupt. */
prvSetupTimerInterrupt();
/* Install the Trap Handlers. */
vTrapInstallHandlers();
/* Install the Syscall Handler for yield calls. */
if( 0 == _install_trap_handler( portSYSCALL_TRAP, prvTrapYield ) )
{
/* Failed to install the yield handler, force an assert. */
configASSERT( ( ( volatile void * ) NULL ) );
}
/* Enable then install the priority 1 interrupt for pending context
switches from an ISR. See mod_SRC in the TriCore manual. */
CPU_SRC0.reg = ( portENABLE_CPU_INTERRUPT ) | ( configKERNEL_YIELD_PRIORITY );
if( 0 == _install_int_handler( configKERNEL_YIELD_PRIORITY, prvInterruptYield, 0 ) )
{
/* Failed to install the yield handler, force an assert. */
configASSERT( ( ( volatile void * ) NULL ) );
}
_disable();
/* Load the initial SYSCON. */
_mtcr( $SYSCON, portINITIAL_SYSCON );
_isync();
/* ENDINIT has already been applied in the 'cstart.c' code. */
/* Clear the PSW.CDC to enable the use of an RFE without it generating an
exception because this code is not genuinely in an exception. */
ulMFCR = _mfcr( $PSW );
ulMFCR &= portRESTORE_PSW_MASK;
_dsync();
_mtcr( $PSW, ulMFCR );
_isync();
/* Finally, perform the equivalent of a portRESTORE_CONTEXT() */
pulLowerCSA = portCSA_TO_ADDRESS( ( *pxCurrentTCB ) );
pulUpperCSA = portCSA_TO_ADDRESS( pulLowerCSA[0] );
_dsync();
_mtcr( $PCXI, *pxCurrentTCB );
_isync();
_nop();
_rslcx();
_nop();
/* Return to the first task selected to execute. */
__asm volatile( "rfe" );
/* Will not get here. */
return 0;
}
