int
setcontext(const ucontext_t *uctx)
{
mcontext_t mctx = (mcontext_t)&uctx->__mcontext_data;
ucontext_t *_uctx = (ucontext_t *)uctx;
if (mctx != _uctx->uc_mcontext)
_uctx->uc_mcontext = mctx;
sigsetmask(uctx->uc_sigmask);
return _setcontext(mctx);
}
void cfe_bootarea_init(void)
{
unsigned char *pte;
int64_t pte_int;
unsigned int addr = 16*MEG;
unsigned int topmem;
unsigned int topcfe;
unsigned int botcfe;
unsigned int beforecfe;
unsigned int aftercfe;
/*
* Calculate the location where the boot area will
* live. It lives either above or below the
* firmware, depending on where there's more space.
*/
/*
* The firmware will always be loaded in the first
* 256M. Calculate the top of that region. The bottom
* of that region is always the beginning of our
* data segment.
*/
if (mem_totalsize > (uint64_t)256) {
topmem = 256*MEG;
}
else {
topmem = (unsigned int) (mem_totalsize << 20);
}
botcfe = (unsigned int) K1_TO_PHYS(mem_bottomofmem);
topcfe = (unsigned int) K1_TO_PHYS(mem_topofmem);
beforecfe = botcfe;
aftercfe = topmem-topcfe;
if (beforecfe > aftercfe) {
botcfe -= (PAGESIZE-1);
botcfe &= ~(PAGESIZE-1); /* round down to page boundary */
addr = botcfe - CFE_BOOTAREA_SIZE; /* this is the address */
}
else {
topcfe += (PAGESIZE-1); /* round *up* to a page address */
topcfe &= ~(PAGESIZE-1);
addr = topcfe;
}
mem_bootarea_start = addr;
mem_bootarea_size = CFE_BOOTAREA_SIZE;
/*
* Allocate the page table
*/
pte = KMALLOC(1024,1024);
#ifdef __long64
pte_int = (int64_t) pte;
#else
pte_int = (int64_t) ((int) pte);
#endif
/*
* Set the CP0 CONTEXT register to point at the page table
*/
pte_int <<= 13;
cfe_pagetable = (uint64_t *) pte;
_setcontext(pte_int);
/*
* Initialize page table entries
*/
CPUCFG_PAGETBLINIT(cfe_pagetable,addr);
}
