/***************************************************************************//**
* @brief Main function.
*
* @return 0.
*******************************************************************************/
int main(){
uint32_t mode;
Xil_ICacheEnable();
Xil_DCacheEnable();
/* AD9467 Setup. */
ad9467_setup(SPI_DEVICE_ID, 0);
/* AD9517 Setup. */
ad9517_setup(SPI_DEVICE_ID, 1); // Initialize device.
ad9517_power_mode(3, 0); // Set channel 3 for normal operation
ad9517_frequency(3, 250000000); // Set the channel 3 frequency to 250Mhz
ad9517_update(); // Update registers
/* Read the device ID for AD9467 and AD9517. */
xil_printf("\n\r********************************************************************\r\n");
xil_printf(" ADI AD9467-FMC-EBZ Reference Design\n\r");
xil_printf(" AD9467 CHIP ID: 0x%02x\n\r", ad9467_read(AD9467_REG_CHIP_ID));
xil_printf(" AD9467 CHIP GRADE: 0x%02x\n\r", ad9467_read(AD9467_REG_CHIP_GRADE));
xil_printf(" AD9517 CHIP ID: 0x%02x", ad9517_read(AD9517_REG_PART_ID));
xil_printf("\n\r********************************************************************\r\n");
/* AD9467 test. */
adc_setup(0);
for (mode = MIDSCALE; mode <= ONE_ZERO_TOGGLE; mode++) // Data pattern checks
{
adc_test(mode, OFFSET_BINARY); // Data format is offset binary
adc_test(mode, TWOS_COMPLEMENT); // Data format is twos complement
}
xil_printf("Testing done.\n\r");
/* AD9467 Setup for data acquisition */
ad9467_output_invert(0); // Output invert Off
ad9467_transfer(); // Synchronously update registers
ad9467_output_format(0); // Offset binary
ad9467_transfer(); // Synchronously update registers
ad9467_reset_PN9(0); // Clear PN9 bit
ad9467_transfer(); // Synchronously update registers
ad9467_reset_PN23(0); // Clear PN23 bit
ad9467_transfer(); // Synchronously update registers
ad9467_test_mode(0); // Test mode Off
ad9467_transfer(); // Synchronously update registers
xil_printf("Start capturing data...\n\r");
while(1)
{
adc_capture(1024, DDR_BASEADDR);
}
Xil_DCacheDisable();
Xil_ICacheDisable();
return 0;
}
/***************************************************************************//**
* @brief Main function.
*
* @return 0.
*******************************************************************************/
int main(){
u32 mode;
Xil_ICacheEnable();
Xil_DCacheEnable();
/* AD9467 Setup. */
ad9467_setup(XPAR_AXI_SPI_0_BASEADDR, 1);
/* AD9517 Setup. */
ad9517_setup(XPAR_AXI_SPI_0_BASEADDR, 2); // Initialize device.
ad9517_power_mode(3, 0); // Set channel 3 for normal operation
ad9517_frequency(3, 250000000); // Set the channel 3 frequency to 250Mhz
ad9517_update(); // Update registers
/* Read the device ID for AD9467 and AD9517. */
xil_printf("AD9467[REG_CHIP_ID]: %02x\n\r",
ad9467_read(AD9467_REG_CHIP_ID));
xil_printf("AD9467[REG_CHIP_GRADE]: %02x\n\r",
ad9467_read(AD9467_REG_CHIP_GRADE));
xil_printf("AD9517[REG_PART_ID]: %02x\n\r",
ad9517_read(AD9517_REG_PART_ID));
/* AD9467 test. */
adc_setup(0);
for (mode = 0x01; mode <= 0x07; mode++) // Data pattern checks
{
adc_test(mode, 0x0); // Data format is offset binary
adc_test(mode, 0x1); // Data format is twos complement
}
ad9467_output_invert(0); // Output invert Off
ad9467_output_format(0); // Offset binary
ad9467_reset_PN9(0); // Clear PN9 bit
ad9467_reset_PN23(0); // Clear PN23 bit
ad9467_test_mode(0); // Test mode Off
ad9467_transfer(); // Synchronously update registers
xil_printf("done\n\r");
Xil_DCacheDisable();
Xil_ICacheDisable();
return 0;
}
int main(void)
{
// ³õʼ»¯´®¿Ú
uart_init();
// ²âÊÔADC
adc_test();
return 0;
}
/* start the main program */
void main()
{
UART_Init(9600);
UART_TxString("\n\rTest menu Utra x51 v1.1\r\n 1:GPIO Blink\r\n 2:LCD \n\r 3:7-Segment\n\r 4:RTC\n\r 5:EEPROM\n\r 6:ADC\n\r 7:Keypad \n\r Enter option:");
UART_TxString("\n\rReset the board after test is done");
mm_option = UART_RxChar();
while(1)
{
switch(mm_option)
{
case '1': gpio_test(); break;
case '2': LCD_test(); break;
case '3': seg_test(); break;
case '4': rtc_test(); break;
case '5': eeprom_test(); break; //eeprom
case '6': adc_test(); break;
case '7': keypad_test();break;
default:break;
}
}
}
/* start the main program */
void main()
{
UART_Init(9600);
UART_TxString("\n\rPIC Ultra baord menu v2.0\r\n 1:GPIO Blink\r\n 2:LCD 8-bit \n\r 3:LCD 4-bit\n\r 4:7-Segment\n\r 5:RTC\n\r 6:EEPROM\n\r 7:ADC\n\r 8:Keypad \n\r Enter option:");
UART_TxString("\n\rReset the board after test is done");
mm_option = UART_RxChar();
while(1)
{
switch(mm_option)
{
case '1': gpio_test(); break;
case '2': LCD_8bit_test(); break;
case '3': LCD_4bit_test(); break;
case '4': seg_test(); break;
case '5': rtc_test(); break;
case '6': eeprom_test(); break; //eeprom
case '7': adc_test(); break;
case '8': keypad_test();break;
default:break;
}
}
}
/* Program main loop. */
int main()
{
int32_t ret;
int32_t mode = 0;
float retGain;
uint64_t retFreqRx;
uint64_t retFreqTx;
int32_t fmcSel;
int32_t i;
int32_t valArray[17];
XCOMM_Version boardVersion;
XCOMM_DefaultInit defInit = {FMC_LPC, //fmcPort
XILINX_ML605, //carrierBoard
100000000, //adcSamplingRate
122880000, //dacSamplingRate
10000, //rxGain1000
2400000000ull, //rxFrequency
2400000000ull};//txFrequency
Xil_ICacheEnable();
Xil_DCacheEnable();
xil_printf("Running XCOMM Test Program\n\r");
if(defInit.carrierBoard == XILINX_ZC702)
{
fmcSel = (defInit.fmcPort == FMC_LPC ? IICSEL_B0LPC_PS7 : IICSEL_B1HPC_PS7);
}
else
{
if(defInit.carrierBoard == XILINX_ZC706)
{
fmcSel = (defInit.fmcPort == FMC_LPC ? IICSEL_B0LPC_PS7_ZC706 :
IICSEL_B1HPC_PS7_ZC706);
}
else
{
fmcSel = (defInit.fmcPort == FMC_LPC ? IICSEL_B0LPC_AXI : IICSEL_B1HPC_AXI);
}
}
xil_printf("\n\rInitializing XCOMM I2C...\n\r");
ret = XCOMM_InitI2C(&defInit);
if(ret < 0)
{
xil_printf("XCOMM Init I2C Failed!\n\r");
return 0;
}
else
{
xil_printf("XCOMM Init I2C OK!\n\r");
}
xil_printf("\n\rGetting XCOMM Revision...\n\r");
boardVersion = XCOMM_GetBoardVersion(XCOMM_ReadMode_FromHW);
if(boardVersion.error == -1)
{
xil_printf("\n\rGetting XCOMM Revision Failed!\n\r");
}
else
{
xil_printf("Board Version: %s\n\r", boardVersion.value);
}
xil_printf("\n\rInitializing XCOMM Components...\n\r");
ret = XCOMM_Init(&defInit);
if(ret < 0)
{
xil_printf("XCOMM Init Failed!\n\r");
return 0;
}
else
{
xil_printf("XCOMM Init OK!\n\r");
}
xil_printf("\n\rInitializing the Rx path...\n\r");
ret = XCOMM_InitRx(&defInit);
if(ret < 0)
{
xil_printf("XCOMM Rx Init Failed!\n\r");
return 0;
}
else
{
xil_printf("XCOMM Rx Init OK!\n\r");
}
xil_printf("\n\rInitializing the Tx path...\n\r");
ret = XCOMM_InitTx(&defInit);
if(ret < 0)
{
xil_printf("XCOMM Tx Init Failed!\n\r");
return 0;
}
else
{
xil_printf("XCOMM Tx Init OK!\n\r");
}
xil_printf("\n\rADC sampling rate [Hz]: ");
ret = XCOMM_GetAdcSamplingRate(XCOMM_ReadMode_FromHW);
xil_printf("%d \n\r", ret);
xil_printf("\n\rDAC sampling rate [Hz]: ");
ret = XCOMM_GetDacSamplingRate(XCOMM_ReadMode_FromHW);
xil_printf("%d \n\r", ret);
xil_printf("\n\rDAC available interpolation frequencies [Hz]: ");
XCOMM_GetDacAvailableInterpolationFreq(valArray);
i = 0;
while((valArray[i] != 0) && (i < 5))
{
xil_printf("%d ", valArray[i]);
i++;
}
xil_printf("\n\r");
xil_printf("\n\rDAC available center shift frequencies [Hz]: ");
XCOMM_GetDacAvailableCenterShiftFreq(valArray);
i = 0;
while((valArray[i] != -1) && (i < 17))
{
xil_printf("%d ", valArray[i]);
i++;
}
xil_printf("\n\r");
xil_printf("\n\rTesting the ADC communication... \n\r");
XCOMM_SetAdcTestMode(0x01, XCOMM_AdcChannel_All);
adc_capture(fmcSel, 1024, DDR_BASEADDR);
for (mode = 0x1; mode <= 0x7; mode++)
{
XCOMM_SetAdcTestMode(mode, XCOMM_AdcChannel_All);
adc_test(fmcSel, mode, 0x1);
}
xil_printf("ADC test complete.\n\r");
xil_printf("\n\rTesting the DAC communication... \n\r");
dac_test(fmcSel);
xil_printf("DAC test complete.\n\r");
xil_printf("\n\rSetting the VGA gain to: %d.%d dB\n\r", (int)defInit.rxGain1000/1000, (int)((defInit.rxGain1000 - (int)(defInit.rxGain1000/1000)*1000)));
retGain = (float)XCOMM_SetRxGain(defInit.rxGain1000) / 1000.0f;
xil_printf("Actual set VGA gain: %d.%d dB\n\r", (int)retGain, (int)((retGain - (int)retGain) * 1000));
xil_printf("\n\rSetting the Rx frequency to: %lld%06lld\n\r", defInit.rxFrequency/(uint64_t)1e6, defInit.rxFrequency%(uint64_t)1e6);
retFreqRx = XCOMM_SetRxFrequency(defInit.rxFrequency);
xil_printf("Actual set Rx frequency: %lld%06lld\n\r", retFreqRx/(uint64_t)1e6, retFreqRx%(uint64_t)1e6);
xil_printf("\n\rSetting the Tx frequency to: %lld%06lld\n\r", defInit.txFrequency/(uint64_t)1e6, defInit.txFrequency%(uint64_t)1e6);
retFreqTx = XCOMM_SetTxFrequency(defInit.txFrequency);
xil_printf("Actual set Tx frequency: %lld%06lld\n\r", retFreqTx/(uint64_t)1e6, retFreqTx%(uint64_t)1e6);
xil_printf("\n\rSetting up the DDS... \n\r");
dds_setup(fmcSel, 5, 5);
xil_printf("DDS setup complete.\n\r");
xil_printf("\n\rReading data from air... \n\r");
XCOMM_SetAdcTestMode(XCOMM_AdcTestMode_Off, XCOMM_AdcChannel_All);
while(1)
{
adc_capture(fmcSel, 1024, DDR_BASEADDR);
}
xil_printf("Read data from air complete. \n\r");
xil_printf("\n\rFinished XCOMM Test Program\n\r");
Xil_DCacheDisable();
Xil_ICacheDisable();
return 0;
}
int main()
{
int ret;
int mode = 0;
XCOMM_DefaultInit defInit = {100000000, //adcSamplingRate
100000000, //dacSamplingRate
20000, //rxGain1000
2400000000ull, //rxFrequency
2400000000ull};//rxFrequency
float retGain;
uint64_t retFreqRx;
uint64_t retFreqTx;
init_platform();
xil_printf("Running XCOMM Test Program\n\r");
xil_printf("\n\rInitializing XCOMM Components...\n\r");
ret = XCOMM_Init(&defInit);
if(ret < 0)
{
xil_printf("XCOMM Init Failed!\n\r");
return 0;
}
else
{
xil_printf("XCOMM Init OK!\n\r");
}
xil_printf("\n\rTesting the ADC communication... \n\r");
XCOMM_SetAdcTestMode(0x01, XCOMM_AdcChannel_All);
adc_capture(IICSEL_B0LPC, 1024, DDR_BASEADDR);
for (mode = 0x1; mode <= 0x7; mode++)
{
XCOMM_SetAdcTestMode(mode, XCOMM_AdcChannel_All);
adc_test(IICSEL_B0LPC, mode, 0x1);
}
xil_printf("ADC test complete.\n\r");
xil_printf("\n\rTesting the DAC communication... \n\r");
dac_test(IICSEL_B0LPC);
xil_printf("DAC test complete.\n\r");
xil_printf("\n\rSetting the VGA gain to: %d.%d dB\n\r", (int)defInit.rxGain1000/1000, (int)((defInit.rxGain1000 - (int)(defInit.rxGain1000/1000)*1000)));
retGain = (float)XCOMM_SetRxGain(defInit.rxGain1000) / 1000.0f;
xil_printf("Actual set VGA gain: %d.%d dB\n\r", (int)retGain, (int)((retGain - (int)retGain) * 1000));
xil_printf("\n\rSetting the Rx frequency to: %lld%06lld\n\r", defInit.rxFrequency/(uint64_t)1e6, defInit.rxFrequency%(uint64_t)1e6);
retFreqRx = XCOMM_SetRxFrequency(defInit.rxFrequency);
xil_printf("Actual set Rx frequency: %lld%06lld\n\r", retFreqRx/(uint64_t)1e6, retFreqRx%(uint64_t)1e6);
xil_printf("\n\rSetting the Tx frequency to: %lld%06lld\n\r", defInit.txFrequency/(uint64_t)1e6, defInit.txFrequency%(uint64_t)1e6);
retFreqTx = XCOMM_SetTxFrequency(defInit.txFrequency);
xil_printf("Actual set Tx frequency: %lld%06lld\n\r", retFreqTx/(uint64_t)1e6, retFreqTx%(uint64_t)1e6);
xil_printf("\n\rSetting up the DDS... \n\r");
dds_setup(IICSEL_B0LPC, 45, 45);
xil_printf("DDS setup complete.\n\r");
xil_printf("\n\rReading data from air... \n\r");
XCOMM_SetAdcTestMode(XCOMM_AdcTestMode_Off, XCOMM_AdcChannel_All);
while(1)
{
adc_capture(IICSEL_B0LPC, 1024, DDR_BASEADDR);
}
xil_printf("Read data from air complete. \n\r");
xil_printf("\n\rFinished XCOMM Test Program\n\r");
cleanup_platform();
return 0;
}
