static void __spin_lock_debug(raw_spinlock_t *lock)
{
u64 i;
u64 loops = loops_per_jiffy * LOOP_HZ;
int print_once = 1;
char aee_str[40];
unsigned long long t1;
t1 = sched_clock();
for (;;) {
for (i = 0; i < loops; i++) {
if (arch_spin_trylock(&lock->raw_lock))
return;
__delay(1);
}
/* lockup suspected: */
printk("spin time: %llu ns(start:%llu ns, lpj:%lu, HZ:%d)", sched_clock() - t1, t1, loops_per_jiffy, (int)LOOP_HZ);
if (print_once) {
print_once = 0;
spin_dump(lock, "lockup");
#ifdef CONFIG_SMP
trigger_all_cpu_backtrace();
#endif
debug_show_all_locks();
sprintf( aee_str, "Spinlock lockup:%s\n", current->comm);
aee_kernel_exception( aee_str,"spinlock debugger\n");
}
}
}
static void __spin_lock_debug(raw_spinlock_t *lock)
{
u64 i;
u64 loops = loops_per_jiffy * HZ;
int print_once = 1;
char aee_str[40];
for (;;) {
for (i = 0; i < loops; i++) {
if (arch_spin_trylock(&lock->raw_lock))
return;
__delay(1);
}
/* lockup suspected: */
if (print_once) {
print_once = 0;
printk(KERN_EMERG "BUG: spinlock lockup on CPU#%d, "
"%s/%d, %p\n",
raw_smp_processor_id(), current->comm,
task_pid_nr(current), lock);
sprintf( aee_str, "Spinlock lockup:%s\n", current->comm);
aee_kernel_exception( aee_str,"spinlock debugger\n");
dump_stack();
#ifdef CONFIG_SMP
trigger_all_cpu_backtrace();
#endif
}
}
}
int reset_md32_by_wdt_func()
{
int index;
#define TEST_PHY_SIZE 0x10000
int log[16], i;
char *ptr;
printk("reset_md32_func\n");
//1. AEE function
/*
memset(log, 0, sizeof(log));
ptr = kmalloc(TEST_PHY_SIZE, GFP_KERNEL);
if (ptr == NULL) {
printk( "proc_read_generate_ee kmalloc fail\n");
return -1;
}
for (i = 0; i < TEST_PHY_SIZE; i++) {
ptr[i] = (i % 26) + 'A';
}
aed_md_exception(log, 0, (int *)ptr, TEST_PHY_SIZE, __FILE__);
kfree(ptr);
*/
//1. AEE function
aee_kernel_exception("MD32","MD32 WDT Time out ");
//2. Reset md32
printk("WDT Reset md32 ok!\n");
//3. Call driver's callback
for(index=0;index<MD32_MAX_USER;index++)
{
if(WDT_FUN.in_use[index] && WDT_FUN.reset_func[index]!=NULL )
{
WDT_FUN.reset_func[index](WDT_FUN.private_data[index]);
}
}
}
static IMG_VOID MTKPP_WORKR_Handle(struct work_struct *_psWork)
{
struct MTKPP_WORKQUEUE_WORKER_t* psWork =
container_of(_psWork, MTKPP_WORKQUEUE_WORKER, sWork);
/* avoid the build warnning */
psWork = psWork;
aee_kernel_exception("gpulog", "aee dump gpulog");
}
static void rwlock_bug(rwlock_t *lock, const char *msg)
{
char aee_str[40];
if (!debug_locks_off())
return;
printk(KERN_EMERG "BUG: rwlock %s on CPU#%d, %s/%d, %p\n",
msg, raw_smp_processor_id(), current->comm,
task_pid_nr(current), lock);
dump_stack();
sprintf( aee_str, "rwlock %s:%s\n", msg, current->comm);
aee_kernel_exception( aee_str,"spinlock debugger\n");
}
static int proc_write_generate_kernel_notify(struct file* file,
const char __user *buf, unsigned long count,
void *data)
{
char msg[164], *colon_ptr;
if (count == 0) {
return -EINVAL;
}
if ((count < 5) || (count >= sizeof(msg))) {
xlog_printk(ANDROID_LOG_WARN, AEK_LOG_TAG, "aed: %s count sould be >= 5 and <= %d bytes.\n", __func__, sizeof(msg));
return -EINVAL;
}
if (copy_from_user(msg, buf, count)) {
xlog_printk(ANDROID_LOG_WARN, AEK_LOG_TAG, "aed: %s unable to read message\n", __func__);
return -EFAULT;
}
/* Be safe */
msg[count] = 0;
if (msg[1] != ':') {
return -EINVAL;
}
colon_ptr = strchr(&msg[2], ':');
if ((colon_ptr == NULL) || ((colon_ptr - msg) > 32)) {
xlog_printk(ANDROID_LOG_WARN, AEK_LOG_TAG, "aed: %s cannot find valid module name\n", __func__);
return -EINVAL;
}
*colon_ptr = 0;
switch (msg[0]) {
case 'R':
aee_kernel_reminding(&msg[2], colon_ptr + 1);
break;
case 'W':
aee_kernel_warning(&msg[2], colon_ptr + 1);
break;
case 'E':
aee_kernel_exception(&msg[2], colon_ptr + 1);
break;
default:
return -EINVAL;
}
return count;
}
void md32_assert_reset_func(void)
{
int index;
printk("reset_md32_func\n");
//1. AEE function
aee_kernel_exception("MD32","MD32 ASSERT ");
//2. Reset md32
printk("ASSERT Reset md32 ok!\n");
//3. Call driver's callback
for(index=0;index<MD32_MAX_USER;index++)
{
if(MD32_ASSERT_FUN.in_use[index] && MD32_ASSERT_FUN.reset_func[index]!=NULL )
{
MD32_ASSERT_FUN.reset_func[index](MD32_ASSERT_FUN.private_data[index]);
}
}
}
void reset_md32_by_assert_func()
{
int index;
printk("reset_md32_func\n");
//1. AEE function
//aed_md_exception(const int *log, int log_size, const int *phy, int phy_size, const char* detail);
aee_kernel_exception("MD32","MD32 ASSERT ");
//2. Reset md32
printk("ASSERT Reset md32 ok!\n");
//3. Call driver's callback
for(index=0;index<MD32_MAX_USER;index++)
{
if(ASSERT_FUN.in_use[index] && ASSERT_FUN.reset_func[index]!=NULL )
{
ASSERT_FUN.reset_func[index](ASSERT_FUN.private_data[index]);
}
}
}
void md32_wdt_reset_func(void)
{
int index;
#define TEST_PHY_SIZE 0x10000
printk("reset_md32_func\n");
//1. AEE function
aee_kernel_exception("MD32","MD32 WDT Time out ");
//2. Reset md32
printk("WDT Reset md32 ok!\n");
//3. Call driver's callback
for(index=0;index<MD32_MAX_USER;index++)
{
if(MD32_WDT_FUN.in_use[index] && MD32_WDT_FUN.reset_func[index]!=NULL )
{
MD32_WDT_FUN.reset_func[index](MD32_WDT_FUN.private_data[index]);
}
}
}
static void spin_bug(raw_spinlock_t *lock, const char *msg)
{
struct task_struct *owner = NULL;
char aee_str[40];
if (!debug_locks_off())
return;
if (lock->owner && lock->owner != SPINLOCK_OWNER_INIT)
owner = lock->owner;
printk(KERN_EMERG "BUG: spinlock %s on CPU#%d, %s/%d\n",
msg, raw_smp_processor_id(),
current->comm, task_pid_nr(current));
printk(KERN_EMERG " lock: %p, .magic: %08x, .owner: %s/%d, "
".owner_cpu: %d\n",
lock, lock->magic,
owner ? owner->comm : "<none>",
owner ? task_pid_nr(owner) : -1,
lock->owner_cpu);
dump_stack();
sprintf( aee_str, "Spinlock %s :%s\n", current->comm, msg);
aee_kernel_exception( aee_str,"spinlock debugger\n");
}
irqreturn_t
handle_irq_event_percpu(struct irq_desc *desc, struct irqaction *action)
{
irqreturn_t retval = IRQ_NONE;
unsigned int random = 0, irq = desc->irq_data.irq;
#ifdef CONFIG_MTPROF_IRQ_DURATION
unsigned long long t1, t2, dur;
#ifdef CONFIG_ISR_MONITOR
char aee_str[40];
#endif
#endif
do {
irqreturn_t res;
trace_irq_handler_entry(irq, action);
#ifdef CONFIG_MTPROF_IRQ_DURATION
t1 = sched_clock();
res = action->handler(irq, action->dev_id);
t2 = sched_clock();
dur = t2 - t1;
action->duration += dur;
action->count++;
action->dur_max = max(dur,action->dur_max);
action->dur_min = min(dur,action->dur_min);
#ifdef CONFIG_MTPROF_CPUTIME
if(mtsched_enabled == 1)
{
int isr_find = 0;
struct mtk_isr_info *mtk_isr_point = current->se.mtk_isr;
struct mtk_isr_info *mtk_isr_current = mtk_isr_point;
char *isr_name = NULL;
current->se.mtk_isr_time += dur;
while(mtk_isr_point != NULL)
{
if(mtk_isr_point->isr_num == irq)
{
mtk_isr_point->isr_time += dur;
mtk_isr_point->isr_count++;
isr_find = 1;
break;
}
mtk_isr_current = mtk_isr_point;
mtk_isr_point = mtk_isr_point -> next;
}
if(isr_find == 0)
{
mtk_isr_point = kmalloc(sizeof(struct mtk_isr_info), GFP_ATOMIC);
if(mtk_isr_point == NULL)
{
printk(KERN_ERR"cant' alloc mtk_isr_info mem!\n");
}
else
{
mtk_isr_point->isr_num = irq;
mtk_isr_point->isr_time = dur;
mtk_isr_point->isr_count = 1;
mtk_isr_point->next = NULL;
if(mtk_isr_current == NULL)
{
current->se.mtk_isr = mtk_isr_point;
}
else
{
mtk_isr_current->next = mtk_isr_point;
}
isr_name = kmalloc(sizeof(action->name),GFP_ATOMIC);
if(isr_name != NULL)
{
strcpy(isr_name, action->name);
mtk_isr_point->isr_name = isr_name;
}
else
{
printk(KERN_ERR"cant' alloc isr_name mem!\n");
}
current->se.mtk_isr_count++;
}
}
}
#endif
#ifdef CONFIG_ISR_MONITOR
if(unlikely(dur>TIME_3MS)){
if(in_white_list(irq)){
printk("[ISR Monitor] Warning! ISR%d:%s too long, %llu ns > 3 ms, t1:%llu, t2:%llu\n", irq, action->name, dur, t1, t2);
}else if(dur>TIME_6MS){
sprintf( aee_str, "ISR#%d:%s too long>6ms\n", irq, action->name);
aee_kernel_exception( aee_str,"isr_monitor\n");
printk("[ISR Monitor] Warning! ISR%d:%s too long, %llu ns > 10 ms, t1:%llu, t2:%llu\n", irq, action->name, dur, t1, t2);
}else{
sprintf( aee_str, "ISR#%d:%s too long>3ms\n", irq, action->name);
aee_kernel_warning( aee_str,"isr_monitor\n");
printk("[ISR Monitor] Warning! ISR%d:%s too long, %llu ns > 3 ms, t1:%llu, t2:%llu\n", irq, action->name, dur, t1, t2);
}
}
#endif
#else
res = action->handler(irq, action->dev_id);
#endif
trace_irq_handler_exit(irq, action, res);
if (WARN_ONCE(!irqs_disabled(),"irq %u handler %pF enabled interrupts\n",
irq, action->handler))
local_irq_disable();
switch (res) {
case IRQ_WAKE_THREAD:
/*
* Catch drivers which return WAKE_THREAD but
* did not set up a thread function
*/
if (unlikely(!action->thread_fn)) {
warn_no_thread(irq, action);
break;
}
irq_wake_thread(desc, action);
/* Fall through to add to randomness */
case IRQ_HANDLED:
random |= action->flags;
break;
default:
break;
}
retval |= res;
action = action->next;
} while (action);
if (random & IRQF_SAMPLE_RANDOM)
add_interrupt_randomness(irq);
if (!noirqdebug)
note_interrupt(irq, desc, retval);
return retval;
}
static void process_dbg_opt(const char *opt)
{
char *buf = dbg_buf + strlen(dbg_buf);
if (0 == strncmp(opt, "regr:", 5))
{
char *p = (char *)opt + 5;
unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);
if (addr)
{
unsigned int regVal = DISP_REG_GET(addr);
DDP_DRV_INFO("regr: 0x%08X = 0x%08X\n", addr, regVal);
sprintf(buf, "regr: 0x%08X = 0x%08X\n", addr, regVal);
} else {
goto Error;
}
}
else if (0 == strncmp(opt, "regw:", 5))
{
char *p = (char *)opt + 5;
unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);
unsigned int val = (unsigned int) simple_strtoul(p + 1, &p, 16);
if (addr)
{
unsigned int regVal;
DISP_REG_SET(addr, val);
regVal = DISP_REG_GET(addr);
DDP_DRV_DBG("regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
sprintf(buf, "regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
} else {
goto Error;
}
}
else if (0 == strncmp(opt, "ddp_drv_dbg_log:", 16))
{
char *p = (char *)opt + 16;
unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
if (enable)
ddp_drv_dbg_log = 1;
else
ddp_drv_dbg_log = 0;
sprintf(buf, "ddp_drv_dbg_log: %d\n", ddp_drv_dbg_log);
}
else if (0 == strncmp(opt, "ddp_drv_irq_log:", 16))
{
char *p = (char *)opt + 16;
unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
if (enable)
ddp_drv_irq_log = 1;
else
ddp_drv_irq_log = 0;
sprintf(buf, "ddp_drv_irq_log: %d\n", ddp_drv_irq_log);
}
else if (0 == strncmp(opt, "backlight:", 10))
{
char *p = (char *)opt + 10;
unsigned int level = (unsigned int) simple_strtoul(p, &p, 10);
if (level)
{
disp_bls_set_backlight(level);
sprintf(buf, "backlight: %d\n", level);
} else {
goto Error;
}
}
else if (0 == strncmp(opt, "dump_reg:", 9))
{
char *p = (char *)opt + 9;
unsigned int module = (unsigned int) simple_strtoul(p, &p, 10);
DDP_DRV_INFO("process_dbg_opt, module=%d \n", module);
if (module<DISP_MODULE_MAX)
{
disp_dump_reg(module);
sprintf(buf, "dump_reg: %d\n", module);
} else {
DDP_DRV_INFO("process_dbg_opt2, module=%d \n", module);
goto Error;
}
}
else if (0 == strncmp(opt, "dump_aal:", 9))
{
char *p = (char *)opt + 9;
unsigned int arg = (unsigned int) simple_strtoul(p, &p, 10);
if (arg == 0)
{
int i;
unsigned int hist[LUMA_HIST_BIN];
disp_get_hist(hist);
for (i = 0; i < LUMA_HIST_BIN; i++)
{
DDP_DRV_DBG("LUMA_HIST_%02d: %d\n", i, hist[i]);
sprintf(dbg_buf + strlen(dbg_buf), "LUMA_HIST_%2d: %d\n", i, hist[i]);
}
}
else if (arg == 1)
{
int i;
DISP_AAL_PARAM param;
GetUpdateMutex();
memcpy(¶m, get_aal_config(), sizeof(DISP_AAL_PARAM));
ReleaseUpdateMutex();
DDP_DRV_DBG("pwmDuty: %lu\n", param.pwmDuty);
sprintf(dbg_buf + strlen(dbg_buf), "pwmDuty: %lu\n", param.pwmDuty);
for (i = 0; i < LUMA_CURVE_POINT; i++)
{
DDP_DRV_DBG("lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
sprintf(dbg_buf + strlen(dbg_buf), "lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
}
}
}
else if (0 == strncmp(opt, "debug:", 6))
{
char *p = (char *)opt + 6;
unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
if(enable==1)
{
printk("[DDP] debug=1, trigger AEE\n");
aee_kernel_exception("DDP-TEST-ASSERT", "[DDP] DDP-TEST-ASSERT");
}
else if(enable==2)
{
ddp_mem_test();
}
else if(enable==3)
{
ddp_mem_test2();
}
#if 0
else if(enable==4)
{
DDP_IRQ_ERR("test 4");
}
#endif
else if(enable==5)
{
DISP_MSG("SMI_LARB_MON_REQ0=0x%x, SMI_LARB_MON_REQ1=0x%x, SMI_0=0x%x, SMI_600=0x%x, SMI_604=0x%x, SMI_610=0x%x, SMI_614=0x%x, \
color_h_cnt=%d, color_line_cnt=%d, ovl_add_con=0x%x, ovl_ctrl_flow=0x%x \n",
*(volatile unsigned int*)0xf4010450,
*(volatile unsigned int*)0xf4010454,
*(volatile unsigned int*)0xf4010000,
*(volatile unsigned int*)0xf4010600,
*(volatile unsigned int*)0xf4010604,
*(volatile unsigned int*)0xf4010610,
*(volatile unsigned int*)0xf4010614,
*(volatile unsigned int*)0xf400b404,
*(volatile unsigned int*)0xf400b408,
DISP_REG_GET(DISP_REG_OVL_ADDCON_DBG),
DISP_REG_GET(DISP_REG_OVL_FLOW_CTRL_DBG));
sprintf(dbg_buf + strlen(dbg_buf), "SMI_LARB_MON_REQ0=0x%x, SMI_LARB_MON_REQ1=0x%x, SMI_0=0x%x, SMI_600=0x%x, SMI_604=0x%x, SMI_610=0x%x, SMI_614=0x%x,"
"color_h_cnt=%d, color_line_cnt=%d, ovl_add_con=0x%x, ovl_ctrl_flow=0x%x \n",
*(volatile unsigned int*)0xf4010450,
*(volatile unsigned int*)0xf4010454,
*(volatile unsigned int*)0xf4010000,
*(volatile unsigned int*)0xf4010600,
*(volatile unsigned int*)0xf4010604,
*(volatile unsigned int*)0xf4010610,
*(volatile unsigned int*)0xf4010614,
*(volatile unsigned int*)0xf400b404,
*(volatile unsigned int*)0xf400b408,
DISP_REG_GET(DISP_REG_OVL_ADDCON_DBG),
DISP_REG_GET(DISP_REG_OVL_FLOW_CTRL_DBG));
}
static void process_dbg_opt(const char *opt)
{
char *buf = dbg_buf + strlen(dbg_buf);
if (0 == strncmp(opt, "regr:", 5))
{
char *p = (char *)opt + 5;
unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);
if (addr)
{
unsigned int regVal = DISP_REG_GET(addr);
DDP_DRV_INFO("regr: 0x%08X = 0x%08X\n", addr, regVal);
sprintf(buf, "regr: 0x%08X = 0x%08X\n", addr, regVal);
} else {
goto Error;
}
}
else if (0 == strncmp(opt, "regw:", 5))
{
char *p = (char *)opt + 5;
unsigned int addr = (unsigned int) simple_strtoul(p, &p, 16);
unsigned int val = (unsigned int) simple_strtoul(p + 1, &p, 16);
if (addr)
{
unsigned int regVal;
DISP_REG_SET(addr, val);
regVal = DISP_REG_GET(addr);
DDP_DRV_DBG("regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
sprintf(buf, "regw: 0x%08X, 0x%08X = 0x%08X\n", addr, val, regVal);
} else {
goto Error;
}
}
else if (0 == strncmp(opt, "ddp_drv_dbg_log:", 16))
{
char *p = (char *)opt + 16;
unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
if (enable)
ddp_drv_dbg_log = 1;
else
ddp_drv_dbg_log = 0;
sprintf(buf, "ddp_drv_dbg_log: %d\n", ddp_drv_dbg_log);
}
else if (0 == strncmp(opt, "ddp_drv_irq_log:", 16))
{
char *p = (char *)opt + 16;
unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
if (enable)
ddp_drv_irq_log = 1;
else
ddp_drv_irq_log = 0;
sprintf(buf, "ddp_drv_irq_log: %d\n", ddp_drv_irq_log);
}
else if (0 == strncmp(opt, "backlight:", 10))
{
char *p = (char *)opt + 10;
unsigned int level = (unsigned int) simple_strtoul(p, &p, 10);
if (level)
{
disp_bls_set_backlight(level);
sprintf(buf, "backlight: %d\n", level);
} else {
goto Error;
}
}
else if (0 == strncmp(opt, "dump_reg:", 9))
{
char *p = (char *)opt + 9;
unsigned int module = (unsigned int) simple_strtoul(p, &p, 10);
DDP_DRV_INFO("process_dbg_opt, module=%d \n", module);
if (module<DISP_MODULE_MAX)
{
disp_dump_reg(module);
sprintf(buf, "dump_reg: %d\n", module);
} else {
DDP_DRV_INFO("process_dbg_opt2, module=%d \n", module);
goto Error;
}
}
else if (0 == strncmp(opt, "dump_aal:", 9))
{
char *p = (char *)opt + 9;
unsigned int arg = (unsigned int) simple_strtoul(p, &p, 10);
if (arg == 0)
{
int i;
unsigned int hist[LUMA_HIST_BIN];
disp_get_hist(hist);
for (i = 0; i < LUMA_HIST_BIN; i++)
{
DDP_DRV_DBG("LUMA_HIST_%02d: %d\n", i, hist[i]);
sprintf(dbg_buf + strlen(dbg_buf), "LUMA_HIST_%2d: %d\n", i, hist[i]);
}
}
else if (arg == 1)
{
int i;
DISP_AAL_PARAM param;
GetUpdateMutex();
memcpy(¶m, get_aal_config(), sizeof(DISP_AAL_PARAM));
ReleaseUpdateMutex();
DDP_DRV_DBG("pwmDuty: %lu\n", param.pwmDuty);
sprintf(dbg_buf + strlen(dbg_buf), "pwmDuty: %lu\n", param.pwmDuty);
for (i = 0; i < LUMA_CURVE_POINT; i++)
{
DDP_DRV_DBG("lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
sprintf(dbg_buf + strlen(dbg_buf), "lumaCurve[%02d]: %lu\n", i, param.lumaCurve[i]);
}
}
}
else if (0 == strncmp(opt, "debug:", 6))
{
char *p = (char *)opt + 6;
unsigned int enable = (unsigned int) simple_strtoul(p, &p, 10);
if(enable==1)
{
printk("[DDP] debug=1, trigger AEE\n");
aee_kernel_exception("DDP-TEST-ASSERT", "[DDP] DDP-TEST-ASSERT");
}
else if(enable==2)
{
ddp_mem_test();
}
else if(enable==3)
{
ddp_mem_test2();
}
}
else if (0 == strncmp(opt, "mmp", 3))
{
init_ddp_mmp_events();
}
else if (0 == strncmp(opt, "dpfd_ut1:", 9))
{
#if 0
char *p = (char *)opt + 9;
unsigned int channel = (unsigned int) simple_strtoul(p, &p, 10);
//ddpk_testfunc_1(channel);
#endif
}
else if (0 == strncmp(opt, "dpfd_ut2:", 9))
{
#if 0
char *p = (char *)opt + 9;
unsigned int channel = (unsigned int) simple_strtoul(p, &p, 10);
//ddpk_testfunc_2(channel);
#endif
}
else if (0 == strncmp(opt, "dpfd:log", 8))
{
}
else if (0 == strncmp(opt, "pqon", 4))
{
pq_debug_flag=0;
sprintf(buf, "Turn on PQ %d\n", pq_debug_flag);
}
else if (0 == strncmp(opt, "pqoff", 5))
{
pq_debug_flag=1;
sprintf(buf, "Turn off PQ %d\n", pq_debug_flag);
}
else if (0 == strncmp(opt, "pqdemo", 6))
{
pq_debug_flag=2;
sprintf(buf, "Turn on PQ (demo) %d\n", pq_debug_flag);
}
else if (0 == strncmp(opt, "pqstop", 6))
{
pq_debug_flag=3;
sprintf(buf, "Stop mutex update %d\n", pq_debug_flag);
}
else if (0 == strncmp(opt, "aalon", 5))
{
aal_debug_flag=0;
sprintf(buf, "resume aal update %d\n", aal_debug_flag);
}
else if (0 == strncmp(opt, "aaloff", 6))
{
aal_debug_flag=1;
sprintf(buf, "suspend aal update %d\n", aal_debug_flag);
}
else if (0 == strncmp(opt, "color_win:", 10))
{
char *p = (char *)opt + 10;
unsigned int sat_upper, sat_lower, hue_upper, hue_lower;
sat_upper = (unsigned int) simple_strtoul(p, &p, 10);
p++;
sat_lower = (unsigned int) simple_strtoul(p, &p, 10);
p++;
hue_upper = (unsigned int) simple_strtoul(p, &p, 10);
p++;
hue_lower = (unsigned int) simple_strtoul(p, &p, 10);
DDP_DRV_INFO("Set color_win: %u, %u, %u, %u\n", sat_upper, sat_lower, hue_upper, hue_lower);
disp_pq_set_window(sat_upper, sat_lower, hue_upper, hue_lower);
}
else if (0 == strncmp(opt, "dpx", 3))
{
ddp_debug_flag = ddp_debug_flag ^ 1;
DDP_DRV_INFO("ddp_debug_flag: %d\n", ddp_debug_flag);
}
else if (0 == strncmp(opt, "ovl_reg:", 8))
{
char *p = (char *)opt + 8;
unsigned int offset = (unsigned int) simple_strtoul(p, &p, 16);
unsigned int value = (unsigned int) simple_strtoul(p + 1, &p, 16);
disp_path_get_mutex_(gMutexID);
DISP_REG_SET(DISP_OVL_BASE+offset, value);
disp_path_release_mutex_(gMutexID);
DDP_DRV_INFO("ovl_reg: 0x%08X = 0x%08X\n", DISP_OVL_BASE+offset, value);
}
else if (0 == strncmp(opt, "rdma_reg:", 9))
{
char *p = (char *)opt + 9;
unsigned int offset = (unsigned int) simple_strtoul(p, &p, 16);
unsigned int value = (unsigned int) simple_strtoul(p + 1, &p, 16);
disp_path_get_mutex_(gMutexID);
DISP_REG_SET(DISP_RDMA_BASE+offset, value);
disp_path_release_mutex_(gMutexID);
DDP_DRV_INFO("rdma_reg: 0x%08X = 0x%08X\n", DISP_RDMA_BASE+offset, value);
}
else if (0 == strncmp(opt, "bls_reg:", 8))
{
char *p = (char *)opt + 8;
unsigned int offset = (unsigned int) simple_strtoul(p, &p, 16);
unsigned int value = (unsigned int) simple_strtoul(p + 1, &p, 16);
disp_path_get_mutex_(gMutexID);
DISP_REG_SET(DISP_BLS_BASE+offset, value);
disp_path_release_mutex_(gMutexID);
DDP_DRV_INFO("bls_reg: 0x%08X = 0x%08X\n", DISP_BLS_BASE+offset, value);
}
else if (0 == strncmp(opt, "pq_reg:", 7))
{
char *p = (char *)opt + 7;
unsigned int offset = (unsigned int) simple_strtoul(p, &p, 16);
unsigned int value = (unsigned int) simple_strtoul(p + 1, &p, 16);
disp_path_get_mutex_(gMutexID);
DISP_REG_SET(DISP_PQ_BASE+offset, value);
disp_path_release_mutex_(gMutexID);
DDP_DRV_INFO("pq_reg: 0x%08X = 0x%08X\n", DISP_PQ_BASE+offset, value);
}
else
{
goto Error;
}
return;
Error:
DDP_DRV_ERR("parse command error!\n%s\n\n%s", opt, STR_HELP);
}
static void aee_Handle(struct work_struct *_psWork)
{
/* avoid the build warnning */
_psWork = _psWork;
aee_kernel_exception("gpulog", "aee dump gpulog");
}
