Exemplos de ag71xx_mdio_mii_write em C++ (Cpp)

Exemplo n.º 1

Arquivo: ag71xx_mdio.c Projeto: gvsurenderreddy/openwrt-9

static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
{
	struct ag71xx_mdio *am = bus->priv;

	ag71xx_mdio_mii_write(am, addr, reg, val);
	return 0;
}

Exemplo n.º 2

Arquivo: ag71xx_ar7240.c Projeto: darcyg/ap_project_v2

static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val)
{
	unsigned long flags;
	u16 phy_addr;
	u16 phy_reg;

	reg = (reg & 0xfffffffc) >> 2;
	phy_addr = mk_phy_addr(reg);
	phy_reg = mk_phy_reg(reg);

	local_irq_save(flags);
	ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg));
	ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg + 1, (val >> 16));
	ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg, (val & 0xffff));
	local_irq_restore(flags);
}

Exemplo n.º 3

Arquivo: ag71xx_mdio.c Projeto: Cribstone/linino

static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
{
	struct ag71xx_mdio *am = bus->priv;

	if (am->pdata->is_ar7240)
		ar7240sw_phy_write(bus, addr, reg, val);
	else
		ag71xx_mdio_mii_write(am, addr, reg, val);
	return 0;
}

Exemplo n.º 4

Arquivo: ag71xx_ar7240.c Projeto: darcyg/ap_project_v2

static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg)
{
	unsigned long flags;
	u16 phy_addr;
	u16 phy_reg;
	u32 hi, lo;

	reg = (reg & 0xfffffffc) >> 2;
	phy_addr = mk_phy_addr(reg);
	phy_reg = mk_phy_reg(reg);

	local_irq_save(flags);
	ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg));
	lo = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg);
	hi = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg + 1);
	local_irq_restore(flags);

	return (hi << 16) | lo;
}

Exemplo n.º 5

Arquivo: ag71xx_phy.c Projeto: janfj/dd-wrt

static int ag71xx_phy_connect_multi(struct ag71xx *ag)
{
	struct device *dev = &ag->pdev->dev;
	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
	struct phy_device *phydev = NULL;
	int phy_addr;
	int ret = 0;
	int phyadd=0;

	for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
		if (!(pdata->phy_mask & (1 << phy_addr)))
			continue;

		if (ag->mii_bus->phy_map[phy_addr] == NULL)
			continue;

		DBG("%s: PHY found at %s, uid=%08x\n",
			dev_name(dev),
			dev_name(&ag->mii_bus->phy_map[phy_addr]->dev),
			ag->mii_bus->phy_map[phy_addr]->phy_id);
		phyadd = phy_addr;

		if (phydev == NULL)
			phydev = ag->mii_bus->phy_map[phy_addr];
	}

	if (!phydev) {
		dev_err(dev, "no PHY found with phy_mask=%08x\n",
			   pdata->phy_mask);
		return -ENODEV;
	}

	if (ag->mii_bus->phy_map[phyadd]->phy_id == 0x4dd072 && phyadd == 1)
	{
	printk(KERN_INFO "fixup Atheros F1 Phy\n");
	ag71xx_mdio_mii_write(ag->mii_bus->priv, phyadd, 0x1d, 0);
	ag71xx_mdio_mii_write(ag->mii_bus->priv, phyadd, 0x1e, 0x82ee);
	ag71xx_mdio_mii_write(ag->mii_bus->priv, phyadd, 0x1d, 5);
	ag71xx_mdio_mii_write(ag->mii_bus->priv, phyadd, 0x1e, 0x2d47);
	ag71xx_mdio_mii_write(ag->mii_bus->priv, phyadd, 0, 0x8000|0x1000);
	udelay(50000);
 	}

	ag->phy_dev = phy_connect(ag->dev, dev_name(&phydev->dev),
				  &ag71xx_phy_link_adjust,
				  pdata->phy_if_mode);

	if (IS_ERR(ag->phy_dev)) {
		dev_err(dev, "could not connect to PHY at %s\n",
			   dev_name(&phydev->dev));
		return PTR_ERR(ag->phy_dev);
	}

	/* mask with MAC supported features */
	if (pdata->has_gbit)
		phydev->supported &= PHY_GBIT_FEATURES;
	else
		phydev->supported &= PHY_BASIC_FEATURES;

	phydev->advertising = phydev->supported;

	dev_info(dev, "connected to PHY at %s [uid=%08x, driver=%s]\n",
		    dev_name(&phydev->dev), phydev->phy_id, phydev->drv->name);

	ag->link = 0;
	ag->speed = 0;
	ag->duplex = -1;

	return ret;
}