void m5636_device_init(void)
{
and_l(~0x00004000, &GPIO_INT_EN); /* probably redundant: disable
interrupt; just in case ... */
and_l(~0x00000004, &GPIO1_OUT); /* probably redundant: set GPIO34 low */
or_l( 0x00000004, &GPIO1_ENABLE); /* GPIO34 enable (see above) */
or_l( 0x00000004, &GPIO1_FUNCTION); /* GPIO34 function (see above) */
}
void pcm_play_dma_init(void)
{
freq_ent = pcm_freq_parms[pcm_fsel];
AUDIOGLOB = AUDIOGLOB_DEFPARM;
DIVR0 = 54; /* DMA0 is mapped into vector 54 in system.c */
and_l(0xffffff00, &DMAROUTE);
or_l(DMA0_REQ_AUDIO_1, &DMAROUTE);
DMACONFIG = 1; /* DMA0Req = PDOR3, DMA1Req = PDIR2 */
BCR0 = 0; /* No bytes waiting */
ICR6 = (6 << 2); /* Enable interrupt at level 6, priority 0 */
/* Setup Coldfire I2S before initializing hardware or changing
other settings. */
or_l(IIS_FIFO_RESET, &IIS_PLAY);
IIS_PLAY = IIS_PLAY_DEFPARM | IIS_FIFO_RESET;
audio_set_output_source(AUDIO_SRC_PLAYBACK);
/* Initialize default register values. */
audiohw_init();
audio_input_mux(AUDIO_SRC_PLAYBACK, SRCF_PLAYBACK);
audiohw_set_frequency(pcm_fsel);
coldfire_set_pllcr_audio_bits(PLLCR_SET_AUDIO_BITS_DEFPARM);
#if defined(HAVE_SPDIF_REC) || defined(HAVE_SPDIF_OUT)
spdif_init();
#endif
} /* pcm_play_dma_init */
void power_off(void)
{
lcd_remote_poweroff();
set_irq_level(DISABLE_INTERRUPTS);
and_l(~0x00000008, &GPIO_OUT); /* Set KEEPACT low */
asm("halt");
}
bool backlight_hw_init(void)
{
and_l(~0x00000008, &GPIO1_OUT);
or_l(0x00000008, &GPIO1_ENABLE);
or_l(0x00000008, &GPIO1_FUNCTION);
return true; /* Backlight always ON after boot. */
}
void DMA0(void)
{
unsigned long res = DSR0;
void *start;
size_t size;
and_l(~(DMA_EEXT | DMA_INT), &DCR0); /* per request and int OFF */
DSR0 = 1; /* Clear interrupt and errors */
if (res & 0x70)
{
logf("DMA0 err: %02x", res);
#if 0
logf(" SAR0: %08x", SAR0);
logf(" DAR0: %08x", DAR0);
logf(" BCR0: %08x", BCR0);
logf(" DCR0: %08x", DCR0);
#endif
}
/* Force stop on error */
pcm_play_get_more_callback((res & 0x70) ? NULL : &start, &size);
if (size != 0)
{
SAR0 = (unsigned long)start; /* Source address */
BCR0 = size; /* Bytes to transfer */
or_l(DMA_EEXT | DMA_INT, &DCR0); /* per request and int ON */
/* Call buffer callback */
pcm_play_dma_started_callback();
}
/* else inished playing */
} /* DMA0 */
static inline void enable_mclk(bool enable)
{
if(enable)
and_l(~(1<<10), &GPIO1_FUNCTION);
else
or_l((1<<10), &GPIO1_FUNCTION);
}
void button_init_device(void)
{
/* GPIO56 (main PLAY) general input
* GPIO41 (remote PLAY) is shared with Audio Serial Data
*/
or_l((1<<24),&GPIO1_FUNCTION);
and_l(~(1<<24),&GPIO1_ENABLE);
}
void power_init(void)
{
/* Charger detect */
and_l(~0x01000000, &GPIO1_ENABLE);
or_l(0x01000000, &GPIO1_FUNCTION);
pcf50606_init();
}
void power_off(void)
{
lcd_shutdown();
set_irq_level(DISABLE_INTERRUPTS);
and_l(~(1<<21), &GPIO1_OUT); /* pull KEEPACT low */
asm("halt");
while(1);
}
void usb_enable(bool on)
{
if(on) {
or_l(0x10000000, &GPIO_OUT);
} else {
and_l(~0x10000000, &GPIO_OUT);
}
}
void usb_init_device(void)
{
and_l(~0x10000000, &GPIO_OUT); /* USB enable bit */
or_l(0x10000000, &GPIO_ENABLE);
or_l(0x10000000, &GPIO_FUNCTION);
or_l(0x00000400, &GPIO1_FUNCTION); /* USB detect */
}
void pcm_rec_dma_close(void)
{
pcm_rec_dma_stop();
and_l(0xffff00ff, &DMAROUTE);
ICR7 = 0x00; /* Disable interrupt */
dma_rec_lock.state = (0 << 15);
} /* pcm_rec_dma_close */
void ata_reset(void)
{
/* GPIO19 */
and_l(~(1<<19), &GPIO_OUT);
sleep(1); /* > 25us */
or_l((1<<19), &GPIO_OUT);
sleep(1); /* > 25us */
}
void uda1380_reset(void)
{
/* RESET signal */
or_l(1<<29, &GPIO_OUT);
or_l(1<<29, &GPIO_ENABLE);
or_l(1<<29, &GPIO_FUNCTION);
sleep(HZ/100);
and_l(~(1<<29), &GPIO_OUT);
}
/* Stops the DMA transfer and interrupt */
void pcm_play_dma_stop(void)
{
and_l(~(DMA_EEXT | DMA_INT), &DCR0); /* per request and int OFF */
BCR0 = 0; /* No bytes remaining */
DSR0 = 1; /* Clear interrupt, errors, stop transfer */
iis_play_reset_if_playback(true);
dma_play_lock.state = (1 << 14);
} /* pcm_play_dma_stop */
void adc_init(void)
{
or_l(0x80600080, &GPIO_FUNCTION); /* GPIO7: CS
GPIO21: Data In (to the ADC)
GPIO22: CLK
GPIO31: Data Out (from the ADC) */
or_l(0x00600080, &GPIO_ENABLE);
or_l(0x80, &GPIO_OUT); /* CS high */
and_l(~0x00400000, &GPIO_OUT); /* CLK low */
}
void ide_power_enable(bool on)
{
(void)on;
if (on)
and_l(~(1<<31),&GPIO_OUT);
else
or_l((1<<31),&GPIO_OUT);
or_l((1<<31),&GPIO_ENABLE);
or_l((1<<31),&GPIO_FUNCTION);
}
void pcm_rec_dma_init(void)
{
DIVR1 = 55; /* DMA1 is mapped into vector 55 in system.c */
DMACONFIG = 1; /* DMA0Req = PDOR3, DMA1Req = PDIR2 */
and_l(0xffff00ff, &DMAROUTE);
or_l(DMA1_REQ_AUDIO_2, &DMAROUTE);
pcm_rec_dma_stop();
/* Enable interrupt at level 6, priority 1 */
ICR7 = (6 << 2) | (1 << 0);
} /* pcm_init_recording */
void pcm_rec_dma_stop(void)
{
and_l(~(DMA_EEXT | DMA_INT), &DCR1); /* per request and int OFF */
DSR1 = 1; /* Clear interrupt, errors, stop transfer */
BCR1 = 0; /* No bytes received */
or_l(PDIR2_FIFO_RESET, &DATAINCONTROL);
iis_play_reset_if_playback(false);
dma_rec_lock.state = (1 << 15);
} /* pcm_rec_dma_stop */
void power_init(void)
{
/* GPIO53 has to be high - low resets device */
/* GPIO49 is FM related */
or_l((1<<21)|(1<<17), &GPIO1_OUT);
or_l((1<<21)|(1<<17), &GPIO1_ENABLE);
or_l((1<<21)|(1<<17)|(1<<14), &GPIO1_FUNCTION);
and_l(~(1<<15), &GPIO_OUT);
or_l((1<<15),&GPIO_ENABLE);
or_l((1<<15),&GPIO_FUNCTION);
or_l((1<<23), &GPIO_OUT);
and_l(~(1<<23), &GPIO_ENABLE);
or_l((1<<23), &GPIO_FUNCTION);
#ifndef BOOTLOADER
/* The boot loader controls the power */
ide_power_enable(true);
#endif
}
void usb_enable(bool on)
{
if(on)
{
and_l(~(1<<30),&GPIO_OUT); /* GPIO30 low */
and_l(~(1<<22),&GPIO_OUT); /* GPIO22 low */
or_l((1<<4),&GPIO1_OUT); /* GPIO36 high */
}
else
{
or_l((1<<22),&GPIO_OUT); /* GPIO22 high */
or_l((1<<30),&GPIO_OUT); /* GPIO30 high */
and_l(~(1<<4),&GPIO1_OUT); /* GPIO36 low */
while ( !(GPIO1_READ & (1<<5)) ) {}
sleep(HZ);
}
}
void ADC(void)
{
static unsigned char channel IBSS_ATTR;
/* read current value */
adc_data[(channel&0x03)] = ADVALUE;
/* switch channel
*
* set source remark
* ADCONFIG is 16bit wide so we have to shift data by 16bits left
* thats why we shift <<24 instead of <<8
*/
channel++;
and_l(~(0x03<<24),&ADCONFIG);
or_l( (((channel&0x03) << 8 )|(1<<7))<<16, &ADCONFIG);
if ( (channel & 0x03) == 0 )
/* disable ADC interrupt */
and_l((~(1<<6))<<16,&ADCONFIG);
}
bool tuner_power(bool status)
{
(void)status;
if (status)
{
and_l(~(1<<17), &GPIO1_OUT);
}
else
{
or_l((1<<17), &GPIO1_OUT);
}
return status;
}
void usb_init_device(void)
{
/* GPIO42 is USB detect input
* but it also serves as MCLK2 for DAC
*/
and_l(~(1<<4), &GPIO1_OUT); /* GPIO36 low */
or_l((1<<4), &GPIO1_ENABLE); /* GPIO36 */
or_l((1<<4)|(1<<5), &GPIO1_FUNCTION); /* GPIO36 GPIO37 */
/* GPIO22 GPIO30 high */
or_l((1<<22)|(1<<30), &GPIO_OUT);
or_l((1<<22)|(1<<30), &GPIO_ENABLE);
or_l((1<<22)|(1<<30), &GPIO_FUNCTION);
}
void lcd_init_device(void)
{
and_l(~0x00000800, &GPIO_FUNCTION); /* CS3 line */
/* LCD Reset GPO34 */
or_l(0x00000004, &GPIO1_ENABLE); /* set as output */
or_l(0x00000004, &GPIO1_FUNCTION); /* switch to secondary function - GPIO */
and_l(~0x00000004, &GPIO1_OUT); /* RESET low */
sleep(1); /* delay at least 1000 ns */
or_l(0x00000004, &GPIO1_OUT); /* RESET high */
sleep(1);
lcd_write_command(LCD_CNTL_ON_OFF | 1); /* LCD ON */
lcd_write_command(LCD_CNTL_OFF_MODE | 1); /* OFF -> VCC on drivers */
lcd_write_command(LCD_CNTL_REVERSE | 0); /* Reverse OFF */
lcd_write_command(LCD_CNTL_ALL_LIGHTING | 0); /* Normal */
lcd_write_command(LCD_CNTL_COMMON_OUTPUT_STATUS | 1); /* Reverse dir */
lcd_write_command_ex(LCD_CNTL_DISPLAY_START_LINE, 0, -1);
lcd_write_command(LCD_CNTL_COLUMN_ADDRESS_DIR | 0); /* Normal */
lcd_write_command_ex(LCD_CNTL_DISPLAY_MODE, 0, -1); /* Greyscale mode */
lcd_write_command_ex(LCD_CNTL_GRAY_SCALE_PATTERN, 0x53, -1);
lcd_write_command_ex(LCD_CNTL_DUTY_SET, 0x20, 1);
lcd_write_command_ex(LCD_CNTL_ELECTRONIC_VOLUME, 24, -1); /* 0x18 */
lcd_write_command(LCD_CNTL_OSC_ON_OFF | 1); /* Oscillator ON */
lcd_write_command(LCD_CNTL_POWER_SAVE | 0);
lcd_write_command_ex(LCD_CNTL_VOLTAGE_SELECT, 3, -1);
lcd_write_command_ex(LCD_CNTL_POWER_CONTROL, 0x17, -1);
lcd_write_command_ex(LCD_CNTL_OSC_FREQUENCY, 3, -1);
lcd_write_command(LCD_CNTL_NLINE_ON_OFF | 1); /* N-line ON */
lcd_write_command_ex(LCD_CNTL_LINE_INVERT_DRIVE, 0x10, -1);
lcd_write_command_ex(LCD_CNTL_TEMP_GRADIENT_SELECT, 0, -1);
lcd_update();
}
/* Nice shutdown of WM8751 codec */
void audiohw_close(void)
{
/* 1. Set DACMU = 1 to soft-mute the audio DACs. */
audiohw_mute(true);
#ifdef MPIO_HD200
/* disable headphone out */
and_l(~(1<<25), &GPIO1_OUT);
#endif
/* 2. Disable all output buffers. */
wmcodec_set_reg(PWRMGMT2, 0x0);
/* 3. Switch off the power supplies. */
wmcodec_set_reg(PWRMGMT1, 0x0);
}
void pcm_play_dma_pause(bool pause)
{
if (pause)
{
/* pause playback on current buffer */
and_l(~(DMA_EEXT | DMA_INT), &DCR0); /* per request and int OFF */
DSR0 = 1; /* stop channel */
iis_play_reset_if_playback(true);
dma_play_lock.state = (1 << 14);
}
else
{
/* restart playback on current buffer */
iis_play_reset_if_playback(true);
or_l(DMA_INT | DMA_EEXT | DMA_START, &DCR0); /* everything ON */
dma_play_lock.state = (0 << 14);
}
} /* pcm_play_dma_pause */
void DMA1(void)
{
unsigned long res = DSR1;
int status = 0;
void *start;
size_t size;
and_l(~(DMA_EEXT | DMA_INT), &DCR1); /* per request and int OFF */
DSR1 = 1; /* Clear interrupt and errors */
if (res & 0x70)
{
status = DMA_REC_ERROR_DMA;
logf("DMA1 err: %02x", res);
#if 0
logf(" SAR1: %08x", SAR1);
logf(" DAR1: %08x", DAR1);
logf(" BCR1: %08x", BCR1);
logf(" DCR1: %08x", DCR1);
#endif
}
#ifdef HAVE_SPDIF_REC
else if (DATAINCONTROL == 0xc038 &&
(INTERRUPTSTAT & ((1 << 23) | (1 << 22))))
{
/* reason: symbolerr, parityerr.
* Ignore valnogood since several sources don't set it properly. */
/* clear: ebu1cnew, symbolerr, parityerr */
INTERRUPTCLEAR = (1 << 25) | (1 << 23) | (1 << 22);
status = DMA_REC_ERROR_SPDIF;
logf("spdif err");
}
#endif
/* Inform PCM we have more data (or error) */
pcm_rec_more_ready_callback(status, &start, &size);
if (size != 0)
{
DAR1 = (unsigned long)start; /* Destination address */
BCR1 = (unsigned long)size; /* Bytes to transfer */
or_l(DMA_EEXT | DMA_INT, &DCR1); /* per request and int ON */
}
} /* DMA1 */
/* Reset and power up the WM8751 */
void audiohw_preinit(void)
{
#ifdef MROBE_100
/* controls headphone ouput */
GPIOL_ENABLE |= 0x10;
GPIOL_OUTPUT_EN |= 0x10;
GPIOL_OUTPUT_VAL |= 0x10; /* disable */
#endif
#ifdef MPIO_HD200
/* control headphone output
* disabled on startup
*/
and_l(~(1<<25),&GPIO1_OUT);
or_l((1<<25), &GPIO1_ENABLE);
or_l((1<<25), &GPIO1_FUNCTION);
#endif
/*
* 1. Switch on power supplies.
* By default the WM8751 is in Standby Mode, the DAC is
* digitally muted and the Audio Interface, Line outputs
* and Headphone outputs are all OFF (DACMU = 1 Power
* Management registers 1 and 2 are all zeros).
*/
wmcodec_write(RESET, RESET_RESET); /*Reset*/
/* 2. Enable Vmid and VREF. */
wmcodec_set_bits(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_5K);
#ifdef CODEC_SLAVE
wmcodec_set_bits(AINTFCE,AINTFCE_WL_16 | AINTFCE_FORMAT_I2S);
#else
/* BCLKINV=0(Dont invert BCLK) MS=1(Enable Master) LRSWAP=0 LRP=0 */
/* IWL=00(16 bit) FORMAT=10(I2S format) */
wmcodec_set_bits(AINTFCE, AINTFCE_MS | AINTFCE_WL_16 |
AINTFCE_FORMAT_I2S);
#endif
/* Set default samplerate */
audiohw_set_frequency(HW_FREQ_DEFAULT);
}
void adc_init(void)
{
/* GPIO38 GPIO39 */
and_l(~((1<<6)|(1<<7)), &GPIO1_FUNCTION);
/* ADOUT_SEL = 01
* SOURCE SELECT = 000
* CLEAR INTERRUPT FLAG
* ENABLE INTERRUPT = 0
* ADOUT_DRIVE = 00
* ADCLK_SEL = 011 (busclk/8)
*/
ADCONFIG = (1<<10)|(1<<8)|(1<<7)|0x03;
/* ADC interrupt level 4.0 */
or_l((4<<28), &INTPRI8);
/* create tick task which enables ADC interrupt */
tick_add_task(adc_tick);
}