void _jit_pad_buffer(unsigned char *buf, int len)
{
arm_inst_buf inst;
/* Initialize the instruction buffer */
arm_inst_buf_init(inst, buf, buf + len*4);
while(len > 0)
{
/* Traditional arm NOP */
arm_nop(inst);
--len;
}
/* Flush the cache lines that we just wrote */
_jit_flush_exec(buf, ((unsigned char *)(inst.current)) - buf);
}
void armv7a::decode_msrhints(armv7a_ir& inst)
{
uint32_t op = inst(22);
uint32_t op1 = inst(19, 16);
uint32_t op2 = inst(7, 0);
bool op_0 = op == 0;
bool op_1 = op == 1;
bool op1_0000 = (op1 & B(1111)) == B(0000);
bool op1_0100 = (op1 & B(1111)) == B(0100);
bool op1_1x00 = (op1 & B(1011)) == B(1000);
bool op1_xx01 = (op1 & B(0011)) == B(0001);
bool op1_xx1x = (op1 & B(0010)) == B(0010);
bool op2_0000_0000 = (op2 & B(1111 1111)) == B(0000 0000);
bool op2_0000_0001 = (op2 & B(1111 1111)) == B(0000 0001);
bool op2_0000_0010 = (op2 & B(1111 1111)) == B(0000 0010);
bool op2_0000_0011 = (op2 & B(1111 1111)) == B(0000 0011);
bool op2_0000_0100 = (op2 & B(1111 1111)) == B(0000 0100);
bool op2_1111_xxxx = (op2 & B(1111 0000)) == B(1111 0000);
if(op_0 && op1_0000 && op2_0000_0000)
{
arm_nop(inst);
}
else if(op_0 && op1_0000 && op2_0000_0001)
{
arm_yield(inst);
}
else if(op_0 && op1_0000 && op2_0000_0010)
{
arm_wfe(inst);
}
else if(op_0 && op1_0000 && op2_0000_0011)
{
arm_wfi(inst);
}
else if(op_0 && op1_0000 && op2_0000_0100)
{
arm_sev(inst);
}
else if(op_0 && op1_0000 && op2_1111_xxxx)
{
arm_dbg(inst);
}
else if(op_0 && op1_0100)
{
arm_msr_imm_ap(inst);
}
else if(op_0 && op1_1x00)
{
arm_msr_imm_ap(inst);
}
else if(op_0 && op1_xx01)
{
arm_msr_imm_sys(inst);
}
else if(op_0 && op1_xx1x)
{
arm_msr_imm_sys(inst);
}
else if(op_1)
{
arm_msr_imm_sys(inst);
}
else
{
printb(core_id, d_armv7a_decode_msrhints, "decode error: 0x%X, pc=%X", inst.val, rf.current_pc());
}
}
