Exemplos de ath79_clocks_init em C++ (Cpp)

Exemplo n.º 1

Arquivo: setup.c Projeto: AlexShiLucky/linux

void __init plat_time_init(void)
{
	unsigned long cpu_clk_rate;
	unsigned long ahb_clk_rate;
	unsigned long ddr_clk_rate;
	unsigned long ref_clk_rate;

	if (IS_ENABLED(CONFIG_OF) && mips_machtype == ATH79_MACH_GENERIC_OF) {
		ath79_of_plat_time_init();
		return;
	}

	ath79_clocks_init();

	cpu_clk_rate = ath79_get_sys_clk_rate("cpu");
	ahb_clk_rate = ath79_get_sys_clk_rate("ahb");
	ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
	ref_clk_rate = ath79_get_sys_clk_rate("ref");

	pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
		cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
		ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
		ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
		ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000);

	mips_hpt_frequency = cpu_clk_rate / 2;
}

Exemplo n.º 2

Arquivo: setup.c Projeto: artynet/linux-3.3.8

void __init plat_mem_setup(void)
{
    set_io_port_base(KSEG1);

    ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
                                       AR71XX_RESET_SIZE);
    ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
                                     AR71XX_PLL_SIZE);
    ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,
                                     AR71XX_DDR_CTRL_SIZE);

    ath79_detect_sys_type();
    ath79_detect_mem_size();
    ath79_clocks_init();

    _machine_restart = ath79_restart;
    _machine_halt = ath79_halt;
    pm_power_off = ath79_halt;
}

Exemplo n.º 3

Arquivo: setup.c Projeto: 020gzh/linux

void __init plat_time_init(void)
{
	unsigned long cpu_clk_rate;
	unsigned long ahb_clk_rate;
	unsigned long ddr_clk_rate;
	unsigned long ref_clk_rate;

	ath79_clocks_init();

	cpu_clk_rate = ath79_get_sys_clk_rate("cpu");
	ahb_clk_rate = ath79_get_sys_clk_rate("ahb");
	ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
	ref_clk_rate = ath79_get_sys_clk_rate("ref");

	pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
		cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
		ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
		ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
		ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000);

	mips_hpt_frequency = cpu_clk_rate / 2;
}