void ath_cardbus_attach(device_t parent, device_t self, void *aux) { struct ath_cardbus_softc *csc = device_private(self); struct ath_softc *sc = &csc->sc_ath; struct cardbus_attach_args *ca = aux; cardbus_devfunc_t ct = ca->ca_ct; bus_addr_t adr; sc->sc_dev = self; sc->sc_dmat = ca->ca_dmat; csc->sc_ct = ct; csc->sc_tag = ca->ca_tag; aprint_normal("\n"); /* * Map the device. */ if (Cardbus_mapreg_map(ct, ATH_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, &csc->sc_iot, &csc->sc_ioh, &adr, &csc->sc_mapsize) == 0) { #if rbus #else (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); #endif csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM; } else { aprint_error_dev(self, "unable to map device registers\n"); return; } sc->sc_st = HALTAG(csc->sc_iot); sc->sc_sh = HALHANDLE(csc->sc_ioh); /* * Set up the PCI configuration registers. */ ath_cardbus_setup(csc); /* Remember which interrupt line. */ csc->sc_intrline = ca->ca_intrline; ATH_LOCK_INIT(sc); /* * Finish off the attach. */ if (ath_attach(PCI_PRODUCT(ca->ca_id), sc) != 0) return; if (!pmf_device_register(self, ath_cardbus_suspend, ath_cardbus_resume)) aprint_error_dev(self, "couldn't establish power handler\n"); else { pmf_class_network_register(self, &sc->sc_if); pmf_device_suspend_self(self); } }
static int ath_ahb_attach(device_t dev) { struct ath_ahb_softc *psc = device_get_softc(dev); struct ath_softc *sc = &psc->sc_sc; int error = ENXIO; int rid; long eepromaddr; uint8_t *p; sc->sc_dev = dev; rid = 0; psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (psc->sc_sr == NULL) { device_printf(dev, "cannot map register space\n"); goto bad; } if (resource_long_value(device_get_name(dev), device_get_unit(dev), "eepromaddr", &eepromaddr) != 0) { device_printf(dev, "cannot fetch 'eepromaddr' from hints\n"); goto bad0; } rid = 0; device_printf(sc->sc_dev, "eeprom @ %p\n", (void *) eepromaddr); psc->sc_eeprom = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, (uintptr_t) eepromaddr, (uintptr_t) eepromaddr + (uintptr_t) ((ATH_EEPROM_DATA_SIZE * 2) - 1), 0, RF_ACTIVE); if (psc->sc_eeprom == NULL) { device_printf(dev, "cannot map eeprom space\n"); goto bad0; } /* XXX uintptr_t is a bandaid for ia64; to be fixed */ sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr); sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); /* * Mark device invalid so any interrupts (shared or otherwise) * that arrive before the HAL is setup are discarded. */ sc->sc_invalid = 1; /* Copy the EEPROM data out */ sc->sc_eepromdata = malloc(ATH_EEPROM_DATA_SIZE * 2, M_TEMP, M_NOWAIT | M_ZERO); if (sc->sc_eepromdata == NULL) { device_printf(dev, "cannot allocate memory for eeprom data\n"); goto bad1; } device_printf(sc->sc_dev, "eeprom data @ %p\n", (void *) rman_get_bushandle(psc->sc_eeprom)); /* XXX why doesn't this work? -adrian */ #if 0 bus_space_read_multi_1( rman_get_bustag(psc->sc_eeprom), rman_get_bushandle(psc->sc_eeprom), 0, (u_int8_t *) sc->sc_eepromdata, ATH_EEPROM_DATA_SIZE * 2); #endif p = (void *) rman_get_bushandle(psc->sc_eeprom); memcpy(sc->sc_eepromdata, p, ATH_EEPROM_DATA_SIZE * 2); /* * Arrange interrupt line. */ rid = 0; psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_SHAREABLE|RF_ACTIVE); if (psc->sc_irq == NULL) { device_printf(dev, "could not map interrupt\n"); goto bad1; } if (bus_setup_intr(dev, psc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, NULL, ath_intr, sc, &psc->sc_ih)) { device_printf(dev, "could not establish interrupt\n"); goto bad2; } /* * Setup DMA descriptor area. */ if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 1, 0, /* alignment, bounds */ BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ BUS_SPACE_MAXADDR, /* highaddr */ NULL, NULL, /* filter, filterarg */ 0x3ffff, /* maxsize XXX */ ATH_MAX_SCATTER, /* nsegments */ 0x3ffff, /* maxsegsize XXX */ BUS_DMA_ALLOCNOW, /* flags */ NULL, /* lockfunc */ NULL, /* lockarg */ &sc->sc_dmat)) { device_printf(dev, "cannot allocate DMA tag\n"); goto bad3; } ATH_LOCK_INIT(sc); error = ath_attach(AR9130_DEVID, sc); if (error == 0) /* success */ return 0; ATH_LOCK_DESTROY(sc); bus_dma_tag_destroy(sc->sc_dmat); bad3: bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); bad2: bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); bad1: bus_release_resource(dev, SYS_RES_MEMORY, 0, psc->sc_eeprom); bad0: bus_release_resource(dev, SYS_RES_MEMORY, 0, psc->sc_sr); bad: /* XXX?! */ if (sc->sc_eepromdata) free(sc->sc_eepromdata, M_TEMP); return (error); }
static int ath_pci_attach(device_t dev) { struct ath_pci_softc *psc = device_get_softc(dev); struct ath_softc *sc = &psc->sc_sc; int error = ENXIO; int rid; sc->sc_dev = dev; /* * Enable bus mastering. */ pci_enable_busmaster(dev); /* * Disable retry timeout to keep PCI Tx retries from * interfering with C3 CPU state. */ pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); /* * Setup memory-mapping of PCI registers. */ rid = BS_BAR; psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (psc->sc_sr == NULL) { device_printf(dev, "cannot map register space\n"); goto bad; } /* XXX uintptr_t is a bandaid for ia64; to be fixed */ sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr); sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); /* * Mark device invalid so any interrupts (shared or otherwise) * that arrive before the HAL is setup are discarded. */ sc->sc_invalid = 1; /* * Arrange interrupt line. */ rid = 0; psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_SHAREABLE|RF_ACTIVE); if (psc->sc_irq == NULL) { device_printf(dev, "could not map interrupt\n"); goto bad1; } if (bus_setup_intr(dev, psc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, NULL, ath_intr, sc, &psc->sc_ih)) { device_printf(dev, "could not establish interrupt\n"); goto bad2; } /* * Setup DMA descriptor area. */ if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 1, 0, /* alignment, bounds */ BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ BUS_SPACE_MAXADDR, /* highaddr */ NULL, NULL, /* filter, filterarg */ 0x3ffff, /* maxsize XXX */ ATH_MAX_SCATTER, /* nsegments */ 0x3ffff, /* maxsegsize XXX */ BUS_DMA_ALLOCNOW, /* flags */ NULL, /* lockfunc */ NULL, /* lockarg */ &sc->sc_dmat)) { device_printf(dev, "cannot allocate DMA tag\n"); goto bad3; } ATH_LOCK_INIT(sc); error = ath_attach(pci_get_device(dev), sc); if (error == 0) /* success */ return 0; ATH_LOCK_DESTROY(sc); bus_dma_tag_destroy(sc->sc_dmat); bad3: bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); bad2: bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); bad1: bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); bad: return (error); }
static int init_ath_wmac(u_int16_t devid, u_int16_t wlanNum, struct ar531x_config *config) { const char *athname; struct net_device *dev; struct ath_ahb_softc *sc; u16 *radio_data; if (((wlanNum != 0) && (wlanNum != 1)) || (sclist[wlanNum] != NULL)) goto bad; ahb_enable_wmac(devid, wlanNum); dev = alloc_netdev(sizeof(struct ath_ahb_softc), "wifi%d", ether_setup); if (dev == NULL) { printk(KERN_ERR "%s: no memory for device state\n", dev_info); goto bad2; } sc = netdev_priv(dev); sc->aps_sc.sc_dev = dev; /* * Mark the device as detached to avoid processing * interrupts until setup is complete. */ sc->aps_sc.sc_invalid = 1; SET_MODULE_OWNER(dev); sclist[wlanNum] = sc; if (dev_alloc_name(dev, dev->name) < 0) { printk(KERN_ERR "%s: cannot allocate name\n", dev_info); goto bad3; } switch (wlanNum) { case AR531X_WLAN0_NUM: if (((devid & AR5315_REV_MAJ_M) == AR5315_REV_MAJ) || ((devid & AR5315_REV_MAJ_M) == AR5317_REV_MAJ)) { dev->irq = AR5315_IRQ_WLAN0_INTRS; dev->mem_start = AR5315_WLAN0; } else { dev->irq = AR531X_IRQ_WLAN0_INTRS; dev->mem_start = AR531X_WLAN0; } break; case AR531X_WLAN1_NUM: dev->irq = AR531X_IRQ_WLAN1_INTRS; dev->mem_start = KSEG1ADDR(AR531X_WLAN1); break; default: goto bad3; } dev->mem_end = dev->mem_start + AR531X_WLANX_LEN; sc->aps_sc.sc_iobase = (void __iomem *)dev->mem_start; sc->aps_sc.sc_bdev = NULL; if (request_irq(dev->irq, ath_intr, IRQF_SHARED, dev->name, dev)) { printk(KERN_WARNING "%s: %s: request_irq failed\n", dev_info, dev->name); goto bad3; } if (ath_attach(devid, dev, config) != 0) goto bad4; athname = ath_hal_probe(ATHEROS_VENDOR_ID, devid); printk(KERN_INFO "%s: %s: %s: mem=0x%lx, irq=%d\n", dev_info, dev->name, athname ? athname : "Atheros ???", dev->mem_start, dev->irq); num_activesc++; /* Ready to process interrupts */ sc->aps_sc.sc_softled = 1; /* SoftLED over GPIO */ sc->aps_sc.sc_ledpin = config->board->sysLedGpio; sc->aps_sc.sc_invalid = 0; ahb_hw_detect(sc, config->radio); return 0; bad4: free_irq(dev->irq, dev); bad3: free_netdev(dev); sclist[wlanNum] = NULL; bad2: ahb_disable_wmac(devid, wlanNum); bad: return -ENODEV; }
static int ath_pci_attach(device_t dev) { struct ath_pci_softc *psc = device_get_softc(dev); struct ath_softc *sc = &psc->sc_sc; int error = ENXIO; int rid; #ifdef ATH_EEPROM_FIRMWARE const struct firmware *fw = NULL; const char *buf; #endif const struct pci_device_id *pd; sc->sc_dev = dev; /* Do this lookup anyway; figure out what to do with it later */ pd = ath_pci_probe_device(dev, ath_pci_id_table, nitems(ath_pci_id_table)); if (pd) sc->sc_pci_devinfo = pd->driver_data; /* * Enable bus mastering. */ pci_enable_busmaster(dev); /* * Setup other PCI bus configuration parameters. */ ath_pci_setup(dev); /* * Setup memory-mapping of PCI registers. */ rid = BS_BAR; psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (psc->sc_sr == NULL) { device_printf(dev, "cannot map register space\n"); goto bad; } sc->sc_st = (HAL_BUS_TAG) rman_get_bustag(psc->sc_sr); sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); /* * Mark device invalid so any interrupts (shared or otherwise) * that arrive before the HAL is setup are discarded. */ sc->sc_invalid = 1; ATH_LOCK_INIT(sc); ATH_PCU_LOCK_INIT(sc); ATH_RX_LOCK_INIT(sc); ATH_TX_LOCK_INIT(sc); ATH_TXSTATUS_LOCK_INIT(sc); /* * Arrange interrupt line. */ rid = 0; psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_SHAREABLE|RF_ACTIVE); if (psc->sc_irq == NULL) { device_printf(dev, "could not map interrupt\n"); goto bad1; } if (bus_setup_intr(dev, psc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, NULL, ath_intr, sc, &psc->sc_ih)) { device_printf(dev, "could not establish interrupt\n"); goto bad2; } /* * Setup DMA descriptor area. */ if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 1, 0, /* alignment, bounds */ BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ BUS_SPACE_MAXADDR, /* highaddr */ NULL, NULL, /* filter, filterarg */ 0x3ffff, /* maxsize XXX */ ATH_MAX_SCATTER, /* nsegments */ 0x3ffff, /* maxsegsize XXX */ BUS_DMA_ALLOCNOW, /* flags */ NULL, /* lockfunc */ NULL, /* lockarg */ &sc->sc_dmat)) { device_printf(dev, "cannot allocate DMA tag\n"); goto bad3; } #ifdef ATH_EEPROM_FIRMWARE /* * If there's an EEPROM firmware image, load that in. */ if (resource_string_value(device_get_name(dev), device_get_unit(dev), "eeprom_firmware", &buf) == 0) { if (bootverbose) device_printf(dev, "%s: looking up firmware @ '%s'\n", __func__, buf); fw = firmware_get(buf); if (fw == NULL) { device_printf(dev, "%s: couldn't find firmware\n", __func__); goto bad4; } device_printf(dev, "%s: EEPROM firmware @ %p\n", __func__, fw->data); sc->sc_eepromdata = malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO); if (! sc->sc_eepromdata) { device_printf(dev, "%s: can't malloc eepromdata\n", __func__); goto bad4; } memcpy(sc->sc_eepromdata, fw->data, fw->datasize); firmware_put(fw, 0); } #endif /* ATH_EEPROM_FIRMWARE */ error = ath_attach(pci_get_device(dev), sc); if (error == 0) /* success */ return 0; #ifdef ATH_EEPROM_FIRMWARE bad4: #endif bus_dma_tag_destroy(sc->sc_dmat); bad3: bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); bad2: bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); bad1: bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); ATH_TXSTATUS_LOCK_DESTROY(sc); ATH_PCU_LOCK_DESTROY(sc); ATH_RX_LOCK_DESTROY(sc); ATH_TX_LOCK_DESTROY(sc); ATH_LOCK_DESTROY(sc); bad: return (error); }
void ath_pci_attach(struct device *parent, struct device *self, void *aux) { struct ath_pci_softc *psc = (struct ath_pci_softc *)self; struct ath_softc *sc = &psc->sc_sc; struct pci_attach_args *pa = aux; pci_chipset_tag_t pc = pa->pa_pc; pcitag_t pt = pa->pa_tag; pci_intr_handle_t ih; pcireg_t mem_type; const char *intrstr = NULL; psc->sc_pc = pc; psc->sc_pcitag = pt; /* * Setup memory-mapping of PCI registers. */ mem_type = pci_mapreg_type(pc, pa->pa_tag, ATH_BAR0); if (mem_type != PCI_MAPREG_TYPE_MEM && mem_type != PCI_MAPREG_MEM_TYPE_64BIT) { printf(": bad PCI register type %d\n", (int)mem_type); goto fail; } if (pci_mapreg_map(pa, ATH_BAR0, mem_type, 0, &sc->sc_st, &sc->sc_sh, NULL, &sc->sc_ss, 0)) { printf(": can't map register space\n"); goto fail; } /* * PCI Express check. */ if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS, NULL, NULL) != 0) sc->sc_pcie = 1; sc->sc_invalid = 1; /* * Arrange interrupt line. */ if (pci_intr_map(pa, &ih)) { printf(": can't map interrupt\n"); goto unmap; } intrstr = pci_intr_string(pc, ih); psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ath_intr, sc, sc->sc_dev.dv_xname); if (psc->sc_ih == NULL) { printf(": can't map interrupt\n"); goto unmap; } printf(": %s\n", intrstr); sc->sc_dmat = pa->pa_dmat; if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) == 0) return; pci_intr_disestablish(pc, psc->sc_ih); unmap: bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_ss); fail: return; }
static int ath_ahb_attach(device_t dev) { struct ath_ahb_softc *psc = device_get_softc(dev); struct ath_softc *sc = &psc->sc_sc; int error = ENXIO; int rid; long eepromaddr; int eepromsize; uint8_t *p; int device_id, vendor_id; sc->sc_dev = dev; rid = 0; psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (psc->sc_sr == NULL) { device_printf(dev, "cannot map register space\n"); goto bad; } if (resource_long_value(device_get_name(dev), device_get_unit(dev), "eepromaddr", &eepromaddr) != 0) { device_printf(dev, "cannot fetch 'eepromaddr' from hints\n"); goto bad0; } /* * The default EEPROM size is 2048 * 16 bit words. * Later EEPROM/OTP/flash regions may be quite a bit bigger. */ if (resource_int_value(device_get_name(dev), device_get_unit(dev), "eepromsize", &eepromsize) != 0) { eepromsize = ATH_EEPROM_DATA_SIZE * 2; } rid = 0; device_printf(sc->sc_dev, "eeprom @ %p (%d bytes)\n", (void *) eepromaddr, eepromsize); /* * XXX this assumes that the parent device is the nexus * and will just pass through requests for all of memory. * * Later on, when this has to attach off of the actual * AHB, this won't work. * * Ideally this would be done in machdep code in mips/atheros/ * and it'd expose the EEPROM via the firmware interface, * so the ath/ath_ahb drivers can be loaded as modules * after boot-time. */ psc->sc_eeprom = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, (uintptr_t) eepromaddr, (uintptr_t) eepromaddr + (uintptr_t) (eepromsize - 1), 0, RF_ACTIVE); if (psc->sc_eeprom == NULL) { device_printf(dev, "cannot map eeprom space\n"); goto bad0; } sc->sc_st = (HAL_BUS_TAG) rman_get_bustag(psc->sc_sr); sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); /* * Mark device invalid so any interrupts (shared or otherwise) * that arrive before the HAL is setup are discarded. */ sc->sc_invalid = 1; /* Copy the EEPROM data out */ sc->sc_eepromdata = malloc(eepromsize, M_TEMP, M_NOWAIT | M_ZERO); if (sc->sc_eepromdata == NULL) { device_printf(dev, "cannot allocate memory for eeprom data\n"); goto bad1; } device_printf(sc->sc_dev, "eeprom data @ %p\n", (void *) rman_get_bushandle(psc->sc_eeprom)); /* XXX why doesn't this work? -adrian */ #if 0 bus_space_read_multi_1( rman_get_bustag(psc->sc_eeprom), rman_get_bushandle(psc->sc_eeprom), 0, (u_int8_t *) sc->sc_eepromdata, eepromsize); #endif p = (void *) rman_get_bushandle(psc->sc_eeprom); memcpy(sc->sc_eepromdata, p, eepromsize); /* * Arrange interrupt line. */ rid = 0; psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_SHAREABLE|RF_ACTIVE); if (psc->sc_irq == NULL) { device_printf(dev, "could not map interrupt\n"); goto bad1; } if (bus_setup_intr(dev, psc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, NULL, ath_ahb_intr, sc, &psc->sc_ih)) { device_printf(dev, "could not establish interrupt\n"); goto bad2; } /* * Setup DMA descriptor area. */ if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 1, 0, /* alignment, bounds */ BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ BUS_SPACE_MAXADDR, /* highaddr */ NULL, NULL, /* filter, filterarg */ 0x3ffff, /* maxsize XXX */ ATH_MAX_SCATTER, /* nsegments */ 0x3ffff, /* maxsegsize XXX */ BUS_DMA_ALLOCNOW, /* flags */ NULL, /* lockfunc */ NULL, /* lockarg */ &sc->sc_dmat)) { device_printf(dev, "cannot allocate DMA tag\n"); goto bad3; } /* * Check if a device/vendor ID is provided in hints. */ if (resource_int_value(device_get_name(dev), device_get_unit(dev), "vendor_id", &vendor_id) != 0) { vendor_id = VENDOR_ATHEROS; } if (resource_int_value(device_get_name(dev), device_get_unit(dev), "device_id", &device_id) != 0) { device_id = AR9130_DEVID; } ATH_LOCK_INIT(sc); ATH_PCU_LOCK_INIT(sc); ATH_RX_LOCK_INIT(sc); ATH_TX_LOCK_INIT(sc); ATH_TX_IC_LOCK_INIT(sc); ATH_TXSTATUS_LOCK_INIT(sc); error = ath_attach(device_id, sc); if (error == 0) /* success */ return 0; ATH_TXSTATUS_LOCK_DESTROY(sc); ATH_RX_LOCK_DESTROY(sc); ATH_TX_LOCK_DESTROY(sc); ATH_TX_IC_LOCK_DESTROY(sc); ATH_PCU_LOCK_DESTROY(sc); ATH_LOCK_DESTROY(sc); bus_dma_tag_destroy(sc->sc_dmat); bad3: bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); bad2: bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); bad1: bus_release_resource(dev, SYS_RES_MEMORY, 0, psc->sc_eeprom); bad0: bus_release_resource(dev, SYS_RES_MEMORY, 0, psc->sc_sr); bad: /* XXX?! */ if (sc->sc_eepromdata) free(sc->sc_eepromdata, M_TEMP); return (error); }