int
main(int argc, char *argv[])
{
struct ath_diag atd;
const char *ifname;
u_int32_t *data;
u_int32_t *dp, *ep;
int what, c, s, i;
s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0)
err(1, "socket");
ifname = getenv("ATH");
if (!ifname)
ifname = ATH_DEFAULT;
what = 0;
state.show_addrs = 0;
state.show_names = 1;
while ((c = getopt(argc, argv, "i:aAbdkmNqxz")) != -1)
switch (c) {
case 'a':
what |= DUMP_ALL;
break;
case 'A':
state.show_addrs = 1;
break;
case 'b':
what |= DUMP_BASEBAND;
break;
case 'd':
what |= DUMP_DCU;
break;
case 'k':
what |= DUMP_KEYCACHE;
break;
case 'i':
ifname = optarg;
break;
case 'm':
what |= DUMP_BASIC;
break;
case 'N':
state.show_names = 0;
break;
case 'q':
what |= DUMP_QCU;
break;
case 'x':
what |= DUMP_XR;
break;
case 'z':
what |= DUMP_INTERRUPT;
break;
default:
usage();
/*NOTREACHED*/
}
strncpy(atd.ad_name, ifname, sizeof (atd.ad_name));
argc -= optind;
argv += optind;
if (what == 0)
what = DUMP_BASIC;
atd.ad_id = HAL_DIAG_REVS;
atd.ad_out_data = (caddr_t) &state.revs;
atd.ad_out_size = sizeof(state.revs);
if (ioctl(s, SIOCGATHDIAG, &atd) < 0)
err(1, atd.ad_name);
if (ath_hal_setupregs(&atd, what) == 0)
errx(-1, "no registers are known for this part "
"(devid 0x%x mac %d.%d phy %d)", state.revs.ah_devid,
state.revs.ah_macVersion, state.revs.ah_macRev,
state.revs.ah_phyRev);
atd.ad_out_size = ath_hal_setupdiagregs((HAL_REGRANGE *) atd.ad_in_data,
atd.ad_in_size / sizeof(HAL_REGRANGE));
atd.ad_out_data = (caddr_t) malloc(atd.ad_out_size);
if (atd.ad_out_data == NULL) {
fprintf(stderr, "Cannot malloc output buffer, size %u\n",
atd.ad_out_size);
exit(-1);
}
atd.ad_id = HAL_DIAG_REGS | ATH_DIAG_IN | ATH_DIAG_DYN;
if (ioctl(s, SIOCGATHDIAG, &atd) < 0)
err(1, atd.ad_name);
/*
* Expand register data into global space that can be
* indexed directly by register offset.
*/
dp = (u_int32_t *)atd.ad_out_data;
ep = (u_int32_t *)(atd.ad_out_data + atd.ad_out_size);
while (dp < ep) {
u_int r = dp[0] >> 16; /* start of range */
u_int e = dp[0] & 0xffff; /* end of range */
dp++;
/* convert offsets to indices */
r >>= 2; e >>= 2;
do {
if (dp >= ep) {
fprintf(stderr, "Warning, botched return data;"
"register at offset 0x%x not present\n",
r << 2);
break;
}
state.regdata[r++] = *dp++;
} while (r <= e);
}
if (what & DUMP_BASIC)
ath_hal_dumpregs(stdout, DUMP_BASIC);
if ((what & DUMP_INTERRUPT) && ath_hal_anyregs(DUMP_INTERRUPT)) {
if (what & DUMP_BASIC)
putchar('\n');
if (state.show_addrs)
ath_hal_dumpregs(stdout, DUMP_INTERRUPT);
else
ath_hal_dumpint(stdout, what);
}
if ((what & DUMP_QCU) && ath_hal_anyregs(DUMP_QCU)) {
if (what & (DUMP_BASIC|DUMP_INTERRUPT))
putchar('\n');
if (state.show_addrs)
ath_hal_dumpregs(stdout, DUMP_QCU);
else
ath_hal_dumpqcu(stdout, what);
}
if ((what & DUMP_DCU) && ath_hal_anyregs(DUMP_DCU)) {
if (what & (DUMP_BASIC|DUMP_INTERRUPT|DUMP_QCU))
putchar('\n');
if (state.show_addrs)
ath_hal_dumpregs(stdout, DUMP_DCU);
else
ath_hal_dumpdcu(stdout, what);
}
if (what & DUMP_KEYCACHE) {
if (state.show_addrs) {
if (what & (DUMP_BASIC|DUMP_INTERRUPT|DUMP_QCU|DUMP_DCU))
putchar('\n');
ath_hal_dumpregs(stdout, DUMP_KEYCACHE);
} else
ath_hal_dumpkeycache(stdout, 128);
}
if (what & DUMP_BASEBAND) {
if (what &~ DUMP_BASEBAND)
fprintf(stdout, "\n");
ath_hal_dumpbb(stdout, what);
}
return 0;
}
int
main(int argc, char *argv[])
{
HAL_REVS revs;
u_int32_t *data;
u_int32_t *dp, *ep;
int what, c;
s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0)
err(1, "socket");
strncpy(atd.ad_name, ATH_DEFAULT, sizeof (atd.ad_name));
what = 0;
while ((c = getopt(argc, argv, "I:abdgkilpqx")) != -1)
switch (c) {
case 'a':
what |= DUMP_ALL;
break;
case 'b':
what |= DUMP_BASEBAND;
break;
case 'd':
what |= DUMP_DCU;
break;
case 'k':
what |= DUMP_KEYCACHE;
break;
case 'i':
what |= DUMP_INTERRUPT;
break;
case 'I':
strncpy(atd.ad_name, optarg, sizeof (atd.ad_name));
break;
case 'p':
what |= DUMP_PUBLIC;
break;
case 'q':
what |= DUMP_QCU;
break;
case 'x':
what |= DUMP_XR;
break;
case 'l':
what |= DUMP_LA;
break;
case 'g':
what |= DUMP_DMADBG;
break;
default:
usage();
/*NOTREACHED*/
}
argc -= optind;
argv += optind;
if (what == 0)
what = DUMP_BASIC;
atd.ad_id = HAL_DIAG_REVS;
atd.ad_out_data = (caddr_t) &revs;
atd.ad_out_size = sizeof(revs);
if (ioctl(s, SIOCGATHDIAG, &atd) < 0)
err(1, atd.ad_name);
switch (revs.ah_devid) {
case AR5212_FPGA:
case AR5212_DEVID:
case AR5212_DEVID_IBM:
case AR5212_DEFAULT:
ar5212SetupRegs(&atd, what);
break;
case AR5416_DEVID_PCI:
case AR5416_DEVID_PCIE:
case AR5416_DEVID_AR9160_PCI:
case AR5416_DEVID_AR9280_PCI:
case AR5416_DEVID_AR9280_PCIE:
case AR5416_DEVID_AR9285_PCIE:
ar5416SetupRegs(&atd, what);
break;
case AR9300_DEVID_AR9380_PCIE:
case AR9300_DEVID_AR9580_PCIE:
case AR9300_DEVID_AR9580_CIGSB24G_PCIE:
case AR9300_DEVID_AR9580_CIGSB5G_PCIE:
case AR9300_DEVID_AR9340:
ar9300SetupRegs(&atd, what);
break;
}
atd.ad_out_size = ath_hal_setupdiagregs((HAL_REGRANGE *) atd.ad_in_data,
atd.ad_in_size / sizeof(HAL_REGRANGE));
atd.ad_out_data = (caddr_t) malloc(atd.ad_out_size);
if (atd.ad_out_data == NULL) {
fprintf(stderr, "Cannot malloc output buffer, size %u\n",
atd.ad_out_size);
exit(-1);
}
atd.ad_id = HAL_DIAG_REGS | ATH_DIAG_IN | ATH_DIAG_DYN;
if (ioctl(s, SIOCGATHDIAG, &atd) < 0)
err(1, atd.ad_name);
/*
* Expand register data into global space that can be
* indexed directly by register offset.
*/
dp = (u_int32_t *)atd.ad_out_data;
ep = (u_int32_t *)(atd.ad_out_data + atd.ad_out_size);
while (dp < ep) {
u_int r = dp[0] >> 16; /* start of range */
u_int e = dp[0] & 0xffff; /* end of range */
dp++;
/* convert offsets to indices */
r >>= 2; e >>= 2;
do {
if (dp >= ep) {
fprintf(stderr, "Warning, botched return data;"
"register at offset 0x%x not present\n",
r << 2);
break;
}
regdata[r++] = *dp++;
} while (r <= e);
}
switch (revs.ah_devid) {
case AR5212_FPGA:
case AR5212_DEVID:
case AR5212_DEVID_IBM:
case AR5212_DEFAULT:
ar5212DumpRegs(stdout, what);
break;
case AR5416_DEVID_PCI:
case AR5416_DEVID_PCIE:
case AR5416_DEVID_AR9160_PCI:
case AR5416_DEVID_AR9280_PCI:
case AR5416_DEVID_AR9280_PCIE:
case AR5416_DEVID_AR9285_PCIE:
ar5416DumpRegs(stdout, what);
break;
case AR9300_DEVID_AR9380_PCIE:
case AR9300_DEVID_AR9580_PCIE:
case AR9300_DEVID_AR9580_CIGSB24G_PCIE:
case AR9300_DEVID_AR9580_CIGSB5G_PCIE:
case AR9300_DEVID_AR9340:
ar9300DumpRegs(stdout, what);
break;
}
return 0;
}
