// ============================================================================
// fAddTargetBankChecksum()
// Reads and adds the target bank checksum to the referenced accumulator.
// Returns:
// 0 if successful
// VERIFY_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fAccTargetBankChecksum(unsigned int* pAcc)
{
unsigned int wCheckSumData=0;
SendVector(checksum_v, num_bits_checksum);
fIsError = fDetectHiLoTransition();
if (fIsError )
{
return(CHECKSUM_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
//SendVector(tsync_enable, num_bits_tsync_enable);
//Send Read Checksum vector and get Target Checksum
SendVector(read_checksum_v, 11); // first 11-bits is ReadCKSum-MSB
RunClock(2); // Two SCLKs between write & read
bTargetDataIN = bReceiveByte();
wCheckSumData = ((unsigned int)(bTargetDataIN))<<8;
RunClock(1); // See Fig. 6
SendVector(read_checksum_v + 2, 12); // 12 bits starting from 3rd character
RunClock(2); // Read-LSB Command
bTargetDataIN = bReceiveByte();
wCheckSumData |= (unsigned int) bTargetDataIN;
RunClock(1);
SendVector(read_checksum_v + 4, 1); // Send the final bit of the command
//SendVector(tsync_disable, num_bits_tsync_disable);
*pAcc = wCheckSumData;
return(PASS);
}
/* ============================================================================
// fReadStatus()
// Returns:
// 0 if successful
// _____ if timed out on handshake to the device.
============================================================================*/
signed char fReadStatus(void)
{
SendVector(tsync_enable, num_bits_tsync_enable);
/* Send Read ID vector and get Target ID */
SendVector(read_id_v, 11); /* Read-MSB Vector is the first 11-Bits */
RunClock(2); /* Two SCLK cycles between write & read */
bTargetStatus[0] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+2, 12); /* 12 bits starting from the 3rd character */
RunClock(2); /* Read-LSB Command */
bTargetStatus[1] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+4, 1); /* 1 bit starting from the 5th character */
SendVector(tsync_disable, num_bits_tsync_disable);
if (bTargetStatus[0] == target_status00_v)
return PASS; /*PTJ: Status = 00 means Success, the SROM function did what it was supposed to */
if (bTargetStatus[0] == target_status01_v)
return STATUS_ERROR; /*PTJ: Status = 01 means that function is not allowed because of block level protection, for test with verify_setup (VERIFY-SETUP) */
if (bTargetStatus[0] == target_status03_v)
return STATUS_ERROR; /* PTJ: Status = 03 is fatal error, SROM halted*/
if (bTargetStatus[0] == target_status04_v)
return STATUS_ERROR; /*PTJ: Status = 04 means there was a checksum faliure with either the smart write code checksum, or the smart write paramters checksum, for test with PROGRAM-AND-VERIFY */
if (bTargetStatus[0] == target_status06_v)
return STATUS_ERROR; /* PTJ: Status = 06 means that Calibrate1 failed, for test with id_setup_1 (ID-SETUP-1) */
else
return STATUS_ERROR;
}
signed char fAccTargetBankChecksum(unsigned int *pAcc)
{
unsigned int wCheckSumData = 0;
SendVector(checksum_v, num_bits_checksum);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return CHECKSUM_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_checksum_v, 11); /*first 11-bits is ReadCKSum-MSB*/
RunClock(2); /*Two SCLKs between write & read*/
bTargetDataIN = bReceiveByte();
wCheckSumData = bTargetDataIN<<8;
RunClock(1);
/*12 bits starting from 3rd character*/
SendVector(read_checksum_v + 2, 12);
RunClock(2); /* Read-LSB Command*/
bTargetDataIN = bReceiveByte();
wCheckSumData |= (bTargetDataIN & 0xFF);
RunClock(1);
/*Send the final bit of the command */
SendVector(read_checksum_v + 3, 1);
/* Send the final bit of the command
PTJ: read_checksum_v may have to change if TSYNC needs to be enabled*/
SendVector(tsync_disable, num_bits_tsync_disable);
*pAcc = wCheckSumData;
return PASS;
}
// ============================================================================
// fAddTargetBankChecksum()
// Reads and adds the target bank checksum to the referenced accumulator.
// Returns:
// 0 if successful
// VERIFY_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fAccTargetBankChecksum(unsigned int *pAcc)
{
unsigned int wCheckSumData;
SendVector(checksum_setup, num_bits_checksum_setup); //PTJ:CHECKSUM-SETUP, it is taking 100ms > time > 200ms to complete the checksum
if ((fIsError = fDetectHiLoTransition())) { //100ms is default
return (VERIFY_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
//Send Read Checksum vector and get Target Checksum
SendVector(read_checksum_v, 11); // first 11-bits is ReadCKSum-MSB
RunClock(2); // Two SCLKs between write & read
bTargetDataIN = bReceiveByte();
wCheckSumData = bTargetDataIN << 8;
RunClock(1); // See Fig. 6
SendVector(read_checksum_v + 2, 12); // 12 bits starting from 3rd character
RunClock(2); // Read-LSB Command
bTargetDataIN = bReceiveByte();
wCheckSumData |= (bTargetDataIN & 0xFF);
RunClock(1);
SendVector(read_checksum_v + 3, 1); // Send the final bit of the command //PTJ: read_checksum_v may have to change if TSYNC needs to be enabled
SendVector(tsync_disable, num_bits_tsync_disable);
*pAcc = wCheckSumData;
return (PASS);
}
/* ============================================================================
// fAddTargetBankChecksum()
// Reads and adds the target bank checksum to the referenced accumulator.
// Returns:
// 0 if successful
// VERIFY_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fAccTargetBankChecksum(unsigned int *pAcc)
{
unsigned char bMSB = 0;
unsigned char bLSB = 0;
SendVector(checksum_setup, num_bits_checksum_setup);
/* PTJ:CHECKSUM-SETUP, it is taking 100ms > time > 200ms to complete the checksum */
fIsError = fDetectHiLoTransition();
if (fIsError) /* 100ms is default */
return VERIFY_ERROR;
mdelay(150);
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
/* Send Read Checksum vector and get Target Checksum */
SendVector(read_checksum_v, 11); /* first 11-bits is ReadCKSum-MSB */
RunClock(2); /* Two SCLKs between write & read */
bMSB = bReceiveByte();
RunClock(1); /* See Fig. 6 */
SendVector(read_checksum_v + 2, 12); /* 12 bits starting from 3rd character */
RunClock(2); /* Read-LSB Command */
bLSB = bReceiveByte();
RunClock(1);
SendVector(read_checksum_v + 3, 1); /* Send the final bit of the command */
SendVector(tsync_disable, num_bits_tsync_disable);
*pAcc = (bMSB << 8) | bLSB; /* combine the MSB and the LSB */
return PASS;
}
// ============================================================================
// fVerifySiliconID()
// Returns:
// 0 if successful
// Si_ID_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fVerifySiliconID(void)
{
SendVector(id_setup_2, num_bits_id_setup_2);
if (fIsError = fDetectHiLoTransition())
{
return(SiID_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
//Send Read ID vector and get Target ID
SendVector(read_id_v, 11); // Read-MSB Vector is the first 11-Bits
RunClock(2); // Two SCLK cycles between write & read
bTargetID[0] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+2, 12); // 1+11 bits starting from the 3rd byte
RunClock(2); // Read-LSB Command
bTargetID[1] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+4, 1); // 1 bit starting from the 5th byte
//read Revision ID from Accumulator A and Accumulator X
//SendVector(read_id_v+5, 11); //11 bits starting from the 6th byte
//RunClock(2);
//bTargetID[2] = bReceiveByte(); //Read from Acc.X
//RunClock(1);
//SendVector(read_id_v+7, 12); //1+11 bits starting from the 8th byte
//
//RunClock(2);
//bTargetID[3] = bReceiveByte(); //Read from Acc.A
//
//RunClock(1);
//SendVector(read_id_v+4, 1); //1 bit starting from the 5th byte,
SendVector(tsync_disable, num_bits_tsync_disable);
printk(KERN_ERR "[CYPRESS] Silicon ID : %x %x\n", bTargetID[0], bTargetID[1]);
if (!(bTargetID[0] == target_id_v[0] || bTargetID[0] == target_id_v_2[0]) //etinum
|| !(bTargetID[1] == target_id_v[1] || bTargetID[1] == target_id_v_2[1]) //etinum
)
{
#if 1
return(PASS);
#else
return(SiID_ERROR);
#endif
}
else
{
return(PASS);
}
}
/* ============================================================================
// fVerifySiliconID()
// Returns:
// 0 if successful
// Si_ID_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fVerifySiliconID(void)
{
SendVector(id_setup_2, num_bits_id_setup_2);
fIsError = fDetectHiLoTransition();
if (fIsError)
return SiID_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
/* Send Read ID vector and get Target ID */
SendVector(read_id_v, 11); /* Read-MSB Vector is the first 11-Bits */
RunClock(2); /* Two SCLK cycles between write & read */
bTargetID[0] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+2, 12); /* 1+11 bits starting from the 3rd byte */
RunClock(2); /* Read-LSB Command */
bTargetID[1] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+4, 1); /* 1 bit starting from the 5th byte */
/* read Revision ID from Accumulator A and Accumulator X */
SendVector(read_id_v+5, 11); /* 11 bits starting from the 6th byte */
RunClock(2);
bTargetID[2] = bReceiveByte(); /* Read from Acc.X */
RunClock(1);
SendVector(read_id_v+7, 12); /* 1+11 bits starting from the 8th byte */
RunClock(2);
bTargetID[3] = bReceiveByte(); /* Read from Acc.A */
RunClock(1);
SendVector(read_id_v+4, 1); /*1 bit starting from the 5th byte, */
SendVector(tsync_disable, num_bits_tsync_disable);
pr_info("%s: bTargetID[0] = %x, bTargetID[1] = %x\n", __func__, bTargetID[0], bTargetID[1]);
if (bTargetID[0] == target_id_v_1[0] || bTargetID[1] == target_id_v_1[1])
return PASS;
else if (bTargetID[0] == target_id_v_2[0] || bTargetID[1] == target_id_v_2[1])
return PASS;
else
return SiID_ERROR;
}
/* PTJ: =======================================================================
// fReadCalRegisters()
// PTJ: use this to read some cal registers that should be loaded by
Calibrate1 in id_setup_1
// Returns:
// 0 if successful
// _____ if timed out on handshake to the device.
// ==========================================================================*/
signed char fReadCalRegisters(void)
{
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(Switch_Bank1, 22);
SendVector(read_IMOtrim, 11);/* Read-MSB Vector is the first 11-Bits*/
RunClock(2);/* Two SCLK cycles between write & read*/
bTargetStatus[0] = bReceiveByte();
RunClock(1);
/*Set SDATA to Strong Drive here because SendByte() does not*/
SetSDATAStrong();
SendByte(read_reg_end, 1);
SendVector(read_SPCtrim, 11);/* Read-MSB Vector is the first 11-Bits*/
RunClock(2);/* Two SCLK cycles between write & read*/
bTargetStatus[1] = bReceiveByte();
RunClock(1);
/* Set SDATA to Strong Drive here because SendByte() does not*/
SetSDATAStrong();
SendByte(read_reg_end, 1);
SendVector(read_VBGfinetrim, 11);/* Read-MSB Vector is the first
11-Bits*/
RunClock(2);/* Two SCLK cycles between write & read*/
bTargetStatus[2] = bReceiveByte();
RunClock(1);
/*Set SDATA to Strong Drive here because SendByte() does not*/
SetSDATAStrong();
SendByte(read_reg_end, 1);
SendVector(Switch_Bank0, 22);
SendVector(tsync_disable, num_bits_tsync_disable);
if (bTargetStatus[0] == target_status00_v) {
return PASS;
/*PTJ: Status = 00 means Success, the SROM function
did what it was supposed to*/
}
return PASS;
}
signed char fAccTargetBankChecksum(unsigned int *pAcc)
{
unsigned int wCheckSumData = 0;
SendVector(checksum_v, num_bits_checksum);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return CHECKSUM_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/*Send Read Checksum vector and get Target Checksum*/
SendVector(read_checksum_v, 11); /*first 11-bits is ReadCKSum-MSB*/
RunClock(2); /*Two SCLKs between write & read*/
bTargetDataIN = bReceiveByte();
RunClock(1);
wCheckSumData = ((unsigned int) bTargetDataIN)<<8;
/*12 bits starting from 3rd character*/
SendVector(read_checksum_v + 2, 12);
RunClock(2); /* Read-LSB Command*/
bTargetDataIN = bReceiveByte();
RunClock(1);
/*Send the final bit of the command */
SendVector(read_checksum_v + 4, 1);
wCheckSumData |= (unsigned int) bTargetDataIN;
*pAcc = wCheckSumData;
return PASS;
}
// ============================================================================
// fVerifyTargetBlock()
// Verify the block just written to. This can be done byte-by-byte before the
// protection bits are set.
// Returns:
// 0 if successful
// BLOCK_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fVerifyTargetBlock(unsigned char bBankNumber,
unsigned char bBlockNumber)
{
SendVector(set_block_number, 11);
//Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bBlockNumber, 8);
SendByte(set_block_number_end, 3);
SendVector(verify_setup_v, num_bits_verify_setup);
if ((fIsError = fDetectHiLoTransition())) {
return (BLOCK_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress = 0;
bTargetDataPtr = 0;
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4); //PTJ 308: this was changed from sending the first 5 bits to sending the first 4
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress, 6);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return an error.
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return (BLOCK_ERROR);
bTargetDataPtr++;
// Increment the address by four to accomodate 6-Bit addressing
// (puts the 6-bit address into MSBit locations for "SendByte()").
bTargetAddress += 4;
}
return (PASS);
}
signed char fReadByteLoop(unsigned int blknum)
{
bTargetAddress = 0;
bTargetDataPtr = 0;
while(bTargetDataPtr < TARGET_DATABUFF_LEN)
{
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4);
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress,7);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
//if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
if (bTargetDataIN != pSocData[blknum*TARGET_DATABUFF_LEN + bTargetDataPtr])
{
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("bTargetDataIN : ");
UART_PutHexByte(bTargetDataIN);
UART_CPutString(" abTargetDataOUT : ");
UART_PutHexByte(pSocData[blknum*TARGET_DATABUFF_LEN + bTargetDataPtr]);
#endif
return(BLOCK_ERROR);
}
bTargetDataPtr++;
// Increment the address by 2 to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
bTargetAddress += 2;
}
return(PASS);
}
signed char fReadByteLoop(void)
{
/* char x = 0; //wly */
bTargetAddress = 0;
bTargetDataPtr = 0;
/* pr_info("wly: fReadByteLoop"); */
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_write_setup, num_bits_read_write_setup);
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 4);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 7);
RunClock(2); /* Run two SCLK cycles between writing and reading */
SetSDATAHiZ(); /* Set to HiZ so Target can drive SDATA */
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); /* Send the ReadByte Vector End */
/* Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
//pr_info("wly: bTargetDataIN=%x, %x\n", bTargetDataIN, abTargetDataOUT[bTargetDataPtr]);
*/
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return BLOCK_ERROR;
bTargetDataPtr++;
/* Increment the address by 2 to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
*/
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable);
return PASS;
}
signed char fReadByteLoop(void)
{
bTargetAddress = 0;
bTargetDataPtr = 0;
while (bTargetDataPtr < TargetDatabufLen) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 5);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 6);
/* Run two SCLK cycles between writing and reading */
RunClock(2);
/* Set to HiZ so Target can drive SDATA */
SetSDATAHiZ();
bTargetDataIN = bReceiveByte();
RunClock(1);
/* Send the ReadByte Vector End */
SendVector(read_byte_v + 1, 1);
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr]) {
#ifdef TX_ON
TX8SW_PutCRLF();
TX8SW_CPutString("bTargetDataIN : ");
TX8SW_PutSHexByte(bTargetDataIN);
TX8SW_CPutString(" abTargetDataOUT : ");
TX8SW_PutSHexByte(abTargetDataOUT[bTargetDataPtr]);
#endif
return BLOCK_ERROR;
}
bTargetDataPtr++;
bTargetAddress += 4;
}
return PASS;
}
// PTJ: =======================================================================
// fReadStatus()
// Returns:
// 0 if successful
// _____ if timed out on handshake to the device.
// ============================================================================
signed char fReadStatus(void)
{
SendVector(tsync_enable, num_bits_tsync_enable);
//Send Read ID vector and get Target ID
SendVector(read_status, 11); // Read-MSB Vector is the first 11-Bits
RunClock(2); // Two SCLK cycles between write & read
bTargetStatus = bReceiveByte();
RunClock(1);
SendVector(read_status+2, 1); // 12 bits starting from the 3rd character
SendVector(tsync_disable, num_bits_tsync_disable);
if (bTargetStatus == 0x00) // if bTargetStatus is 0x00, result is pass.
{
return PASS;
}
else
{
return BLOCK_ERROR;
}
}
// ============================================================================
// PTJ: fReadSecurity()
// This reads from SM0 with Read Supervisory SPC command.
// Need to have SPC Test Mode enabled before using these commands?
// Returns:
// 0 if successful
// __________ if timed out on handshake to the device.
// ============================================================================
signed char fReadSecurity(void)
{
SendVector(ReadSecuritySetup, num_bits_ReadSecuritySetup);
// SendVector(SPCTestMode_enable, num_bits_SPCTestMode_enable);
bTargetAddress = 0x00;
while (bTargetAddress < (SECURITY_BYTES_PER_BANK * 2)) { //PTJ: we do SECURITY_BYTES_PER_BANK * 2 because we bTargetAddress += 2
//PTJ: TSYNC Enable
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_security_pt1, num_bits_read_security_pt1); //PTJ:
// Set the drive here because SendByte() does not.
SetSDATAStrong();
SendByte(bTargetAddress, 7); //PTJ: hardcode MSb of address as 0 in bit stream
SendVector(read_security_pt1_end,
num_bits_read_security_pt1_end);
//PTJ: TSYNC Disable
SendVector(tsync_disable, num_bits_tsync_disable);
SendVector(read_security_pt2, num_bits_read_security_pt2);
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(read_security_pt3, num_bits_read_security_pt3);
SetSDATAStrong();
SendByte(bTargetAddress, 7);
SendVector(read_security_pt3_end,
num_bits_read_security_pt3_end);
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress += 2;
}
bTargetAddress = 0x00;
bTargetDataPtr = 0x00;
SendVector(tsync_enable, num_bits_tsync_enable); //PTJ: 307, added for tsync testing
while (bTargetAddress < (SECURITY_BYTES_PER_BANK * 2)) { //PTJ: we do SECURITY_BYTES_PER_BANK * 2 because we bTargetAddress += 2
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4);
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress, 7);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
// return(BLOCK_ERROR);
// Increment the address by two to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
bTargetDataPtr++;
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable); //PTJ: 307, added for tsync testing
return (PASS);
}
// ============================================================================
// fVerifySiliconID()
// Returns:
// 0 if successful
// Si_ID_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fVerifySiliconID(void)
{
SendVector(id_setup_2, num_bits_id_setup_2);
fIsError = fDetectHiLoTransition();
if (fIsError)
{
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("fDetectHiLoTransition Error");
#endif
return(SiID_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
//Send Read ID vector and get Target ID
SendVector(read_id_v, 11); // Read-MSB Vector is the first 11-Bits
RunClock(2); // Two SCLK cycles between write & read
bTargetID[0] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+2, 12); // 1+11 bits starting from the 3rd byte
RunClock(2); // Read-LSB Command
bTargetID[1] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+4, 1); // 1 bit starting from the 5th byte
//read Revision ID from Accumulator A and Accumulator X
//SendVector(read_id_v+5, 11); //11 bits starting from the 6th byte
//RunClock(2);
//bTargetID[2] = bReceiveByte(); //Read from Acc.X
//RunClock(1);
//SendVector(read_id_v+7, 12); //1+11 bits starting from the 8th byte
//
//RunClock(2);
//bTargetID[3] = bReceiveByte(); //Read from Acc.A
//
//RunClock(1);
//SendVector(read_id_v+4, 1); //1 bit starting from the 5th byte,
SendVector(tsync_disable, num_bits_tsync_disable);
#ifdef TX_ON
// Print READ-ID
UART_PutCRLF();
UART_CPutString("Silicon-ID : ");
UART_PutChar(' ');
UART_PutHexByte(bTargetID[0]);
UART_PutChar(' ');
UART_PutHexByte(bTargetID[1]);
UART_PutChar(' ');
#endif
#ifdef LCD_ON
LCD_Char_Position(1, 0);
LCD_Char_PrintString("ID : ");
LCD_Char_PrintInt8(bTargetID[0]);
LCD_Char_PutChar(' ');
LCD_Char_PrintInt8(bTargetID[1]);
LCD_Char_PutChar(' ');
#endif
if (bTargetID[0] == target_id_v[0] && bTargetID[1] == target_id_v[1])
{
return(PASS);
}
else if (bTargetID[0] == target_id_v2[0] && bTargetID[1] == target_id_v2[1])
{
return(PASS);
}
else
{
printk("%x %x \n", bTargetID[0], bTargetID[1]);
return(SiID_ERROR);
}
}
// ============================================================================
// fVerifySiliconID()
// Returns:
// 0 if successful
// Si_ID_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fVerifySiliconID(void)
{
SendVector(id_setup_2, num_bits_id_setup_2);
//printk(KERN_ERR"fVerifySiliconID: SendVector id_stup2 END\n");
if ((fIsError = fDetectHiLoTransition())) {
printk(KERN_INFO "fVerifySiliconID(): fDetectHiLoTransition Error\n");
return (SiID_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(tsync_enable, num_bits_tsync_enable);
//printk(KERN_ERR"fVerifySiliconID: SendVector(wait_and_poll_end) (tsync_enable) END\n");
//Send Read ID vector and get Target ID
SendVector(read_id_v, 11); // Read-MSB Vector is the first 11-Bits
RunClock(2); // Two SCLK cycles between write & read
bTargetID[0] = bReceiveByte();
RunClock(1);
SendVector(read_id_v + 2, 12); // 1+11 bits starting from the 3rd byte
RunClock(2); // Read-LSB Command
bTargetID[1] = bReceiveByte();
RunClock(1);
SendVector(read_id_v + 4, 1); // 1 bit starting from the 5th byte
//read Revision ID from Accumulator A and Accumulator X
SendVector(read_id_v + 5, 11); //11 bits starting from the 6th byte
RunClock(2);
bTargetID[2] = bReceiveByte(); //Read from Acc.X
RunClock(1);
SendVector(read_id_v + 7, 12); //1+11 bits starting from the 8th byte
RunClock(2);
bTargetID[3] = bReceiveByte(); //Read from Acc.A
RunClock(1);
SendVector(read_id_v + 4, 1); //1bit starting from the 5th byte,
SendVector(tsync_disable, num_bits_tsync_disable);
// Print READ-ID
/*
TX8SW_CPutString("\r\n Silicon-ID : ");
TX8SW_PutChar(' ');
TX8SW_PutSHexByte(bTargetID[0]);
TX8SW_PutChar(' ');
TX8SW_PutSHexByte(bTargetID[1]);
TX8SW_PutChar(' ');
TX8SW_PutSHexByte(bTargetID[2]);
TX8SW_PutChar(' ');
TX8SW_PutSHexByte(bTargetID[3]);
TX8SW_PutChar(' ');
*/
#if 0 // issp_test_20100709 block
printk("issp_routines.c: ID0:0x%X, ID1:0x%X, ID2: 0x%X, ID2: 0x%X\n",
bTargetID[0], bTargetID[1], bTargetID[2], bTargetID[3]);
if ((bTargetID[0] != target_id_v[0]) || (bTargetID[1] != target_id_v[1])
|| (bTargetID[2] != target_id_v[2])
|| (bTargetID[3] != target_id_v[3])) {
return (SiID_ERROR);
} else {
return (PASS);
}
#else
return (PASS);
#endif
}
signed char fVerifySiliconID(void)
{
SendVector(id_setup_2, num_bits_id_setup_2);
fIsError = fDetectHiLoTransition();
if (fIsError != 0) {
#ifdef TX_ON
TX8SW_PutCRLF();
TX8SW_CPutString("fDetectHiLoTransition Error");
#endif
#ifdef LCD_ON
LCD_Char_PrintString("fDetectHiLoTransition Error");
#endif
return SiID_ERROR;
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/* Send Read ID vector and get Target ID */
SendVector(read_id_v, 11); /*Read-MSB Vector is the first 11-Bits */
RunClock(2); /*Two SCLK cycles between write & read */
bTargetID[0] = bReceiveByte();
RunClock(1);
/* 1+11 bits starting from the 3rd byte */
SendVector(read_id_v + 2, 12);
RunClock(2); /* Read-LSB Command */
bTargetID[1] = bReceiveByte();
RunClock(1);
SendVector(read_id_v+4, 1); /*1 bit starting from the 5th byte */
#ifdef TX_ON
/*Print READ-ID */
TX8SW_PutCRLF();
TX8SW_CPutString("Silicon-ID : ");
TX8SW_PutChar(' ');
TX8SW_PutSHexByte(bTargetID[0]);
TX8SW_PutChar(' ');
TX8SW_PutSHexByte(bTargetID[1]);
TX8SW_PutChar(' ');
/* See the latest spec. 40-95002, 40-95004, 001-15870, AN2026d*/
switch (bTargetID[0]) {
case 0x00:
TX8SW_CPutString(
"\r\nPSoC1 = 00xx (including Ovation-ONS)");
switch (bTargetID[1]) {
case 0x68:
TX8SW_CPutString(
"\r\nCY8C20234 8K, 512B(Quark)");
TargetDatabufLen = 64;
NumBanks = 1;
BlocksPerBank = 128;
SecurityBytesPerBank = 64;
break;
case 0xAD:
TX8SW_CPutString(
"\r\nCY8C20446A-24LQXI 16K, 2K(Krypton)");
TargetDatabufLen = 128;
NumBanks = 1;
BlocksPerBank = 128;
SecurityBytesPerBank = 64;
break;
case 0x37:
TX8SW_CPutString(
"\r\nCY8C21334 Automotive(Neutron) 8K,512B");
TargetDatabufLen = 64;
NumBanks = 1;
BlocksPerBank = 128;
SecurityBytesPerBank = 64;
break;
case 0x38:
TX8SW_CPutString(
"\r\nCY8C21434 Neutron");
TargetDatabufLen = 64;
NumBanks = 1;
BlocksPerBank = 128;
SecurityBytesPerBank = 64;
break;
default:
break;
}
break;
case 0x01:
TX8SW_CPutString(
"\r\nPSoC1 = 01xx(continued family and mask set growth");
break;
case 0x02:
TX8SW_CPutString(
"\r\nPSoC1 + SmartSense = 02xx");
break;
case 0x03:
TX8SW_CPutString("\r\nUnallocated = 03xx");
break;
case 0x04:
TX8SW_CPutString("\r\nPower PSoC = 04xx");
break;
case 0x05:
TX8SW_CPutString(
"\r\nTrueTouch Multi-Touch All Points(TMA) = 05xx");
switch (bTargetID[1]) {
case 0x9A:
TX8SW_CPutString(
"\r\nCY8CTMA340-LQI-01");
TargetDatabufLen = 128;
NumBanks = 1;
BlocksPerBank = 256;
SecurityBytesPerBank = 64;
break;
default:
break;
}
break;
case 0x06:
TX8SW_CPutString(
"\r\nTrueTouch Single Touch(TST) = 06xx");
break;
case 0x07:
TX8SW_CPutString(
"\r\nTrueTouch Multi-Touch Gesture(TMG) = 07xx");
break;
case 0x08:
TX8SW_CPutString(
"\r\nPSoC1 Value = 08xx");
break;
case 0x09:
TX8SW_CPutString(
"\r\nPSoC1 PLC = 09xx");
break;
case 0x0A:
TX8SW_CPutString(
"\r\nPSoC1 PLC + Ez Color = 0Axx");
break;
case 0x0B:
TX8SW_CPutString(
"\r\nPSoC1 + SmartSense_EMC = 0Bxx");
break;
case 0x0C:
TX8SW_CPutString(
"\r\nHaptics Only = 0Cxx");
break;
case 0x0D:
TX8SW_CPutString(
"\r\nHaptics + TrueTouch Multi-Touch All Points(TMA) = 0Dxx");
break;
case 0x0E:
TX8SW_CPutString(
"\r\nHaptics + TrueTouch Single Touch(TST = 0Exx");
break;
case 0x0F:
TX8SW_CPutString(
"\r\nHaptics + TrueTouch Multi-Touch Gesture(TMG) = 0Fxx");
break;
default:
TX8SW_CPutString("\r\nUnknown Silicon ID !!");
while (1)
;
break;
}
#endif
target_id_v[0] = bTargetID[0];
target_id_v[1] = bTargetID[1];
#ifdef LCD_ON
LCD_Char_Position(1, 0);
LCD_Char_PrintString("ID : ");
LCD_Char_PrintInt8(bTargetID[0]);
LCD_Char_PutChar(' ');
LCD_Char_PrintInt8(bTargetID[1]);
LCD_Char_PutChar(' ');
#endif
if (bTargetID[0] != target_id_v[0] || bTargetID[1] != target_id_v[1])
return SiID_ERROR;
else
return PASS;
}
/* ============================================================================
// XCH: fVerifySecurity()
// This step is optional. Verifies that the security bits have been written correctly
============================================================================ */
signed char fVerifySecurity(void)
{
/* unsigned char bBlockNumber = 0;//wly */
bTargetAddress = 0x00;
#ifdef USE_TP
SetTPHigh(); /* Only used of Test Points are enabled */
#endif
#ifdef USE_TP
SetTPLow(); /* Only used of Test Points are enabled */
#endif
SendVector(verify_security, num_bits_verify_security);
fIsError = fDetectHiLoTransition();
if (fIsError)
return INIT_ERROR;
#ifdef USE_TP
SetTPHigh(); /* Only used of Test Points are enabled */
#endif
#ifdef USE_TP
SetTPLow(); /* Only used of Test Points are enabled */
#endif
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress = 0x00;
bTargetDataPtr = 0x00;
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_write_setup, num_bits_read_write_setup);
/* fReadWriteSetup(); */
/* we do SECURITY_BYTES_PER_BANK * 2 because we bTargetAddress += 2 */
while (bTargetAddress < (SECURITY_BYTES_PER_BANK * 2)) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 4);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 7);
SetSDATAHiZ(); /* Set to HiZ so Target can drive SDATA */
RunClock(2); /* Run two SCLK cycles between writing and reading */
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); /* Send the ReadByte Vector End */
/* Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
*/
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return BLOCK_ERROR;
/* Increment the address by two to accomodate 7-Bit addressing
(puts the 7-bit address into MSBit locations for "SendByte()").
*/
bTargetDataPtr++;
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable);
return PASS;
}
